2 mcs51 specific general functions.
4 Note that mlh prepended _mcs51_ on the static functions. Makes
5 it easier to set a breakpoint using the debugger.
11 #include "../SDCCutil.h"
13 static char _defaultRules[] =
18 /* list of key words used by msc51 */
19 static char *_mcs51_keywords[] =
53 void mcs51_assignRegisters (ebbIndex *);
55 static int regParmFlg = 0; /* determine if we can register a parameter */
56 static int regBitParmFlg = 0; /* determine if we can register a bit parameter */
61 asm_addTree (&asm_asxxxx_mapping);
65 _mcs51_reset_regparm (void)
72 _mcs51_regparm (sym_link * l, bool reentrant)
74 if (IS_SPEC(l) && (SPEC_NOUN(l) == V_BIT)) {
75 /* bit parameters go to b0 thru b7 */
76 if (reentrant && (regBitParmFlg < 8)) {
78 return 12 + regBitParmFlg;
82 if (options.parms_in_bank1 == 0) {
83 /* simple can pass only the first parameter in a register */
90 int size = getSize(l);
93 /* first one goes the usual way to DPTR */
94 if (regParmFlg == 0) {
98 /* second one onwards goes to RB1_0 thru RB1_7 */
99 remain = regParmFlg - 4;
100 if (size > (8 - remain)) {
105 return regParmFlg - size + 1;
110 _mcs51_parseOptions (int *pargc, char **argv, int *i)
112 /* TODO: allow port-specific command line options to specify
113 * segment names here.
119 _mcs51_finaliseOptions (void)
121 if (options.noXinitOpt) {
125 switch (options.model)
128 port->mem.default_local_map = data;
129 port->mem.default_globl_map = data;
130 port->s.gptr_size = 3;
133 port->mem.default_local_map = pdata;
134 port->mem.default_globl_map = pdata;
135 port->s.gptr_size = 3;
138 port->mem.default_local_map = xdata;
139 port->mem.default_globl_map = xdata;
140 port->s.gptr_size = 3;
143 port->mem.default_local_map = data;
144 port->mem.default_globl_map = data;
148 if (options.parms_in_bank1) {
149 addSet(&preArgvSet, Safe_strdup("-DSDCC_PARMS_IN_BANK1"));
154 _mcs51_setDefaultOptions (void)
159 _mcs51_getRegName (struct regs *reg)
167 _mcs51_genAssemblerPreamble (FILE * of)
169 if (options.parms_in_bank1) {
171 for (i=0; i < 8 ; i++ )
172 fprintf (of,"b1_%d = 0x%x \n",i,8+i);
176 /* Generate interrupt vector table. */
178 _mcs51_genIVT (FILE * of, symbol ** interrupts, int maxInterrupts)
182 fprintf (of, "\tljmp\t__sdcc_gsinit_startup\n");
184 /* now for the other interrupts */
185 for (i = 0; i < maxInterrupts; i++)
189 fprintf (of, "\tljmp\t%s\n", interrupts[i]->rname);
190 if ( i != maxInterrupts - 1 )
191 fprintf (of, "\t.ds\t5\n");
195 fprintf (of, "\treti\n");
196 if ( i != maxInterrupts - 1 )
197 fprintf (of, "\t.ds\t7\n");
204 _mcs51_genExtraAreas(FILE *of, bool hasMain)
206 tfprintf (of, "\t!area\n", HOME_NAME);
207 tfprintf (of, "\t!area\n", "GSINIT0 (CODE)");
208 tfprintf (of, "\t!area\n", "GSINIT1 (CODE)");
209 tfprintf (of, "\t!area\n", "GSINIT2 (CODE)");
210 tfprintf (of, "\t!area\n", "GSINIT3 (CODE)");
211 tfprintf (of, "\t!area\n", "GSINIT4 (CODE)");
212 tfprintf (of, "\t!area\n", "GSINIT5 (CODE)");
213 tfprintf (of, "\t!area\n", STATIC_NAME);
214 tfprintf (of, "\t!area\n", port->mem.post_static_name);
215 tfprintf (of, "\t!area\n", CODE_NAME);
219 _mcs51_genInitStartup (FILE *of)
221 tfprintf (of, "\t!global\n", "__sdcc_gsinit_startup");
222 tfprintf (of, "\t!global\n", "__sdcc_program_startup");
223 tfprintf (of, "\t!global\n", "__start__stack");
225 if (options.useXstack)
227 tfprintf (of, "\t!global\n", "__sdcc_init_xstack");
228 tfprintf (of, "\t!global\n", "__start__xstack");
231 // if the port can copy the XINIT segment to XISEG
237 if (!getenv("SDCC_NOGENRAMCLEAR"))
238 tfprintf (of, "\t!global\n", "__mcs51_genRAMCLEAR");
242 /* Generate code to copy XINIT to XISEG */
243 static void _mcs51_genXINIT (FILE * of) {
244 tfprintf (of, "\t!global\n", "__mcs51_genXINIT");
246 if (!getenv("SDCC_NOGENRAMCLEAR"))
247 tfprintf (of, "\t!global\n", "__mcs51_genXRAMCLEAR");
251 /* Do CSE estimation */
252 static bool cseCostEstimation (iCode *ic, iCode *pdic)
254 operand *result = IC_RESULT(ic);
255 sym_link *result_type = operandType(result);
257 /* if it is a pointer then return ok for now */
258 if (IC_RESULT(ic) && IS_PTR(result_type)) return 1;
260 /* if bitwise | add & subtract then no since mcs51 is pretty good at it
261 so we will cse only if they are local (i.e. both ic & pdic belong to
262 the same basic block */
263 if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') {
264 /* then if they are the same Basic block then ok */
265 if (ic->eBBlockNum == pdic->eBBlockNum) return 1;
269 /* for others it is cheaper to do the cse */
273 /* Indicate which extended bit operations this port supports */
275 hasExtBitOp (int op, int size)
283 || (op == SWAP && size <= 2)
290 /* Indicate the expense of an access to an output storage class */
292 oclsExpense (struct memmap *oclass)
294 if (IN_FARSPACE(oclass))
303 instructionSize(char *inst, char *op1, char *op2)
305 #define ISINST(s) (strncmp(inst, (s), sizeof(s)-1) == 0)
306 #define IS_A(s) (*(s) == 'a' && *(s+1) == '\0')
307 #define IS_C(s) (*(s) == 'c' && *(s+1) == '\0')
308 #define IS_Rn(s) (*(s) == 'r' && *(s+1) >= '0' && *(s+1) <= '7')
309 #define IS_atRi(s) (*(s) == '@' && *(s+1) == 'r')
311 /* Based on the current (2003-08-22) code generation for the
312 small library, the top instruction probability is:
323 /* mov, push, & pop are the 69% of the cases. Check them first! */
326 if (*(inst+3)=='x') return 1; /* movx */
327 if (*(inst+3)=='c') return 1; /* movc */
328 if (IS_C (op1) || IS_C (op2)) return 2;
331 if (IS_Rn (op2) || IS_atRi (op2)) return 1;
334 if (IS_Rn(op1) || IS_atRi(op1))
336 if (IS_A(op2)) return 1;
339 if (strcmp (op1, "dptr") == 0) return 3;
340 if (IS_A (op2) || IS_Rn (op2) || IS_atRi (op2)) return 2;
344 if (ISINST ("push")) return 2;
345 if (ISINST ("pop")) return 2;
347 if (ISINST ("lcall")) return 3;
348 if (ISINST ("ret")) return 1;
349 if (ISINST ("ljmp")) return 3;
350 if (ISINST ("sjmp")) return 2;
351 if (ISINST ("rlc")) return 1;
352 if (ISINST ("rrc")) return 1;
353 if (ISINST ("rl")) return 1;
354 if (ISINST ("rr")) return 1;
355 if (ISINST ("swap")) return 1;
356 if (ISINST ("jc")) return 2;
357 if (ISINST ("jnc")) return 2;
358 if (ISINST ("jb")) return 3;
359 if (ISINST ("jnb")) return 3;
360 if (ISINST ("jbc")) return 3;
361 if (ISINST ("jmp")) return 1; // always jmp @a+dptr
362 if (ISINST ("jz")) return 2;
363 if (ISINST ("jnz")) return 2;
364 if (ISINST ("cjne")) return 3;
365 if (ISINST ("mul")) return 1;
366 if (ISINST ("div")) return 1;
367 if (ISINST ("da")) return 1;
368 if (ISINST ("xchd")) return 1;
369 if (ISINST ("reti")) return 1;
370 if (ISINST ("nop")) return 1;
371 if (ISINST ("acall")) return 2;
372 if (ISINST ("ajmp")) return 2;
375 if (ISINST ("add") || ISINST ("addc") || ISINST ("subb") || ISINST ("xch"))
377 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
380 if (ISINST ("inc") || ISINST ("dec"))
382 if (IS_A(op1) || IS_Rn(op1) || IS_atRi(op1)) return 1;
383 if (strcmp(op1, "dptr") == 0) return 1;
386 if (ISINST ("anl") || ISINST ("orl") || ISINST ("xrl"))
388 if (IS_C(op1)) return 2;
391 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
396 if (IS_A(op2)) return 2;
400 if (ISINST ("clr") || ISINST ("setb") || ISINST ("cpl"))
402 if (IS_A(op1) || IS_C(op1)) return 1;
407 if (IS_Rn(op1)) return 2;
411 /* If the instruction is unrecognized, we shouldn't try to optimize. */
412 /* Return a large value to discourage optimization. */
417 newAsmLineNode (void)
421 aln = Safe_alloc ( sizeof (asmLineNode));
423 aln->regsRead = NULL;
424 aln->regsWritten = NULL;
430 typedef struct mcs51operanddata
438 static mcs51operanddata mcs51operandDataTable[] =
441 {"ab", A_IDX, B_IDX},
455 {"dph", DPH_IDX, -1},
456 {"dpl", DPL_IDX, -1},
457 {"dptr", DPL_IDX, DPH_IDX},
462 {"psw", CND_IDX, -1},
474 mcs51operandCompare (const void *key, const void *member)
476 return strcmp((const char *)key, ((mcs51operanddata *)member)->name);
480 updateOpRW (asmLineNode *aln, char *op, char *optype)
482 mcs51operanddata *opdat;
485 dot = strchr(op, '.');
489 opdat = bsearch (op, mcs51operandDataTable,
490 sizeof(mcs51operandDataTable)/sizeof(mcs51operanddata),
491 sizeof(mcs51operanddata), mcs51operandCompare);
493 if (opdat && strchr(optype,'r'))
495 if (opdat->regIdx1 >= 0)
496 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx1);
497 if (opdat->regIdx2 >= 0)
498 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx2);
500 if (opdat && strchr(optype,'w'))
502 if (opdat->regIdx1 >= 0)
503 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx1);
504 if (opdat->regIdx2 >= 0)
505 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx2);
509 if (!strcmp(op, "@r0"))
510 aln->regsRead = bitVectSetBit (aln->regsRead, R0_IDX);
511 if (!strcmp(op, "@r1"))
512 aln->regsRead = bitVectSetBit (aln->regsRead, R1_IDX);
513 if (strstr(op, "dptr"))
515 aln->regsRead = bitVectSetBit (aln->regsRead, DPL_IDX);
516 aln->regsRead = bitVectSetBit (aln->regsRead, DPH_IDX);
518 if (strstr(op, "a+"))
519 aln->regsRead = bitVectSetBit (aln->regsRead, A_IDX);
523 typedef struct mcs51opcodedata
533 static mcs51opcodedata mcs51opcodeDataTable[] =
535 {"acall","j", "", "", ""},
536 {"add", "", "w", "rw", "r"},
537 {"addc", "", "rw", "rw", "r"},
538 {"ajmp", "j", "", "", ""},
539 {"anl", "", "", "rw", "r"},
540 {"cjne", "j", "w", "r", "r"},
541 {"clr", "", "", "w", ""},
542 {"cpl", "", "", "rw", ""},
543 {"da", "", "rw", "rw", ""},
544 {"dec", "", "", "rw", ""},
545 {"div", "", "w", "rw", ""},
546 {"djnz", "j", "", "rw", ""},
547 {"inc", "", "", "rw", ""},
548 {"jb", "j", "", "r", ""},
549 {"jbc", "j", "", "rw", ""},
550 {"jc", "j", "", "", ""},
551 {"jmp", "j", "", "", ""},
552 {"jnb", "j", "", "r", ""},
553 {"jnc", "j", "", "", ""},
554 {"jnz", "j", "", "", ""},
555 {"jz", "j", "", "", ""},
556 {"lcall","j", "", "", ""},
557 {"ljmp", "j", "", "", ""},
558 {"mov", "", "", "w", "r"},
559 {"movc", "", "", "w", "r"},
560 {"movx", "", "", "w", "r"},
561 {"mul", "", "w", "rw", ""},
562 {"nop", "", "", "", ""},
563 {"orl", "", "", "rw", "r"},
564 {"pop", "", "", "w", ""},
565 {"push", "", "", "r", ""},
566 {"ret", "j", "", "", ""},
567 {"reti", "j", "", "", ""},
568 {"rl", "", "", "rw", ""},
569 {"rlc", "", "rw", "rw", ""},
570 {"rr", "", "", "rw", ""},
571 {"rrc", "", "rw", "rw", ""},
572 {"setb", "", "", "w", ""},
573 {"sjmp", "j", "", "", ""},
574 {"subb", "", "rw", "rw", "r"},
575 {"swap", "", "", "rw", ""},
576 {"xch", "", "", "rw", "rw"},
577 {"xchd", "", "", "rw", "rw"},
578 {"xrl", "", "", "rw", "r"},
582 mcs51opcodeCompare (const void *key, const void *member)
584 return strcmp((const char *)key, ((mcs51opcodedata *)member)->name);
588 asmLineNodeFromLineNode (lineNode *ln)
590 asmLineNode *aln = newAsmLineNode();
591 char *op, op1[256], op2[256];
593 const unsigned char *p;
595 mcs51opcodedata *opdat;
599 while (*p && isspace(*p)) p++;
600 for (op = inst, opsize=1; *p; p++)
602 if (isspace(*p) || *p == ';' || *p == ':' || *p == '=')
605 if (opsize < sizeof(inst))
606 *op++ = tolower(*p), opsize++;
610 if (*p == ';' || *p == ':' || *p == '=')
613 while (*p && isspace(*p)) p++;
617 for (op = op1, opsize=1; *p && *p != ','; p++)
619 if (!isspace(*p) && opsize < sizeof(op1))
620 *op++ = tolower(*p), opsize++;
625 for (op = op2, opsize=1; *p && *p != ','; p++)
627 if (!isspace(*p) && opsize < sizeof(op2))
628 *op++ = tolower(*p), opsize++;
632 aln->size = instructionSize(inst, op1, op2);
634 aln->regsRead = newBitVect (END_IDX);
635 aln->regsWritten = newBitVect (END_IDX);
637 opdat = bsearch (inst, mcs51opcodeDataTable,
638 sizeof(mcs51opcodeDataTable)/sizeof(mcs51opcodedata),
639 sizeof(mcs51opcodedata), mcs51opcodeCompare);
643 updateOpRW (aln, op1, opdat->op1type);
644 updateOpRW (aln, op2, opdat->op2type);
645 if (strchr(opdat->pswtype,'r'))
646 aln->regsRead = bitVectSetBit (aln->regsRead, CND_IDX);
647 if (strchr(opdat->pswtype,'w'))
648 aln->regsWritten = bitVectSetBit (aln->regsWritten, CND_IDX);
655 getInstructionSize (lineNode *line)
658 line->aln = asmLineNodeFromLineNode (line);
660 return line->aln->size;
664 getRegsRead (lineNode *line)
667 line->aln = asmLineNodeFromLineNode (line);
669 return line->aln->regsRead;
673 getRegsWritten (lineNode *line)
676 line->aln = asmLineNodeFromLineNode (line);
678 return line->aln->regsWritten;
682 /** $1 is always the basename.
683 $2 is always the output file.
685 $l is the list of extra options that should be there somewhere...
686 MUST be terminated with a NULL.
688 static const char *_linkCmd[] =
690 "aslink", "-nf", "\"$1\"", NULL
693 /* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */
694 static const char *_asmCmd[] =
696 "asx8051", "$l", "$3", "\"$1.asm\"", NULL
704 "MCU 8051", /* Target name */
705 NULL, /* Processor name */
708 TRUE, /* Emit glue around main */
709 MODEL_SMALL | MODEL_MEDIUM | MODEL_LARGE,
715 "-plosgffc", /* Options with debug */
716 "-plosgff", /* Options without debug */
719 NULL /* no do_assemble function */
735 /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */
736 1, 2, 2, 4, 1, 2, 3, 1, 4, 4
739 "XSTK (PAG,XDATA)", // xstack_name
740 "STACK (DATA)", // istack_name
741 "CSEG (CODE)", // code_name
742 "DSEG (DATA)", // data_name
743 "ISEG (DATA)", // idata_name
744 "PSEG (PAG,XDATA)", // pdata_name
745 "XSEG (XDATA)", // xdata_name
746 "BSEG (BIT)", // bit_name
747 "RSEG (DATA)", // reg_name
748 "GSINIT (CODE)", // static_name
749 "OSEG (OVR,DATA)", // overlay_name
750 "GSFINAL (CODE)", // post_static_name
751 "HOME (CODE)", // home_name
752 "XISEG (XDATA)", // xidata_name - initialized xdata initialized xdata
753 "XINIT (CODE)", // xinit_name - a code copy of xiseg
754 "CONST (CODE)", // const_name - const data (code or not)
759 { _mcs51_genExtraAreas, NULL },
761 +1, /* direction (+1 = stack grows up) */
762 0, /* bank_overhead (switch between register banks) */
763 4, /* isr_overhead */
764 1, /* call_overhead (2 for return address - 1 for pre-incrementing push */
765 1, /* reent_overhead */
766 0 /* banked_overhead (switch between code banks) */
769 /* mcs51 has an 8 bit mul */
773 mcs51_emitDebuggerSymbol
777 2, /* sizeofElement */
778 {6,9,15}, /* sizeofMatchJump[] */
779 {9,18,36}, /* sizeofRangeCompare[] */
780 4, /* sizeofSubtract */
781 6, /* sizeofDispatch */
788 _mcs51_finaliseOptions,
789 _mcs51_setDefaultOptions,
790 mcs51_assignRegisters,
793 _mcs51_genAssemblerPreamble,
794 NULL, /* no genAssemblerEnd */
797 _mcs51_genInitStartup,
798 _mcs51_reset_regparm,
803 hasExtBitOp, /* hasExtBitOp */
804 oclsExpense, /* oclsExpense */
806 TRUE, /* little endian */
809 1, /* transform <= to ! > */
810 1, /* transform >= to ! < */
811 1, /* transform != to !(a == b) */
813 FALSE, /* No array initializer support. */
815 NULL, /* no builtin functions */
816 GPOINTER, /* treat unqualified pointers as "generic" pointers */
817 1, /* reset labelKey to 1 */
818 1, /* globals & local static allowed */