2 mcs51 specific general functions.
4 Note that mlh prepended _mcs51_ on the static functions. Makes
5 it easier to set a breakpoint using the debugger.
11 #include "../SDCCutil.h"
13 static char _defaultRules[] =
18 /* list of key words used by msc51 */
19 static char *_mcs51_keywords[] =
53 void mcs51_assignRegisters (ebbIndex *);
55 static int regParmFlg = 0; /* determine if we can register a parameter */
56 static int regBitParmFlg = 0; /* determine if we can register a bit parameter */
61 asm_addTree (&asm_asxxxx_mapping);
65 _mcs51_reset_regparm (void)
72 _mcs51_regparm (sym_link * l)
74 if (IS_SPEC(l) && (SPEC_NOUN(l) == V_BIT)) {
75 /* bit parameters go to b0 thru b7 */
76 if (options.stackAuto && (regBitParmFlg < 8)) {
78 return 12 + regBitParmFlg;
82 if (options.parms_in_bank1 == 0) {
83 /* simple can pass only the first parameter in a register */
90 int size = getSize(l);
93 /* first one goes the usual way to DPTR */
94 if (regParmFlg == 0) {
98 /* second one onwards goes to RB1_0 thru RB1_7 */
99 remain = regParmFlg - 4;
100 if (size > (8 - remain)) {
105 return regParmFlg - size + 1;
110 _mcs51_parseOptions (int *pargc, char **argv, int *i)
112 /* TODO: allow port-specific command line options to specify
113 * segment names here.
119 _mcs51_finaliseOptions (void)
121 if (options.noXinitOpt) {
125 if (options.model == MODEL_LARGE) {
126 port->mem.default_local_map = xdata;
127 port->mem.default_globl_map = xdata;
131 port->mem.default_local_map = data;
132 port->mem.default_globl_map = data;
135 if (options.parms_in_bank1) {
136 addSet(&preArgvSet, Safe_strdup("-DSDCC_PARMS_IN_BANK1"));
141 _mcs51_setDefaultOptions (void)
146 _mcs51_getRegName (struct regs *reg)
154 _mcs51_genAssemblerPreamble (FILE * of)
156 if (options.parms_in_bank1) {
158 for (i=0; i < 8 ; i++ )
159 fprintf (of,"b1_%d = 0x%x \n",i,8+i);
163 /* Generate interrupt vector table. */
165 _mcs51_genIVT (FILE * of, symbol ** interrupts, int maxInterrupts)
169 fprintf (of, "\tljmp\t__sdcc_gsinit_startup\n");
171 /* now for the other interrupts */
172 for (i = 0; i < maxInterrupts; i++)
176 fprintf (of, "\tljmp\t%s\n", interrupts[i]->rname);
177 if ( i != maxInterrupts - 1 )
178 fprintf (of, "\t.ds\t5\n");
182 fprintf (of, "\treti\n");
183 if ( i != maxInterrupts - 1 )
184 fprintf (of, "\t.ds\t7\n");
191 _mcs51_genExtraAreas(FILE *of, bool hasMain)
193 tfprintf (of, "\t!area\n", HOME_NAME);
194 tfprintf (of, "\t!area\n", "GSINIT0 (CODE)");
195 tfprintf (of, "\t!area\n", "GSINIT1 (CODE)");
196 tfprintf (of, "\t!area\n", "GSINIT2 (CODE)");
197 tfprintf (of, "\t!area\n", "GSINIT3 (CODE)");
198 tfprintf (of, "\t!area\n", "GSINIT4 (CODE)");
199 tfprintf (of, "\t!area\n", "GSINIT5 (CODE)");
200 tfprintf (of, "\t!area\n", STATIC_NAME);
201 tfprintf (of, "\t!area\n", port->mem.post_static_name);
202 tfprintf (of, "\t!area\n", CODE_NAME);
206 _mcs51_genInitStartup (FILE *of)
208 tfprintf (of, "\t!global\n", "__sdcc_gsinit_startup");
209 tfprintf (of, "\t!global\n", "__sdcc_program_startup");
210 tfprintf (of, "\t!global\n", "__start__stack");
212 if (options.useXstack)
214 tfprintf (of, "\t!global\n", "__sdcc_init_xstack");
215 tfprintf (of, "\t!global\n", "__start__xstack");
218 // if the port can copy the XINIT segment to XISEG
224 if (!getenv("SDCC_NOGENRAMCLEAR"))
225 tfprintf (of, "\t!global\n", "__mcs51_genRAMCLEAR");
229 /* Generate code to copy XINIT to XISEG */
230 static void _mcs51_genXINIT (FILE * of) {
231 tfprintf (of, "\t!global\n", "__mcs51_genXINIT");
233 if (!getenv("SDCC_NOGENRAMCLEAR"))
234 tfprintf (of, "\t!global\n", "__mcs51_genXRAMCLEAR");
238 /* Do CSE estimation */
239 static bool cseCostEstimation (iCode *ic, iCode *pdic)
241 operand *result = IC_RESULT(ic);
242 sym_link *result_type = operandType(result);
244 /* if it is a pointer then return ok for now */
245 if (IC_RESULT(ic) && IS_PTR(result_type)) return 1;
247 /* if bitwise | add & subtract then no since mcs51 is pretty good at it
248 so we will cse only if they are local (i.e. both ic & pdic belong to
249 the same basic block */
250 if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') {
251 /* then if they are the same Basic block then ok */
252 if (ic->eBBlockNum == pdic->eBBlockNum) return 1;
256 /* for others it is cheaper to do the cse */
260 /* Indicate which extended bit operations this port supports */
262 hasExtBitOp (int op, int size)
267 || (op == SWAP && size <= 2)
274 /* Indicate the expense of an access to an output storage class */
276 oclsExpense (struct memmap *oclass)
278 if (IN_FARSPACE(oclass))
287 instructionSize(char *inst, char *op1, char *op2)
289 #define ISINST(s) (strncmp(inst, (s), sizeof(s)-1) == 0)
290 #define IS_A(s) (*(s) == 'a' && *(s+1) == '\0')
291 #define IS_C(s) (*(s) == 'c' && *(s+1) == '\0')
292 #define IS_Rn(s) (*(s) == 'r' && *(s+1) >= '0' && *(s+1) <= '7')
293 #define IS_atRi(s) (*(s) == '@' && *(s+1) == 'r')
295 /* Based on the current (2003-08-22) code generation for the
296 small library, the top instruction probability is:
307 /* mov, push, & pop are the 69% of the cases. Check them first! */
310 if (*(inst+3)=='x') return 1; /* movx */
311 if (*(inst+3)=='c') return 1; /* movc */
312 if (IS_C (op1) || IS_C (op2)) return 2;
315 if (IS_Rn (op2) || IS_atRi (op2)) return 1;
318 if (IS_Rn(op1) || IS_atRi(op1))
320 if (IS_A(op2)) return 1;
323 if (strcmp (op1, "dptr") == 0) return 3;
324 if (IS_A (op2) || IS_Rn (op2) || IS_atRi (op2)) return 2;
328 if (ISINST ("push")) return 2;
329 if (ISINST ("pop")) return 2;
331 if (ISINST ("lcall")) return 3;
332 if (ISINST ("ret")) return 1;
333 if (ISINST ("ljmp")) return 3;
334 if (ISINST ("sjmp")) return 2;
335 if (ISINST ("rlc")) return 1;
336 if (ISINST ("rrc")) return 1;
337 if (ISINST ("rl")) return 1;
338 if (ISINST ("rr")) return 1;
339 if (ISINST ("swap")) return 1;
340 if (ISINST ("jc")) return 2;
341 if (ISINST ("jnc")) return 2;
342 if (ISINST ("jb")) return 3;
343 if (ISINST ("jnb")) return 3;
344 if (ISINST ("jbc")) return 3;
345 if (ISINST ("jmp")) return 1; // always jmp @a+dptr
346 if (ISINST ("jz")) return 2;
347 if (ISINST ("jnz")) return 2;
348 if (ISINST ("cjne")) return 3;
349 if (ISINST ("mul")) return 1;
350 if (ISINST ("div")) return 1;
351 if (ISINST ("da")) return 1;
352 if (ISINST ("xchd")) return 1;
353 if (ISINST ("reti")) return 1;
354 if (ISINST ("nop")) return 1;
355 if (ISINST ("acall")) return 2;
356 if (ISINST ("ajmp")) return 2;
359 if (ISINST ("add") || ISINST ("addc") || ISINST ("subb") || ISINST ("xch"))
361 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
364 if (ISINST ("inc") || ISINST ("dec"))
366 if (IS_A(op1) || IS_Rn(op1) || IS_atRi(op1)) return 1;
367 if (strcmp(op1, "dptr") == 0) return 1;
370 if (ISINST ("anl") || ISINST ("orl") || ISINST ("xrl"))
372 if (IS_C(op1)) return 2;
375 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
380 if (IS_A(op2)) return 2;
384 if (ISINST ("clr") || ISINST ("setb") || ISINST ("cpl"))
386 if (IS_A(op1) || IS_C(op1)) return 1;
391 if (IS_Rn(op1)) return 2;
395 /* If the instruction is unrecognized, we shouldn't try to optimize. */
396 /* Return a large value to discourage optimization. */
401 newAsmLineNode (void)
405 aln = Safe_alloc ( sizeof (asmLineNode));
407 aln->regsRead = NULL;
408 aln->regsWritten = NULL;
414 typedef struct mcs51operanddata
422 static mcs51operanddata mcs51operandDataTable[] =
425 {"ab", A_IDX, B_IDX},
439 {"dph", DPH_IDX, -1},
440 {"dpl", DPL_IDX, -1},
441 {"dptr", DPL_IDX, DPH_IDX},
446 {"psw", CND_IDX, -1},
458 mcs51operandCompare (const void *key, const void *member)
460 return strcmp((const char *)key, ((mcs51operanddata *)member)->name);
464 updateOpRW (asmLineNode *aln, char *op, char *optype)
466 mcs51operanddata *opdat;
469 dot = strchr(op, '.');
473 opdat = bsearch (op, mcs51operandDataTable,
474 sizeof(mcs51operandDataTable)/sizeof(mcs51operanddata),
475 sizeof(mcs51operanddata), mcs51operandCompare);
477 if (opdat && strchr(optype,'r'))
479 if (opdat->regIdx1 >= 0)
480 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx1);
481 if (opdat->regIdx2 >= 0)
482 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx2);
484 if (opdat && strchr(optype,'w'))
486 if (opdat->regIdx1 >= 0)
487 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx1);
488 if (opdat->regIdx2 >= 0)
489 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx2);
493 if (!strcmp(op, "@r0"))
494 aln->regsRead = bitVectSetBit (aln->regsRead, R0_IDX);
495 if (!strcmp(op, "@r1"))
496 aln->regsRead = bitVectSetBit (aln->regsRead, R1_IDX);
497 if (strstr(op, "dptr"))
499 aln->regsRead = bitVectSetBit (aln->regsRead, DPL_IDX);
500 aln->regsRead = bitVectSetBit (aln->regsRead, DPH_IDX);
502 if (strstr(op, "a+"))
503 aln->regsRead = bitVectSetBit (aln->regsRead, A_IDX);
507 typedef struct mcs51opcodedata
517 static mcs51opcodedata mcs51opcodeDataTable[] =
519 {"acall","j", "", "", ""},
520 {"add", "", "w", "rw", "r"},
521 {"addc", "", "rw", "rw", "r"},
522 {"ajmp", "j", "", "", ""},
523 {"anl", "", "", "rw", "r"},
524 {"cjne", "j", "w", "r", "r"},
525 {"clr", "", "", "w", ""},
526 {"cpl", "", "", "rw", ""},
527 {"da", "", "rw", "rw", ""},
528 {"dec", "", "", "rw", ""},
529 {"div", "", "w", "rw", ""},
530 {"djnz", "j", "", "rw", ""},
531 {"inc", "", "", "rw", ""},
532 {"jb", "j", "", "r", ""},
533 {"jbc", "j", "", "rw", ""},
534 {"jc", "j", "", "", ""},
535 {"jmp", "j", "", "", ""},
536 {"jnb", "j", "", "r", ""},
537 {"jnc", "j", "", "", ""},
538 {"jnz", "j", "", "", ""},
539 {"jz", "j", "", "", ""},
540 {"lcall","j", "", "", ""},
541 {"ljmp", "j", "", "", ""},
542 {"mov", "", "", "w", "r"},
543 {"movc", "", "", "w", "r"},
544 {"movx", "", "", "w", "r"},
545 {"mul", "", "w", "rw", ""},
546 {"nop", "", "", "", ""},
547 {"orl", "", "", "rw", "r"},
548 {"pop", "", "", "w", ""},
549 {"push", "", "", "r", ""},
550 {"ret", "j", "", "", ""},
551 {"reti", "j", "", "", ""},
552 {"rl", "", "", "rw", ""},
553 {"rlc", "", "rw", "rw", ""},
554 {"rr", "", "", "rw", ""},
555 {"rrc", "", "rw", "rw", ""},
556 {"setb", "", "", "w", ""},
557 {"sjmp", "j", "", "", ""},
558 {"subb", "", "rw", "rw", "r"},
559 {"swap", "", "", "rw", ""},
560 {"xch", "", "", "rw", "rw"},
561 {"xchd", "", "", "rw", "rw"},
562 {"xrl", "", "", "rw", "r"},
566 mcs51opcodeCompare (const void *key, const void *member)
568 return strcmp((const char *)key, ((mcs51opcodedata *)member)->name);
572 asmLineNodeFromLineNode (lineNode *ln)
574 asmLineNode *aln = newAsmLineNode();
575 char *op, op1[256], op2[256];
579 mcs51opcodedata *opdat;
583 while (*p && isspace(*p)) p++;
584 for (op = inst, opsize=1; *p; p++)
586 if (isspace(*p) || *p == ';' || *p == ':' || *p == '=')
589 if (opsize < sizeof(inst))
590 *op++ = tolower(*p), opsize++;
594 if (*p == ';' || *p == ':' || *p == '=')
597 while (*p && isspace(*p)) p++;
601 for (op = op1, opsize=1; *p && *p != ','; p++)
603 if (!isspace(*p) && opsize < sizeof(op1))
604 *op++ = tolower(*p), opsize++;
609 for (op = op2, opsize=1; *p && *p != ','; p++)
611 if (!isspace(*p) && opsize < sizeof(op2))
612 *op++ = tolower(*p), opsize++;
616 aln->size = instructionSize(inst, op1, op2);
618 aln->regsRead = newBitVect (END_IDX);
619 aln->regsWritten = newBitVect (END_IDX);
621 opdat = bsearch (inst, mcs51opcodeDataTable,
622 sizeof(mcs51opcodeDataTable)/sizeof(mcs51opcodedata),
623 sizeof(mcs51opcodedata), mcs51opcodeCompare);
627 updateOpRW (aln, op1, opdat->op1type);
628 updateOpRW (aln, op2, opdat->op2type);
629 if (strchr(opdat->pswtype,'r'))
630 aln->regsRead = bitVectSetBit (aln->regsRead, CND_IDX);
631 if (strchr(opdat->pswtype,'w'))
632 aln->regsWritten = bitVectSetBit (aln->regsWritten, CND_IDX);
639 getInstructionSize (lineNode *line)
642 line->aln = asmLineNodeFromLineNode (line);
644 return line->aln->size;
648 getRegsRead (lineNode *line)
651 line->aln = asmLineNodeFromLineNode (line);
653 return line->aln->regsRead;
657 getRegsWritten (lineNode *line)
660 line->aln = asmLineNodeFromLineNode (line);
662 return line->aln->regsWritten;
666 /** $1 is always the basename.
667 $2 is always the output file.
669 $l is the list of extra options that should be there somewhere...
670 MUST be terminated with a NULL.
672 static const char *_linkCmd[] =
674 "aslink", "-nf", "\"$1\"", NULL
677 /* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */
678 static const char *_asmCmd[] =
680 "asx8051", "$l", "$3", "\"$1.asm\"", NULL
688 "MCU 8051", /* Target name */
689 NULL, /* Processor name */
692 TRUE, /* Emit glue around main */
693 MODEL_SMALL | MODEL_LARGE,
699 "-plosgffc", /* Options with debug */
700 "-plosgff", /* Options without debug */
703 NULL /* no do_assemble function */
719 /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */
720 1, 2, 2, 4, 1, 2, 3, 1, 4, 4
723 "XSTK (PAG,XDATA)", // xstack_name
724 "STACK (DATA)", // istack_name
725 "CSEG (CODE)", // code_name
726 "DSEG (DATA)", // data_name
727 "ISEG (DATA)", // idata_name
728 "PSEG (PAG,XDATA)", // pdata_name
729 "XSEG (XDATA)", // xdata_name
730 "BSEG (BIT)", // bit_name
731 "RSEG (DATA)", // reg_name
732 "GSINIT (CODE)", // static_name
733 "OSEG (OVR,DATA)", // overlay_name
734 "GSFINAL (CODE)", // post_static_name
735 "HOME (CODE)", // home_name
736 "XISEG (XDATA)", // xidata_name - initialized xdata initialized xdata
737 "XINIT (CODE)", // xinit_name - a code copy of xiseg
738 "CONST (CODE)", // const_name - const data (code or not)
743 { _mcs51_genExtraAreas, NULL },
745 +1, /* direction (+1 = stack grows up) */
746 0, /* bank_overhead (switch between register banks) */
747 4, /* isr_overhead */
748 1, /* call_overhead (2 for return address - 1 for pre-incrementing push */
749 1, /* reent_overhead */
750 0 /* banked_overhead (switch between code banks) */
753 /* mcs51 has an 8 bit mul */
757 mcs51_emitDebuggerSymbol
761 2, /* sizeofElement */
762 {6,9,15}, /* sizeofMatchJump[] */
763 {9,18,36}, /* sizeofRangeCompare[] */
764 4, /* sizeofSubtract */
765 6, /* sizeofDispatch */
772 _mcs51_finaliseOptions,
773 _mcs51_setDefaultOptions,
774 mcs51_assignRegisters,
777 _mcs51_genAssemblerPreamble,
778 NULL, /* no genAssemblerEnd */
781 _mcs51_genInitStartup,
782 _mcs51_reset_regparm,
787 hasExtBitOp, /* hasExtBitOp */
788 oclsExpense, /* oclsExpense */
790 TRUE, /* little endian */
793 1, /* transform <= to ! > */
794 1, /* transform >= to ! < */
795 1, /* transform != to !(a == b) */
797 FALSE, /* No array initializer support. */
799 NULL, /* no builtin functions */
800 GPOINTER, /* treat unqualified pointers as "generic" pointers */
801 1, /* reset labelKey to 1 */
802 1, /* globals & local static allowed */