2 mcs51 specific general functions.
4 Note that mlh prepended _mcs51_ on the static functions. Makes
5 it easier to set a breakpoint using the debugger.
11 #include "../SDCCutil.h"
13 static char _defaultRules[] =
18 /* list of key words used by msc51 */
19 static char *_mcs51_keywords[] =
50 void mcs51_assignRegisters (eBBlock ** ebbs, int count);
52 static int regParmFlg = 0; /* determine if we can register a parameter */
57 asm_addTree (&asm_asxxxx_mapping);
61 _mcs51_reset_regparm ()
67 _mcs51_regparm (sym_link * l)
69 if (options.parms_in_bank1 == 0) {
70 /* simple can pass only the first parameter in a register */
77 int size = getSize(l);
80 /* first one goes the usual way to DPTR */
81 if (regParmFlg == 0) {
85 /* second one onwards goes to RB1_0 thru RB1_7 */
86 remain = regParmFlg - 4;
87 if (size > (8 - remain)) {
92 return regParmFlg - size + 1;
97 _mcs51_parseOptions (int *pargc, char **argv, int *i)
99 /* TODO: allow port-specific command line options to specify
100 * segment names here.
106 _mcs51_finaliseOptions (void)
108 if (options.noXinitOpt) {
112 if (options.model == MODEL_LARGE) {
113 port->mem.default_local_map = xdata;
114 port->mem.default_globl_map = xdata;
118 port->mem.default_local_map = data;
119 port->mem.default_globl_map = data;
122 if (options.parms_in_bank1) {
123 addSet(&preArgvSet, Safe_strdup("-DSDCC_PARMS_IN_BANK1"));
128 _mcs51_setDefaultOptions (void)
133 _mcs51_getRegName (struct regs *reg)
141 _mcs51_genAssemblerPreamble (FILE * of)
143 if (options.parms_in_bank1) {
145 for (i=0; i < 8 ; i++ )
146 fprintf (of,"b1_%d = 0x%x \n",i,8+i);
151 /* Generate interrupt vector table. */
153 _mcs51_genIVT (FILE * of, symbol ** interrupts, int maxInterrupts)
159 _mcs51_genExtraAreas(FILE *of, bool hasMain)
161 tfprintf (of, "\t!area\n", port->mem.code_name);
162 tfprintf (of, "\t!area\n", "GSINIT0 (CODE)");
163 tfprintf (of, "\t!area\n", "GSINIT1 (CODE)");
164 tfprintf (of, "\t!area\n", "GSINIT2 (CODE)");
165 tfprintf (of, "\t!area\n", "GSINIT3 (CODE)");
166 tfprintf (of, "\t!area\n", "GSINIT4 (CODE)");
167 tfprintf (of, "\t!area\n", "GSINIT5 (CODE)");
171 _mcs51_genInitStartup (FILE *of)
173 tfprintf (of, "\t!global\n", "__sdcc_gsinit_startup");
174 tfprintf (of, "\t!global\n", "__sdcc_program_startup");
175 tfprintf (of, "\t!global\n", "__start__stack");
177 if (options.useXstack)
179 tfprintf (of, "\t!global\n", "__sdcc_init_xstack");
180 tfprintf (of, "\t!global\n", "__start__xstack");
181 fprintf (of, "__start__xstack = 0x%04x", options.xdata_loc);
184 // if the port can copy the XINIT segment to XISEG
190 if (!getenv("SDCC_NOGENRAMCLEAR"))
191 tfprintf (of, "\t!global\n", "__mcs51_genRAMCLEAR");
195 /* Generate code to copy XINIT to XISEG */
196 static void _mcs51_genXINIT (FILE * of) {
197 tfprintf (of, "\t!global\n", "__mcs51_genXINIT");
199 if (!getenv("SDCC_NOGENRAMCLEAR"))
200 tfprintf (of, "\t!global\n", "__mcs51_genXRAMCLEAR");
204 /* Do CSE estimation */
205 static bool cseCostEstimation (iCode *ic, iCode *pdic)
207 operand *result = IC_RESULT(ic);
208 sym_link *result_type = operandType(result);
210 /* if it is a pointer then return ok for now */
211 if (IC_RESULT(ic) && IS_PTR(result_type)) return 1;
213 /* if bitwise | add & subtract then no since mcs51 is pretty good at it
214 so we will cse only if they are local (i.e. both ic & pdic belong to
215 the same basic block */
216 if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') {
217 /* then if they are the same Basic block then ok */
218 if (ic->eBBlockNum == pdic->eBBlockNum) return 1;
222 /* for others it is cheaper to do the cse */
226 /* Indicate which extended bit operations this port supports */
228 hasExtBitOp (int op, int size)
233 || (op == SWAP && size <= 2)
240 /* Indicate the expense of an access to an output storage class */
242 oclsExpense (struct memmap *oclass)
244 if (IN_FARSPACE(oclass))
253 instructionSize(char *inst, char *op1, char *op2)
255 #define ISINST(s) (strncmp(inst, (s), sizeof(s)-1) == 0)
256 #define IS_A(s) (*(s) == 'a' && *(s+1) == '\0')
257 #define IS_C(s) (*(s) == 'c' && *(s+1) == '\0')
258 #define IS_Rn(s) (*(s) == 'r' && *(s+1) >= '0' && *(s+1) <= '7')
259 #define IS_atRi(s) (*(s) == '@' && *(s+1) == 'r')
261 /* Based on the current (2003-08-22) code generation for the
262 small library, the top instruction probability is:
273 /* mov, push, & pop are the 69% of the cases. Check them first! */
276 if (*(inst+3)=='x') return 1; /* movx */
277 if (*(inst+3)=='c') return 1; /* movc */
278 if (IS_C (op1) || IS_C (op2)) return 2;
281 if (IS_Rn (op2) || IS_atRi (op2)) return 1;
284 if (IS_Rn(op1) || IS_atRi(op1))
286 if (IS_A(op2)) return 1;
289 if (strcmp (op1, "dptr") == 0) return 3;
290 if (IS_A (op2) || IS_Rn (op2) || IS_atRi (op2)) return 2;
294 if (ISINST ("push")) return 2;
295 if (ISINST ("pop")) return 2;
297 if (ISINST ("lcall")) return 3;
298 if (ISINST ("ret")) return 1;
299 if (ISINST ("ljmp")) return 3;
300 if (ISINST ("sjmp")) return 2;
301 if (ISINST ("rlc")) return 1;
302 if (ISINST ("rrc")) return 1;
303 if (ISINST ("rl")) return 1;
304 if (ISINST ("rr")) return 1;
305 if (ISINST ("swap")) return 1;
306 if (ISINST ("jc")) return 2;
307 if (ISINST ("jnc")) return 2;
308 if (ISINST ("jb")) return 3;
309 if (ISINST ("jnb")) return 3;
310 if (ISINST ("jbc")) return 3;
311 if (ISINST ("jmp")) return 1; // always jmp @a+dptr
312 if (ISINST ("jz")) return 2;
313 if (ISINST ("jnz")) return 2;
314 if (ISINST ("cjne")) return 3;
315 if (ISINST ("mul")) return 1;
316 if (ISINST ("div")) return 1;
317 if (ISINST ("da")) return 1;
318 if (ISINST ("xchd")) return 1;
319 if (ISINST ("reti")) return 1;
320 if (ISINST ("nop")) return 1;
321 if (ISINST ("acall")) return 2;
322 if (ISINST ("ajmp")) return 2;
325 if (ISINST ("add") || ISINST ("addc") || ISINST ("subb") || ISINST ("xch"))
327 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
330 if (ISINST ("inc") || ISINST ("dec"))
332 if (IS_A(op1) || IS_Rn(op1) || IS_atRi(op1)) return 1;
333 if (strcmp(op1, "dptr") == 0) return 1;
336 if (ISINST ("anl") || ISINST ("orl") || ISINST ("xrl"))
338 if (IS_C(op1)) return 2;
341 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
346 if (IS_A(op2)) return 2;
350 if (ISINST ("clr") || ISINST ("setb") || ISINST ("cpl"))
352 if (IS_A(op1) || IS_C(op1)) return 1;
357 if (IS_Rn(op1)) return 2;
361 /* If the instruction is unrecognized, we shouldn't try to optimize. */
362 /* Return a large value to discourage optimization. */
367 newAsmLineNode (void)
371 aln = Safe_alloc ( sizeof (asmLineNode));
373 aln->regsRead = NULL;
374 aln->regsWritten = NULL;
380 typedef struct mcs51operanddata
388 static mcs51operanddata mcs51operandDataTable[] =
391 {"ab", A_IDX, B_IDX},
405 {"dph", DPH_IDX, -1},
406 {"dpl", DPL_IDX, -1},
407 {"dptr", DPL_IDX, DPH_IDX},
412 {"psw", CND_IDX, -1},
424 mcs51operandCompare (const void *key, const void *member)
426 return strcmp((const char *)key, ((mcs51operanddata *)member)->name);
430 updateOpRW (asmLineNode *aln, char *op, char *optype)
432 mcs51operanddata *opdat;
435 dot = strchr(op, '.');
439 opdat = bsearch (op, mcs51operandDataTable,
440 sizeof(mcs51operandDataTable)/sizeof(mcs51operanddata),
441 sizeof(mcs51operanddata), mcs51operandCompare);
443 if (opdat && strchr(optype,'r'))
445 if (opdat->regIdx1 >= 0)
446 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx1);
447 if (opdat->regIdx2 >= 0)
448 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx2);
450 if (opdat && strchr(optype,'w'))
452 if (opdat->regIdx1 >= 0)
453 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx1);
454 if (opdat->regIdx2 >= 0)
455 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx2);
459 if (!strcmp(op, "@r0"))
460 aln->regsRead = bitVectSetBit (aln->regsRead, R0_IDX);
461 if (!strcmp(op, "@r1"))
462 aln->regsRead = bitVectSetBit (aln->regsRead, R1_IDX);
463 if (strstr(op, "dptr"))
465 aln->regsRead = bitVectSetBit (aln->regsRead, DPL_IDX);
466 aln->regsRead = bitVectSetBit (aln->regsRead, DPH_IDX);
468 if (strstr(op, "a+"))
469 aln->regsRead = bitVectSetBit (aln->regsRead, A_IDX);
473 typedef struct mcs51opcodedata
483 static mcs51opcodedata mcs51opcodeDataTable[] =
485 {"acall","j", "", "", ""},
486 {"ajmp", "j", "", "", ""},
487 {"add", "", "w", "rw", "r"},
488 {"addc", "", "rw", "rw", "r"},
489 {"anl", "", "", "rw", "r"},
490 {"cjne", "j", "w", "r", "r"},
491 {"clr", "", "", "w", ""},
492 {"cpl", "", "", "rw", ""},
493 {"da", "", "rw", "rw", ""},
494 {"dec", "", "", "rw", ""},
495 {"div", "", "w", "rw", ""},
496 {"djnz", "j", "", "rw", ""},
497 {"inc", "", "", "rw", ""},
498 {"jb", "j", "", "r", ""},
499 {"jbc", "j", "", "rw", ""},
500 {"jc", "j", "", "", ""},
501 {"jmp", "j", "", "", ""},
502 {"jnb", "j", "", "r", ""},
503 {"jnc", "j", "", "", ""},
504 {"jnz", "j", "", "", ""},
505 {"jz", "j", "", "", ""},
506 {"lcall","j", "", "", ""},
507 {"ljmp", "j", "", "", ""},
508 {"mov", "", "", "w", "r"},
509 {"movc", "", "", "w", "r"},
510 {"movx", "", "", "w", "r"},
511 {"mul", "", "w", "rw", ""},
512 {"nop", "", "", "", ""},
513 {"orl", "", "", "rw", "r"},
514 {"pop", "", "", "w", ""},
515 {"push", "", "", "r", ""},
516 {"ret", "j", "", "", ""},
517 {"reti", "j", "", "", ""},
518 {"rl", "", "", "rw", ""},
519 {"rlc", "", "rw", "rw", ""},
520 {"rr", "", "", "rw", ""},
521 {"rrc", "", "rw", "rw", ""},
522 {"setb", "", "", "w", ""},
523 {"sjmp", "j", "", "", ""},
524 {"subb", "", "rw", "rw", "r"},
525 {"swap", "", "", "rw", ""},
526 {"xch", "", "", "rw", "rw"},
527 {"xchd", "", "", "rw", "rw"},
528 {"xrl", "", "", "rw", "r"},
532 mcs51opcodeCompare (const void *key, const void *member)
534 return strcmp((const char *)key, ((mcs51opcodedata *)member)->name);
538 asmLineNodeFromLineNode (lineNode *ln)
540 asmLineNode *aln = newAsmLineNode();
541 char *op, op1[256], op2[256];
545 mcs51opcodedata *opdat;
549 while (*p && isspace(*p)) p++;
550 for (op = inst, opsize=1; *p; p++)
552 if (isspace(*p) || *p == ';' || *p == ':' || *p == '=')
555 if (opsize < sizeof(inst))
556 *op++ = tolower(*p), opsize++;
560 if (*p == ';' || *p == ':' || *p == '=')
563 while (*p && isspace(*p)) p++;
567 for (op = op1, opsize=1; *p && *p != ','; p++)
569 if (!isspace(*p) && opsize < sizeof(op1))
570 *op++ = tolower(*p), opsize++;
575 for (op = op2, opsize=1; *p && *p != ','; p++)
577 if (!isspace(*p) && opsize < sizeof(op2))
578 *op++ = tolower(*p), opsize++;
582 aln->size = instructionSize(inst, op1, op2);
584 aln->regsRead = newBitVect (END_IDX);
585 aln->regsWritten = newBitVect (END_IDX);
587 opdat = bsearch (inst, mcs51opcodeDataTable,
588 sizeof(mcs51opcodeDataTable)/sizeof(mcs51opcodedata),
589 sizeof(mcs51opcodedata), mcs51opcodeCompare);
593 updateOpRW (aln, op1, opdat->op1type);
594 updateOpRW (aln, op2, opdat->op2type);
595 if (strchr(opdat->pswtype,'r'))
596 aln->regsRead = bitVectSetBit (aln->regsRead, CND_IDX);
597 if (strchr(opdat->pswtype,'w'))
598 aln->regsWritten = bitVectSetBit (aln->regsWritten, CND_IDX);
605 getInstructionSize (lineNode *line)
608 line->aln = asmLineNodeFromLineNode (line);
610 return line->aln->size;
614 getRegsRead (lineNode *line)
617 line->aln = asmLineNodeFromLineNode (line);
619 return line->aln->regsRead;
623 getRegsWritten (lineNode *line)
626 line->aln = asmLineNodeFromLineNode (line);
628 return line->aln->regsWritten;
632 /** $1 is always the basename.
633 $2 is always the output file.
635 $l is the list of extra options that should be there somewhere...
636 MUST be terminated with a NULL.
638 static const char *_linkCmd[] =
640 "aslink", "-nf", "\"$1\"", NULL
643 /* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */
644 static const char *_asmCmd[] =
646 "asx8051", "$l", "$3", "\"$1.asm\"", NULL
654 "MCU 8051", /* Target name */
655 NULL, /* Processor name */
658 TRUE, /* Emit glue around main */
659 MODEL_SMALL | MODEL_LARGE,
665 "-plosgffc", /* Options with debug */
666 "-plosgff", /* Options without debug */
669 NULL /* no do_assemble function */
685 /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */
686 1, 2, 2, 4, 1, 2, 3, 1, 4, 4
701 "XISEG (XDATA)", // initialized xdata
702 "XINIT (CODE)", // a code copy of xiseg
707 { _mcs51_genExtraAreas, NULL },
711 /* mcs51 has an 8 bit mul */
716 mcs51_emitDebuggerSymbol
723 _mcs51_finaliseOptions,
724 _mcs51_setDefaultOptions,
725 mcs51_assignRegisters,
728 _mcs51_genAssemblerPreamble,
729 NULL, /* no genAssemblerEnd */
732 _mcs51_genInitStartup,
733 _mcs51_reset_regparm,
738 hasExtBitOp, /* hasExtBitOp */
739 oclsExpense, /* oclsExpense */
741 TRUE, /* little endian */
744 1, /* transform <= to ! > */
745 1, /* transform >= to ! < */
746 1, /* transform != to !(a == b) */
748 FALSE, /* No array initializer support. */
750 NULL, /* no builtin functions */
751 GPOINTER, /* treat unqualified pointers as "generic" pointers */
752 1, /* reset labelKey to 1 */
753 1, /* globals & local static allowed */