2 mcs51 specific general functions.
4 Note that mlh prepended _mcs51_ on the static functions. Makes
5 it easier to set a breakpoint using the debugger.
11 #include "dbuf_string.h"
12 #include "../SDCCutil.h"
14 static char _defaultRules[] =
19 /* list of key words used by msc51 */
20 static char *_mcs51_keywords[] =
54 void mcs51_assignRegisters (ebbIndex *);
56 static int regParmFlg = 0; /* determine if we can register a parameter */
57 static int regBitParmFlg = 0; /* determine if we can register a bit parameter */
62 asm_addTree (&asm_asxxxx_mapping);
66 _mcs51_reset_regparm (void)
73 _mcs51_regparm (sym_link * l, bool reentrant)
75 if (IS_SPEC(l) && (SPEC_NOUN(l) == V_BIT)) {
76 /* bit parameters go to b0 thru b7 */
77 if (reentrant && (regBitParmFlg < 8)) {
79 return 12 + regBitParmFlg;
83 if (options.parms_in_bank1 == 0) {
84 /* simple can pass only the first parameter in a register */
91 int size = getSize(l);
94 /* first one goes the usual way to DPTR */
95 if (regParmFlg == 0) {
99 /* second one onwards goes to RB1_0 thru RB1_7 */
100 remain = regParmFlg - 4;
101 if (size > (8 - remain)) {
106 return regParmFlg - size + 1;
111 _mcs51_parseOptions (int *pargc, char **argv, int *i)
113 /* TODO: allow port-specific command line options to specify
114 * segment names here.
120 _mcs51_finaliseOptions (void)
122 if (options.noXinitOpt) {
126 switch (options.model)
129 port->mem.default_local_map = data;
130 port->mem.default_globl_map = data;
131 port->s.gptr_size = 3;
134 port->mem.default_local_map = pdata;
135 port->mem.default_globl_map = pdata;
136 port->s.gptr_size = 3;
139 port->mem.default_local_map = xdata;
140 port->mem.default_globl_map = xdata;
141 port->s.gptr_size = 3;
144 port->mem.default_local_map = data;
145 port->mem.default_globl_map = data;
149 if (options.parms_in_bank1) {
150 addSet(&preArgvSet, Safe_strdup("-DSDCC_PARMS_IN_BANK1"));
155 _mcs51_setDefaultOptions (void)
160 _mcs51_getRegName (struct regs *reg)
168 _mcs51_genAssemblerPreamble (FILE * of)
170 if (options.parms_in_bank1) {
172 for (i=0; i < 8 ; i++ )
173 fprintf (of,"b1_%d = 0x%x \n",i,8+i);
177 /* Generate interrupt vector table. */
179 _mcs51_genIVT (struct dbuf_s * oBuf, symbol ** interrupts, int maxInterrupts)
183 dbuf_printf (oBuf, "\tljmp\t__sdcc_gsinit_startup\n");
185 /* now for the other interrupts */
186 for (i = 0; i < maxInterrupts; i++)
190 dbuf_printf (oBuf, "\tljmp\t%s\n", interrupts[i]->rname);
191 if ( i != maxInterrupts - 1 )
192 dbuf_printf (oBuf, "\t.ds\t5\n");
196 dbuf_printf (oBuf, "\treti\n");
197 if ( i != maxInterrupts - 1 )
198 dbuf_printf (oBuf, "\t.ds\t7\n");
205 _mcs51_genExtraAreas(FILE *of, bool hasMain)
207 tfprintf (of, "\t!area\n", HOME_NAME);
208 tfprintf (of, "\t!area\n", "GSINIT0 (CODE)");
209 tfprintf (of, "\t!area\n", "GSINIT1 (CODE)");
210 tfprintf (of, "\t!area\n", "GSINIT2 (CODE)");
211 tfprintf (of, "\t!area\n", "GSINIT3 (CODE)");
212 tfprintf (of, "\t!area\n", "GSINIT4 (CODE)");
213 tfprintf (of, "\t!area\n", "GSINIT5 (CODE)");
214 tfprintf (of, "\t!area\n", STATIC_NAME);
215 tfprintf (of, "\t!area\n", port->mem.post_static_name);
216 tfprintf (of, "\t!area\n", CODE_NAME);
220 _mcs51_genInitStartup (FILE *of)
222 tfprintf (of, "\t!global\n", "__sdcc_gsinit_startup");
223 tfprintf (of, "\t!global\n", "__sdcc_program_startup");
224 tfprintf (of, "\t!global\n", "__start__stack");
226 if (options.useXstack)
228 tfprintf (of, "\t!global\n", "__sdcc_init_xstack");
229 tfprintf (of, "\t!global\n", "__start__xstack");
232 // if the port can copy the XINIT segment to XISEG
238 if (!getenv("SDCC_NOGENRAMCLEAR"))
239 tfprintf (of, "\t!global\n", "__mcs51_genRAMCLEAR");
243 /* Generate code to copy XINIT to XISEG */
244 static void _mcs51_genXINIT (FILE * of) {
245 tfprintf (of, "\t!global\n", "__mcs51_genXINIT");
247 if (!getenv("SDCC_NOGENRAMCLEAR"))
248 tfprintf (of, "\t!global\n", "__mcs51_genXRAMCLEAR");
252 /* Do CSE estimation */
253 static bool cseCostEstimation (iCode *ic, iCode *pdic)
255 operand *result = IC_RESULT(ic);
256 sym_link *result_type = operandType(result);
258 /* if it is a pointer then return ok for now */
259 if (IC_RESULT(ic) && IS_PTR(result_type)) return 1;
261 /* if bitwise | add & subtract then no since mcs51 is pretty good at it
262 so we will cse only if they are local (i.e. both ic & pdic belong to
263 the same basic block */
264 if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') {
265 /* then if they are the same Basic block then ok */
266 if (ic->eBBlockNum == pdic->eBBlockNum) return 1;
270 /* for others it is cheaper to do the cse */
274 /* Indicate which extended bit operations this port supports */
276 hasExtBitOp (int op, int size)
284 || (op == SWAP && size <= 2)
291 /* Indicate the expense of an access to an output storage class */
293 oclsExpense (struct memmap *oclass)
295 if (IN_FARSPACE(oclass))
304 instructionSize(char *inst, char *op1, char *op2)
306 #define ISINST(s) (strncmp(inst, (s), sizeof(s)-1) == 0)
307 #define IS_A(s) (*(s) == 'a' && *(s+1) == '\0')
308 #define IS_C(s) (*(s) == 'c' && *(s+1) == '\0')
309 #define IS_Rn(s) (*(s) == 'r' && *(s+1) >= '0' && *(s+1) <= '7')
310 #define IS_atRi(s) (*(s) == '@' && *(s+1) == 'r')
312 /* Based on the current (2003-08-22) code generation for the
313 small library, the top instruction probability is:
324 /* mov, push, & pop are the 69% of the cases. Check them first! */
327 if (*(inst+3)=='x') return 1; /* movx */
328 if (*(inst+3)=='c') return 1; /* movc */
329 if (IS_C (op1) || IS_C (op2)) return 2;
332 if (IS_Rn (op2) || IS_atRi (op2)) return 1;
335 if (IS_Rn(op1) || IS_atRi(op1))
337 if (IS_A(op2)) return 1;
340 if (strcmp (op1, "dptr") == 0) return 3;
341 if (IS_A (op2) || IS_Rn (op2) || IS_atRi (op2)) return 2;
345 if (ISINST ("push")) return 2;
346 if (ISINST ("pop")) return 2;
348 if (ISINST ("lcall")) return 3;
349 if (ISINST ("ret")) return 1;
350 if (ISINST ("ljmp")) return 3;
351 if (ISINST ("sjmp")) return 2;
352 if (ISINST ("rlc")) return 1;
353 if (ISINST ("rrc")) return 1;
354 if (ISINST ("rl")) return 1;
355 if (ISINST ("rr")) return 1;
356 if (ISINST ("swap")) return 1;
357 if (ISINST ("jc")) return 2;
358 if (ISINST ("jnc")) return 2;
359 if (ISINST ("jb")) return 3;
360 if (ISINST ("jnb")) return 3;
361 if (ISINST ("jbc")) return 3;
362 if (ISINST ("jmp")) return 1; // always jmp @a+dptr
363 if (ISINST ("jz")) return 2;
364 if (ISINST ("jnz")) return 2;
365 if (ISINST ("cjne")) return 3;
366 if (ISINST ("mul")) return 1;
367 if (ISINST ("div")) return 1;
368 if (ISINST ("da")) return 1;
369 if (ISINST ("xchd")) return 1;
370 if (ISINST ("reti")) return 1;
371 if (ISINST ("nop")) return 1;
372 if (ISINST ("acall")) return 2;
373 if (ISINST ("ajmp")) return 2;
376 if (ISINST ("add") || ISINST ("addc") || ISINST ("subb") || ISINST ("xch"))
378 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
381 if (ISINST ("inc") || ISINST ("dec"))
383 if (IS_A(op1) || IS_Rn(op1) || IS_atRi(op1)) return 1;
384 if (strcmp(op1, "dptr") == 0) return 1;
387 if (ISINST ("anl") || ISINST ("orl") || ISINST ("xrl"))
389 if (IS_C(op1)) return 2;
392 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
397 if (IS_A(op2)) return 2;
401 if (ISINST ("clr") || ISINST ("setb") || ISINST ("cpl"))
403 if (IS_A(op1) || IS_C(op1)) return 1;
408 if (IS_Rn(op1)) return 2;
412 /* If the instruction is unrecognized, we shouldn't try to optimize. */
413 /* Return a large value to discourage optimization. */
418 newAsmLineNode (void)
422 aln = Safe_alloc ( sizeof (asmLineNode));
424 aln->regsRead = NULL;
425 aln->regsWritten = NULL;
431 typedef struct mcs51operanddata
439 static mcs51operanddata mcs51operandDataTable[] =
442 {"ab", A_IDX, B_IDX},
456 {"dph", DPH_IDX, -1},
457 {"dpl", DPL_IDX, -1},
458 {"dptr", DPL_IDX, DPH_IDX},
463 {"psw", CND_IDX, -1},
475 mcs51operandCompare (const void *key, const void *member)
477 return strcmp((const char *)key, ((mcs51operanddata *)member)->name);
481 updateOpRW (asmLineNode *aln, char *op, char *optype)
483 mcs51operanddata *opdat;
486 dot = strchr(op, '.');
490 opdat = bsearch (op, mcs51operandDataTable,
491 sizeof(mcs51operandDataTable)/sizeof(mcs51operanddata),
492 sizeof(mcs51operanddata), mcs51operandCompare);
494 if (opdat && strchr(optype,'r'))
496 if (opdat->regIdx1 >= 0)
497 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx1);
498 if (opdat->regIdx2 >= 0)
499 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx2);
501 if (opdat && strchr(optype,'w'))
503 if (opdat->regIdx1 >= 0)
504 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx1);
505 if (opdat->regIdx2 >= 0)
506 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx2);
510 if (!strcmp(op, "@r0"))
511 aln->regsRead = bitVectSetBit (aln->regsRead, R0_IDX);
512 if (!strcmp(op, "@r1"))
513 aln->regsRead = bitVectSetBit (aln->regsRead, R1_IDX);
514 if (strstr(op, "dptr"))
516 aln->regsRead = bitVectSetBit (aln->regsRead, DPL_IDX);
517 aln->regsRead = bitVectSetBit (aln->regsRead, DPH_IDX);
519 if (strstr(op, "a+"))
520 aln->regsRead = bitVectSetBit (aln->regsRead, A_IDX);
524 typedef struct mcs51opcodedata
534 static mcs51opcodedata mcs51opcodeDataTable[] =
536 {"acall","j", "", "", ""},
537 {"add", "", "w", "rw", "r"},
538 {"addc", "", "rw", "rw", "r"},
539 {"ajmp", "j", "", "", ""},
540 {"anl", "", "", "rw", "r"},
541 {"cjne", "j", "w", "r", "r"},
542 {"clr", "", "", "w", ""},
543 {"cpl", "", "", "rw", ""},
544 {"da", "", "rw", "rw", ""},
545 {"dec", "", "", "rw", ""},
546 {"div", "", "w", "rw", ""},
547 {"djnz", "j", "", "rw", ""},
548 {"inc", "", "", "rw", ""},
549 {"jb", "j", "", "r", ""},
550 {"jbc", "j", "", "rw", ""},
551 {"jc", "j", "", "", ""},
552 {"jmp", "j", "", "", ""},
553 {"jnb", "j", "", "r", ""},
554 {"jnc", "j", "", "", ""},
555 {"jnz", "j", "", "", ""},
556 {"jz", "j", "", "", ""},
557 {"lcall","j", "", "", ""},
558 {"ljmp", "j", "", "", ""},
559 {"mov", "", "", "w", "r"},
560 {"movc", "", "", "w", "r"},
561 {"movx", "", "", "w", "r"},
562 {"mul", "", "w", "rw", ""},
563 {"nop", "", "", "", ""},
564 {"orl", "", "", "rw", "r"},
565 {"pop", "", "", "w", ""},
566 {"push", "", "", "r", ""},
567 {"ret", "j", "", "", ""},
568 {"reti", "j", "", "", ""},
569 {"rl", "", "", "rw", ""},
570 {"rlc", "", "rw", "rw", ""},
571 {"rr", "", "", "rw", ""},
572 {"rrc", "", "rw", "rw", ""},
573 {"setb", "", "", "w", ""},
574 {"sjmp", "j", "", "", ""},
575 {"subb", "", "rw", "rw", "r"},
576 {"swap", "", "", "rw", ""},
577 {"xch", "", "", "rw", "rw"},
578 {"xchd", "", "", "rw", "rw"},
579 {"xrl", "", "", "rw", "r"},
583 mcs51opcodeCompare (const void *key, const void *member)
585 return strcmp((const char *)key, ((mcs51opcodedata *)member)->name);
589 asmLineNodeFromLineNode (lineNode *ln)
591 asmLineNode *aln = newAsmLineNode();
592 char *op, op1[256], op2[256];
596 mcs51opcodedata *opdat;
600 while (*p && isspace(*p)) p++;
601 for (op = inst, opsize=1; *p; p++)
603 if (isspace(*p) || *p == ';' || *p == ':' || *p == '=')
606 if (opsize < sizeof(inst))
607 *op++ = tolower(*p), opsize++;
611 if (*p == ';' || *p == ':' || *p == '=')
614 while (*p && isspace(*p)) p++;
618 for (op = op1, opsize=1; *p && *p != ','; p++)
620 if (!isspace(*p) && opsize < sizeof(op1))
621 *op++ = tolower(*p), opsize++;
626 for (op = op2, opsize=1; *p && *p != ','; p++)
628 if (!isspace(*p) && opsize < sizeof(op2))
629 *op++ = tolower(*p), opsize++;
633 aln->size = instructionSize(inst, op1, op2);
635 aln->regsRead = newBitVect (END_IDX);
636 aln->regsWritten = newBitVect (END_IDX);
638 opdat = bsearch (inst, mcs51opcodeDataTable,
639 sizeof(mcs51opcodeDataTable)/sizeof(mcs51opcodedata),
640 sizeof(mcs51opcodedata), mcs51opcodeCompare);
644 updateOpRW (aln, op1, opdat->op1type);
645 updateOpRW (aln, op2, opdat->op2type);
646 if (strchr(opdat->pswtype,'r'))
647 aln->regsRead = bitVectSetBit (aln->regsRead, CND_IDX);
648 if (strchr(opdat->pswtype,'w'))
649 aln->regsWritten = bitVectSetBit (aln->regsWritten, CND_IDX);
656 getInstructionSize (lineNode *line)
659 line->aln = asmLineNodeFromLineNode (line);
661 return line->aln->size;
665 getRegsRead (lineNode *line)
668 line->aln = asmLineNodeFromLineNode (line);
670 return line->aln->regsRead;
674 getRegsWritten (lineNode *line)
677 line->aln = asmLineNodeFromLineNode (line);
679 return line->aln->regsWritten;
683 /** $1 is always the basename.
684 $2 is always the output file.
686 $l is the list of extra options that should be there somewhere...
687 MUST be terminated with a NULL.
689 static const char *_linkCmd[] =
691 "aslink", "-nf", "\"$1\"", NULL
694 /* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */
695 static const char *_asmCmd[] =
697 "asx8051", "$l", "$3", "\"$1.asm\"", NULL
705 "MCU 8051", /* Target name */
706 NULL, /* Processor name */
709 TRUE, /* Emit glue around main */
710 MODEL_SMALL | MODEL_MEDIUM | MODEL_LARGE,
716 "-plosgffc", /* Options with debug */
717 "-plosgff", /* Options without debug */
720 NULL /* no do_assemble function */
737 /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */
738 1, 2, 2, 4, 1, 2, 3, 1, 4, 4
740 /* tags for generic pointers */
741 { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */
743 "XSTK (PAG,XDATA)", // xstack_name
744 "STACK (DATA)", // istack_name
745 "CSEG (CODE)", // code_name
746 "DSEG (DATA)", // data_name
747 "ISEG (DATA)", // idata_name
748 "PSEG (PAG,XDATA)", // pdata_name
749 "XSEG (XDATA)", // xdata_name
750 "BSEG (BIT)", // bit_name
751 "RSEG (DATA)", // reg_name
752 "GSINIT (CODE)", // static_name
753 "OSEG (OVR,DATA)", // overlay_name
754 "GSFINAL (CODE)", // post_static_name
755 "HOME (CODE)", // home_name
756 "XISEG (XDATA)", // xidata_name - initialized xdata initialized xdata
757 "XINIT (CODE)", // xinit_name - a code copy of xiseg
758 "CONST (CODE)", // const_name - const data (code or not)
759 "CABS (ABS,CODE)", // cabs_name - const absolute data (code or not)
760 "XABS (ABS,XDATA)", // xabs_name - absolute xdata/pdata
761 "IABS (ABS,DATA)", // iabs_name - absolute idata/data
766 { _mcs51_genExtraAreas, NULL },
768 +1, /* direction (+1 = stack grows up) */
769 0, /* bank_overhead (switch between register banks) */
770 4, /* isr_overhead */
771 1, /* call_overhead (2 for return address - 1 for pre-incrementing push */
772 1, /* reent_overhead */
773 0 /* banked_overhead (switch between code banks) */
776 /* mcs51 has an 8 bit mul */
780 mcs51_emitDebuggerSymbol
784 2, /* sizeofElement */
785 {6,9,15}, /* sizeofMatchJump[] */
786 {9,18,36}, /* sizeofRangeCompare[] */
787 4, /* sizeofSubtract */
788 6, /* sizeofDispatch */
795 _mcs51_finaliseOptions,
796 _mcs51_setDefaultOptions,
797 mcs51_assignRegisters,
800 _mcs51_genAssemblerPreamble,
801 NULL, /* no genAssemblerEnd */
804 _mcs51_genInitStartup,
805 _mcs51_reset_regparm,
810 hasExtBitOp, /* hasExtBitOp */
811 oclsExpense, /* oclsExpense */
813 TRUE, /* little endian */
816 1, /* transform <= to ! > */
817 1, /* transform >= to ! < */
818 1, /* transform != to !(a == b) */
820 FALSE, /* No array initializer support. */
822 NULL, /* no builtin functions */
823 GPOINTER, /* treat unqualified pointers as "generic" pointers */
824 1, /* reset labelKey to 1 */
825 1, /* globals & local static allowed */