2 mcs51 specific general functions.
4 Note that mlh prepended _mcs51_ on the static functions. Makes
5 it easier to set a breakpoint using the debugger.
11 #include "../SDCCutil.h"
13 static char _defaultRules[] =
18 /* list of key words used by msc51 */
19 static char *_mcs51_keywords[] =
50 void mcs51_assignRegisters (ebbIndex *);
52 static int regParmFlg = 0; /* determine if we can register a parameter */
57 asm_addTree (&asm_asxxxx_mapping);
61 _mcs51_reset_regparm (void)
67 _mcs51_regparm (sym_link * l)
69 if (IS_SPEC(l) && (SPEC_NOUN(l) == V_BIT))
71 if (options.parms_in_bank1 == 0) {
72 /* simple can pass only the first parameter in a register */
79 int size = getSize(l);
82 /* first one goes the usual way to DPTR */
83 if (regParmFlg == 0) {
87 /* second one onwards goes to RB1_0 thru RB1_7 */
88 remain = regParmFlg - 4;
89 if (size > (8 - remain)) {
94 return regParmFlg - size + 1;
99 _mcs51_parseOptions (int *pargc, char **argv, int *i)
101 /* TODO: allow port-specific command line options to specify
102 * segment names here.
108 _mcs51_finaliseOptions (void)
110 if (options.noXinitOpt) {
114 if (options.model == MODEL_LARGE) {
115 port->mem.default_local_map = xdata;
116 port->mem.default_globl_map = xdata;
120 port->mem.default_local_map = data;
121 port->mem.default_globl_map = data;
124 if (options.parms_in_bank1) {
125 addSet(&preArgvSet, Safe_strdup("-DSDCC_PARMS_IN_BANK1"));
130 _mcs51_setDefaultOptions (void)
135 _mcs51_getRegName (struct regs *reg)
143 _mcs51_genAssemblerPreamble (FILE * of)
145 if (options.parms_in_bank1) {
147 for (i=0; i < 8 ; i++ )
148 fprintf (of,"b1_%d = 0x%x \n",i,8+i);
152 /* Generate interrupt vector table. */
154 _mcs51_genIVT (FILE * of, symbol ** interrupts, int maxInterrupts)
158 fprintf (of, "\tljmp\t__sdcc_gsinit_startup\n");
160 /* now for the other interrupts */
161 for (i = 0; i < maxInterrupts; i++)
165 fprintf (of, "\tljmp\t%s\n", interrupts[i]->rname);
166 if ( i != maxInterrupts - 1 )
167 fprintf (of, "\t.ds\t5\n");
171 fprintf (of, "\treti\n");
172 if ( i != maxInterrupts - 1 )
173 fprintf (of, "\t.ds\t7\n");
180 _mcs51_genExtraAreas(FILE *of, bool hasMain)
182 tfprintf (of, "\t!area\n", port->mem.code_name);
183 tfprintf (of, "\t!area\n", "GSINIT0 (CODE)");
184 tfprintf (of, "\t!area\n", "GSINIT1 (CODE)");
185 tfprintf (of, "\t!area\n", "GSINIT2 (CODE)");
186 tfprintf (of, "\t!area\n", "GSINIT3 (CODE)");
187 tfprintf (of, "\t!area\n", "GSINIT4 (CODE)");
188 tfprintf (of, "\t!area\n", "GSINIT5 (CODE)");
192 _mcs51_genInitStartup (FILE *of)
194 tfprintf (of, "\t!global\n", "__sdcc_gsinit_startup");
195 tfprintf (of, "\t!global\n", "__sdcc_program_startup");
196 tfprintf (of, "\t!global\n", "__start__stack");
198 if (options.useXstack)
200 tfprintf (of, "\t!global\n", "__sdcc_init_xstack");
201 tfprintf (of, "\t!global\n", "__start__xstack");
204 // if the port can copy the XINIT segment to XISEG
210 if (!getenv("SDCC_NOGENRAMCLEAR"))
211 tfprintf (of, "\t!global\n", "__mcs51_genRAMCLEAR");
215 /* Generate code to copy XINIT to XISEG */
216 static void _mcs51_genXINIT (FILE * of) {
217 tfprintf (of, "\t!global\n", "__mcs51_genXINIT");
219 if (!getenv("SDCC_NOGENRAMCLEAR"))
220 tfprintf (of, "\t!global\n", "__mcs51_genXRAMCLEAR");
224 /* Do CSE estimation */
225 static bool cseCostEstimation (iCode *ic, iCode *pdic)
227 operand *result = IC_RESULT(ic);
228 sym_link *result_type = operandType(result);
230 /* if it is a pointer then return ok for now */
231 if (IC_RESULT(ic) && IS_PTR(result_type)) return 1;
233 /* if bitwise | add & subtract then no since mcs51 is pretty good at it
234 so we will cse only if they are local (i.e. both ic & pdic belong to
235 the same basic block */
236 if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') {
237 /* then if they are the same Basic block then ok */
238 if (ic->eBBlockNum == pdic->eBBlockNum) return 1;
242 /* for others it is cheaper to do the cse */
246 /* Indicate which extended bit operations this port supports */
248 hasExtBitOp (int op, int size)
253 || (op == SWAP && size <= 2)
260 /* Indicate the expense of an access to an output storage class */
262 oclsExpense (struct memmap *oclass)
264 if (IN_FARSPACE(oclass))
273 instructionSize(char *inst, char *op1, char *op2)
275 #define ISINST(s) (strncmp(inst, (s), sizeof(s)-1) == 0)
276 #define IS_A(s) (*(s) == 'a' && *(s+1) == '\0')
277 #define IS_C(s) (*(s) == 'c' && *(s+1) == '\0')
278 #define IS_Rn(s) (*(s) == 'r' && *(s+1) >= '0' && *(s+1) <= '7')
279 #define IS_atRi(s) (*(s) == '@' && *(s+1) == 'r')
281 /* Based on the current (2003-08-22) code generation for the
282 small library, the top instruction probability is:
293 /* mov, push, & pop are the 69% of the cases. Check them first! */
296 if (*(inst+3)=='x') return 1; /* movx */
297 if (*(inst+3)=='c') return 1; /* movc */
298 if (IS_C (op1) || IS_C (op2)) return 2;
301 if (IS_Rn (op2) || IS_atRi (op2)) return 1;
304 if (IS_Rn(op1) || IS_atRi(op1))
306 if (IS_A(op2)) return 1;
309 if (strcmp (op1, "dptr") == 0) return 3;
310 if (IS_A (op2) || IS_Rn (op2) || IS_atRi (op2)) return 2;
314 if (ISINST ("push")) return 2;
315 if (ISINST ("pop")) return 2;
317 if (ISINST ("lcall")) return 3;
318 if (ISINST ("ret")) return 1;
319 if (ISINST ("ljmp")) return 3;
320 if (ISINST ("sjmp")) return 2;
321 if (ISINST ("rlc")) return 1;
322 if (ISINST ("rrc")) return 1;
323 if (ISINST ("rl")) return 1;
324 if (ISINST ("rr")) return 1;
325 if (ISINST ("swap")) return 1;
326 if (ISINST ("jc")) return 2;
327 if (ISINST ("jnc")) return 2;
328 if (ISINST ("jb")) return 3;
329 if (ISINST ("jnb")) return 3;
330 if (ISINST ("jbc")) return 3;
331 if (ISINST ("jmp")) return 1; // always jmp @a+dptr
332 if (ISINST ("jz")) return 2;
333 if (ISINST ("jnz")) return 2;
334 if (ISINST ("cjne")) return 3;
335 if (ISINST ("mul")) return 1;
336 if (ISINST ("div")) return 1;
337 if (ISINST ("da")) return 1;
338 if (ISINST ("xchd")) return 1;
339 if (ISINST ("reti")) return 1;
340 if (ISINST ("nop")) return 1;
341 if (ISINST ("acall")) return 2;
342 if (ISINST ("ajmp")) return 2;
345 if (ISINST ("add") || ISINST ("addc") || ISINST ("subb") || ISINST ("xch"))
347 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
350 if (ISINST ("inc") || ISINST ("dec"))
352 if (IS_A(op1) || IS_Rn(op1) || IS_atRi(op1)) return 1;
353 if (strcmp(op1, "dptr") == 0) return 1;
356 if (ISINST ("anl") || ISINST ("orl") || ISINST ("xrl"))
358 if (IS_C(op1)) return 2;
361 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
366 if (IS_A(op2)) return 2;
370 if (ISINST ("clr") || ISINST ("setb") || ISINST ("cpl"))
372 if (IS_A(op1) || IS_C(op1)) return 1;
377 if (IS_Rn(op1)) return 2;
381 /* If the instruction is unrecognized, we shouldn't try to optimize. */
382 /* Return a large value to discourage optimization. */
387 newAsmLineNode (void)
391 aln = Safe_alloc ( sizeof (asmLineNode));
393 aln->regsRead = NULL;
394 aln->regsWritten = NULL;
400 typedef struct mcs51operanddata
408 static mcs51operanddata mcs51operandDataTable[] =
411 {"ab", A_IDX, B_IDX},
425 {"dph", DPH_IDX, -1},
426 {"dpl", DPL_IDX, -1},
427 {"dptr", DPL_IDX, DPH_IDX},
432 {"psw", CND_IDX, -1},
444 mcs51operandCompare (const void *key, const void *member)
446 return strcmp((const char *)key, ((mcs51operanddata *)member)->name);
450 updateOpRW (asmLineNode *aln, char *op, char *optype)
452 mcs51operanddata *opdat;
455 dot = strchr(op, '.');
459 opdat = bsearch (op, mcs51operandDataTable,
460 sizeof(mcs51operandDataTable)/sizeof(mcs51operanddata),
461 sizeof(mcs51operanddata), mcs51operandCompare);
463 if (opdat && strchr(optype,'r'))
465 if (opdat->regIdx1 >= 0)
466 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx1);
467 if (opdat->regIdx2 >= 0)
468 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx2);
470 if (opdat && strchr(optype,'w'))
472 if (opdat->regIdx1 >= 0)
473 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx1);
474 if (opdat->regIdx2 >= 0)
475 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx2);
479 if (!strcmp(op, "@r0"))
480 aln->regsRead = bitVectSetBit (aln->regsRead, R0_IDX);
481 if (!strcmp(op, "@r1"))
482 aln->regsRead = bitVectSetBit (aln->regsRead, R1_IDX);
483 if (strstr(op, "dptr"))
485 aln->regsRead = bitVectSetBit (aln->regsRead, DPL_IDX);
486 aln->regsRead = bitVectSetBit (aln->regsRead, DPH_IDX);
488 if (strstr(op, "a+"))
489 aln->regsRead = bitVectSetBit (aln->regsRead, A_IDX);
493 typedef struct mcs51opcodedata
503 static mcs51opcodedata mcs51opcodeDataTable[] =
505 {"acall","j", "", "", ""},
506 {"add", "", "w", "rw", "r"},
507 {"addc", "", "rw", "rw", "r"},
508 {"ajmp", "j", "", "", ""},
509 {"anl", "", "", "rw", "r"},
510 {"cjne", "j", "w", "r", "r"},
511 {"clr", "", "", "w", ""},
512 {"cpl", "", "", "rw", ""},
513 {"da", "", "rw", "rw", ""},
514 {"dec", "", "", "rw", ""},
515 {"div", "", "w", "rw", ""},
516 {"djnz", "j", "", "rw", ""},
517 {"inc", "", "", "rw", ""},
518 {"jb", "j", "", "r", ""},
519 {"jbc", "j", "", "rw", ""},
520 {"jc", "j", "", "", ""},
521 {"jmp", "j", "", "", ""},
522 {"jnb", "j", "", "r", ""},
523 {"jnc", "j", "", "", ""},
524 {"jnz", "j", "", "", ""},
525 {"jz", "j", "", "", ""},
526 {"lcall","j", "", "", ""},
527 {"ljmp", "j", "", "", ""},
528 {"mov", "", "", "w", "r"},
529 {"movc", "", "", "w", "r"},
530 {"movx", "", "", "w", "r"},
531 {"mul", "", "w", "rw", ""},
532 {"nop", "", "", "", ""},
533 {"orl", "", "", "rw", "r"},
534 {"pop", "", "", "w", ""},
535 {"push", "", "", "r", ""},
536 {"ret", "j", "", "", ""},
537 {"reti", "j", "", "", ""},
538 {"rl", "", "", "rw", ""},
539 {"rlc", "", "rw", "rw", ""},
540 {"rr", "", "", "rw", ""},
541 {"rrc", "", "rw", "rw", ""},
542 {"setb", "", "", "w", ""},
543 {"sjmp", "j", "", "", ""},
544 {"subb", "", "rw", "rw", "r"},
545 {"swap", "", "", "rw", ""},
546 {"xch", "", "", "rw", "rw"},
547 {"xchd", "", "", "rw", "rw"},
548 {"xrl", "", "", "rw", "r"},
552 mcs51opcodeCompare (const void *key, const void *member)
554 return strcmp((const char *)key, ((mcs51opcodedata *)member)->name);
558 asmLineNodeFromLineNode (lineNode *ln)
560 asmLineNode *aln = newAsmLineNode();
561 char *op, op1[256], op2[256];
565 mcs51opcodedata *opdat;
569 while (*p && isspace(*p)) p++;
570 for (op = inst, opsize=1; *p; p++)
572 if (isspace(*p) || *p == ';' || *p == ':' || *p == '=')
575 if (opsize < sizeof(inst))
576 *op++ = tolower(*p), opsize++;
580 if (*p == ';' || *p == ':' || *p == '=')
583 while (*p && isspace(*p)) p++;
587 for (op = op1, opsize=1; *p && *p != ','; p++)
589 if (!isspace(*p) && opsize < sizeof(op1))
590 *op++ = tolower(*p), opsize++;
595 for (op = op2, opsize=1; *p && *p != ','; p++)
597 if (!isspace(*p) && opsize < sizeof(op2))
598 *op++ = tolower(*p), opsize++;
602 aln->size = instructionSize(inst, op1, op2);
604 aln->regsRead = newBitVect (END_IDX);
605 aln->regsWritten = newBitVect (END_IDX);
607 opdat = bsearch (inst, mcs51opcodeDataTable,
608 sizeof(mcs51opcodeDataTable)/sizeof(mcs51opcodedata),
609 sizeof(mcs51opcodedata), mcs51opcodeCompare);
613 updateOpRW (aln, op1, opdat->op1type);
614 updateOpRW (aln, op2, opdat->op2type);
615 if (strchr(opdat->pswtype,'r'))
616 aln->regsRead = bitVectSetBit (aln->regsRead, CND_IDX);
617 if (strchr(opdat->pswtype,'w'))
618 aln->regsWritten = bitVectSetBit (aln->regsWritten, CND_IDX);
625 getInstructionSize (lineNode *line)
628 line->aln = asmLineNodeFromLineNode (line);
630 return line->aln->size;
634 getRegsRead (lineNode *line)
637 line->aln = asmLineNodeFromLineNode (line);
639 return line->aln->regsRead;
643 getRegsWritten (lineNode *line)
646 line->aln = asmLineNodeFromLineNode (line);
648 return line->aln->regsWritten;
652 /** $1 is always the basename.
653 $2 is always the output file.
655 $l is the list of extra options that should be there somewhere...
656 MUST be terminated with a NULL.
658 static const char *_linkCmd[] =
660 "aslink", "-nf", "\"$1\"", NULL
663 /* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */
664 static const char *_asmCmd[] =
666 "asx8051", "$l", "$3", "\"$1.asm\"", NULL
674 "MCU 8051", /* Target name */
675 NULL, /* Processor name */
678 TRUE, /* Emit glue around main */
679 MODEL_SMALL | MODEL_LARGE,
685 "-plosgffc", /* Options with debug */
686 "-plosgff", /* Options without debug */
689 NULL /* no do_assemble function */
705 /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */
706 1, 2, 2, 4, 1, 2, 3, 1, 4, 4
722 "XISEG (XDATA)", // initialized xdata
723 "XINIT (CODE)", // a code copy of xiseg
728 { _mcs51_genExtraAreas, NULL },
732 /* mcs51 has an 8 bit mul */
737 mcs51_emitDebuggerSymbol
741 2, /* sizeofElement */
742 {6,9,15}, /* sizeofMatchJump[] */
743 {9,18,36}, /* sizeofRangeCompare[] */
744 4, /* sizeofSubtract */
745 6, /* sizeofDispatch */
752 _mcs51_finaliseOptions,
753 _mcs51_setDefaultOptions,
754 mcs51_assignRegisters,
757 _mcs51_genAssemblerPreamble,
758 NULL, /* no genAssemblerEnd */
761 _mcs51_genInitStartup,
762 _mcs51_reset_regparm,
767 hasExtBitOp, /* hasExtBitOp */
768 oclsExpense, /* oclsExpense */
770 TRUE, /* little endian */
773 1, /* transform <= to ! > */
774 1, /* transform >= to ! < */
775 1, /* transform != to !(a == b) */
777 FALSE, /* No array initializer support. */
779 NULL, /* no builtin functions */
780 GPOINTER, /* treat unqualified pointers as "generic" pointers */
781 1, /* reset labelKey to 1 */
782 1, /* globals & local static allowed */