2 * Copyright © 2013 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 #include <ao_serial.h>
22 struct ao_fifo ao_usart_rx_fifo;
23 struct ao_fifo ao_usart_tx_fifo;
24 uint8_t ao_usart_tx_avail;
25 uint8_t ao_usart_tx_avail_min;
27 #define LPC_USART_TX_FIFO_SIZE 16
34 while (!(lpc_usart.lsr & (1 << LPC_USART_LSR_TEMT)))
36 lpc_usart.rbr_thr = c;
40 _ao_serial_tx_start(void)
42 if (!ao_fifo_empty(ao_usart_tx_fifo) && ao_usart_tx_avail) {
44 if (ao_usart_tx_avail < ao_usart_tx_avail_min)
45 ao_usart_tx_avail_min = ao_usart_tx_avail;
46 ao_fifo_remove(ao_usart_tx_fifo, lpc_usart.rbr_thr);
53 uint8_t wake_input = 0;
54 (void) lpc_usart.iir_fcr;
56 while (lpc_usart.lsr & (1 << LPC_USART_LSR_RDR)) {
57 char c = lpc_usart.rbr_thr;
58 if (!ao_fifo_full(ao_usart_rx_fifo))
59 ao_fifo_insert(ao_usart_rx_fifo, c);
62 if (lpc_usart.lsr & (1 << LPC_USART_LSR_THRE)) {
63 ao_usart_tx_avail = LPC_USART_TX_FIFO_SIZE;
64 _ao_serial_tx_start();
65 ao_wakeup(&ao_usart_tx_fifo);
68 ao_wakeup(&ao_usart_rx_fifo);
69 #if USE_SERIAL_0_STDIN
70 ao_wakeup(&ao_stdin_ready);
76 _ao_serial0_pollchar(void)
80 if (ao_fifo_empty(ao_usart_rx_fifo))
84 ao_fifo_remove(ao_usart_rx_fifo,u);
91 ao_serial0_getchar(void)
94 ao_arch_block_interrupts();
95 while ((c = _ao_serial0_pollchar()) == AO_READ_AGAIN)
96 ao_sleep(&ao_usart_rx_fifo);
97 ao_arch_release_interrupts();
102 ao_serial0_putchar(char c)
104 ao_arch_block_interrupts();
105 while (ao_fifo_full(ao_usart_tx_fifo))
106 ao_sleep(&ao_usart_tx_fifo);
107 ao_fifo_insert(ao_usart_tx_fifo, c);
108 _ao_serial_tx_start();
109 ao_arch_release_interrupts();
113 ao_serial0_drain(void)
115 ao_arch_block_interrupts();
116 while (!ao_fifo_empty(ao_usart_tx_fifo))
117 ao_sleep(&ao_usart_tx_fifo);
118 ao_arch_release_interrupts();
121 #include "ao_serial_lpc.h"
124 ao_serial0_set_speed(uint8_t speed)
126 if (speed > AO_SERIAL_SPEED_115200)
129 /* Flip to allow access to divisor latches */
130 lpc_usart.lcr |= (1 << LPC_USART_LCR_DLAB);
133 lpc_usart.rbr_thr = ao_usart_speeds[speed].dl & 0xff;
136 lpc_usart.ier = (ao_usart_speeds[speed].dl >> 8) & 0xff;
138 lpc_usart.fdr = ((ao_usart_speeds[speed].divaddval << LPC_USART_FDR_DIVADDVAL) |
139 (ao_usart_speeds[speed].mulval << LPC_USART_FDR_MULVAL));
141 /* Turn access to divisor latches back off */
142 lpc_usart.lcr &= ~(1 << LPC_USART_LCR_DLAB);
149 lpc_ioconf.pio0_18 = ((LPC_IOCONF_FUNC_PIO0_18_RXD << LPC_IOCONF_FUNC) |
150 (LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE) |
151 (0 << LPC_IOCONF_HYS) |
152 (0 << LPC_IOCONF_INV) |
153 (0 << LPC_IOCONF_OD));
154 lpc_ioconf.pio0_19 = ((LPC_IOCONF_FUNC_PIO0_19_TXD << LPC_IOCONF_FUNC) |
155 (LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE) |
156 (0 << LPC_IOCONF_HYS) |
157 (0 << LPC_IOCONF_INV) |
158 (0 << LPC_IOCONF_OD));
161 /* Turn on the USART */
162 lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_USART);
164 /* Turn on the USART clock */
165 lpc_scb.uartclkdiv = AO_LPC_CLKOUT / AO_LPC_USARTCLK;
167 /* Configure USART */
169 /* Enable FIFOs, reset fifo contents, interrupt on 1 received char */
170 lpc_usart.iir_fcr = ((1 << LPC_USART_FCR_FIFOEN) |
171 (1 << LPC_USART_FCR_RXFIFORES) |
172 (1 << LPC_USART_FCR_TXFIFORES) |
173 (LPC_USART_FCR_RXTL_1 << LPC_USART_FCR_RXTL));
175 ao_usart_tx_avail = LPC_USART_TX_FIFO_SIZE;
176 ao_usart_tx_avail_min = LPC_USART_TX_FIFO_SIZE;
179 lpc_usart.lcr = ((LPC_USART_LCR_WLS_8 << LPC_USART_LCR_WLS) |
180 (LPC_USART_LCR_SBS_1 << LPC_USART_LCR_SBS) |
181 (0 << LPC_USART_LCR_PE) |
182 (LPC_USART_LCR_PS_ODD << LPC_USART_LCR_PS) |
183 (0 << LPC_USART_LCR_BC) |
184 (0 << LPC_USART_LCR_DLAB));
186 /* Disable flow control */
187 lpc_usart.mcr = ((0 << LPC_USART_MCR_DTRCTRL) |
188 (0 << LPC_USART_MCR_RTSCTRL) |
189 (0 << LPC_USART_MCR_LMS) |
190 (0 << LPC_USART_MCR_RTSEN) |
191 (0 << LPC_USART_MCR_CTSEN));
193 /* 16x oversampling */
194 lpc_usart.osr = ((0 << LPC_USART_OSR_OSFRAC) |
195 ((16 - 1) << LPC_USART_OSR_OSINT) |
196 (0 << LPC_USART_OSR_FDINT));
199 lpc_usart.hden = ((0 << LPC_USART_HDEN_HDEN));
202 ao_serial0_set_speed(AO_SERIAL_SPEED_9600);
204 /* Enable interrupts */
205 lpc_usart.ier = ((1 << LPC_USART_IER_RBRINTEN) |
206 (1 << LPC_USART_IER_THREINTEN));
208 lpc_nvic_set_enable(LPC_ISR_USART_POS);
209 lpc_nvic_set_priority(LPC_ISR_USART_POS, 0);
210 #if USE_SERIAL_0_STDIN
211 ao_add_stdio(_ao_serial0_pollchar,