1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
36 * See Zylin web pages or contact Zylin for more information.
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
52 #include <helper/time_support.h>
54 #include <netinet/tcp.h>
57 #include "zy1000_version.h"
59 #include <cyg/hal/hal_io.h> // low level i/o
60 #include <cyg/hal/hal_diag.h>
62 #ifdef CYGPKG_HAL_NIOS2
63 #include <cyg/hal/io.h>
64 #include <cyg/firmwareutil/firmwareutil.h>
67 #define ZYLIN_VERSION GIT_ZY1000_VERSION
68 #define ZYLIN_DATE __DATE__
69 #define ZYLIN_TIME __TIME__
70 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
71 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
75 static int zy1000_khz(int khz, int *jtag_speed)
83 *jtag_speed = 64000/khz;
88 static int zy1000_speed_div(int speed, int *khz)
102 static bool readPowerDropout(void)
105 // sample and clear power dropout
106 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
107 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
109 powerDropout = (state & 0x80) != 0;
114 static bool readSRST(void)
117 // sample and clear SRST sensing
118 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
119 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
121 srstAsserted = (state & 0x40) != 0;
125 static int zy1000_srst_asserted(int *srst_asserted)
127 *srst_asserted = readSRST();
131 static int zy1000_power_dropout(int *dropout)
133 *dropout = readPowerDropout();
137 void zy1000_reset(int trst, int srst)
139 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
141 /* flush the JTAG FIFO. Not flushing the queue before messing with
142 * reset has such interesting bugs as causing hard to reproduce
143 * RCLK bugs as RCLK will stop responding when TRST is asserted
149 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
153 /* Danger!!! if clk != 0 when in
154 * idle in TAP_IDLE, reset halt on str912 will fail.
156 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
161 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
166 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
169 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
171 /* we're now in the RESET state until trst is deasserted */
172 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
175 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
176 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
179 /* wait for srst to float back up */
180 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0))||
181 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
188 // We don't want to sense our own reset, so we clear here.
189 // There is of course a timing hole where we could loose
195 LOG_USER("SRST took %dms to deassert", (int)total);
203 start = timeval_ms();
206 total = timeval_ms() - start;
212 LOG_ERROR("SRST took too long to deassert: %dms", (int)total);
220 int zy1000_speed(int speed)
222 /* flush JTAG master FIFO before setting speed */
229 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
230 LOG_DEBUG("jtag_speed using RCLK");
234 if (speed > 8190 || speed < 2)
236 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
237 return ERROR_INVALID_ARGUMENTS;
240 LOG_USER("jtag_speed %d => JTAG clk=%f", speed, 64.0/(float)speed);
241 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
242 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed&~1);
247 static bool savePower;
250 static void setPower(bool power)
255 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
258 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
262 COMMAND_HANDLER(handle_power_command)
268 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
273 LOG_INFO("Target power %s", savePower ? "on" : "off");
276 return ERROR_INVALID_ARGUMENTS;
283 static char *tcp_server = "notspecified";
284 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
289 tcp_server = strdup(Jim_GetString(argv[1], NULL));
296 /* Give TELNET a way to find out what version this is */
297 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
299 if ((argc < 1) || (argc > 3))
301 const char *version_str = NULL;
305 version_str = ZYLIN_OPENOCD_VERSION;
308 const char *str = Jim_GetString(argv[1], NULL);
309 const char *str2 = NULL;
311 str2 = Jim_GetString(argv[2], NULL);
312 if (strcmp("openocd", str) == 0)
314 version_str = ZYLIN_OPENOCD;
316 else if (strcmp("zy1000", str) == 0)
318 version_str = ZYLIN_VERSION;
320 else if (strcmp("date", str) == 0)
322 version_str = ZYLIN_DATE;
324 else if (strcmp("time", str) == 0)
326 version_str = ZYLIN_TIME;
328 else if (strcmp("pcb", str) == 0)
330 #ifdef CYGPKG_HAL_NIOS2
336 #ifdef CYGPKG_HAL_NIOS2
337 else if (strcmp("fpga", str) == 0)
340 /* return a list of 32 bit integers to describe the expected
343 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
344 uint32_t id, timestamp;
345 HAL_READ_UINT32(SYSID_BASE, id);
346 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
347 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
348 version_str = fpga_id;
349 if ((argc>2) && (strcmp("time", str2) == 0))
351 time_t last_mod = timestamp;
352 char * t = ctime (&last_mod) ;
365 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
371 #ifdef CYGPKG_HAL_NIOS2
377 struct cyg_upgrade_info *upgraded_file;
380 static void report_info(void *data, const char * format, va_list args)
382 char *s = alloc_vprintf(format, args);
387 struct cyg_upgrade_info firmware_info =
389 (uint8_t *)0x84000000,
395 "ZylinNiosFirmware\n",
399 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
405 const char *str = Jim_GetString(argv[1], &length);
409 if ((tmpFile = open(firmware_info.file, O_RDWR | O_CREAT | O_TRUNC)) <= 0)
414 success = write(tmpFile, str, length) == length;
419 if (!cyg_firmware_upgrade(NULL, firmware_info))
427 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
429 Jim_Obj * const *argv)
433 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
438 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, status);
440 Jim_SetResult(interp, Jim_NewIntObj(interp, (status&0x80) != 0));
447 int zy1000_quit(void)
455 int interface_jtag_execute_queue(void)
460 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
461 /* clear JTAG error register */
462 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
464 if ((empty&0x400) != 0)
466 LOG_WARNING("RCLK timeout");
467 /* the error is informative only as we don't want to break the firmware if there
468 * is a false positive.
470 // return ERROR_FAIL;
479 static uint32_t getShiftValue(void)
483 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
484 VERBOSE(LOG_INFO("getShiftValue %08x", value));
488 static uint32_t getShiftValueFlip(void)
492 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x18, value);
493 VERBOSE(LOG_INFO("getShiftValue %08x (flipped)", value));
499 static void shiftValueInnerFlip(const tap_state_t state, const tap_state_t endState, int repeat, uint32_t value)
501 VERBOSE(LOG_INFO("shiftValueInner %s %s %d %08x (flipped)", tap_state_name(state), tap_state_name(endState), repeat, value));
505 ZY1000_POKE(ZY1000_JTAG_BASE + 0xc, value);
506 ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 15) | (repeat << 8) | (a << 4) | b);
507 VERBOSE(getShiftValueFlip());
511 // here we shuffle N bits out/in
512 static __inline void scanBits(const uint8_t *out_value, uint8_t *in_value, int num_bits, bool pause, tap_state_t shiftState, tap_state_t end_state)
514 tap_state_t pause_state = shiftState;
515 for (int j = 0; j < num_bits; j += 32)
517 int k = num_bits - j;
521 /* we have more to shift out */
524 /* this was the last to shift out this time */
525 pause_state = end_state;
528 // we have (num_bits + 7)/8 bytes of bits to toggle out.
529 // bits are pushed out LSB to MSB
532 if (out_value != NULL)
534 for (int l = 0; l < k; l += 8)
536 value|=out_value[(j + l)/8]<<l;
539 /* mask away unused bits for easier debugging */
542 value&=~(((uint32_t)0xffffffff) << k);
545 /* Shifting by >= 32 is not defined by the C standard
546 * and will in fact shift by &0x1f bits on nios */
549 shiftValueInner(shiftState, pause_state, k, value);
551 if (in_value != NULL)
553 // data in, LSB to MSB
554 value = getShiftValue();
555 // we're shifting in data to MSB, shift data to be aligned for returning the value
558 for (int l = 0; l < k; l += 8)
560 in_value[(j + l)/8]=(value >> l)&0xff;
566 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, tap_state_t end_state)
568 for (int i = 0; i < num_fields; i++)
570 scanBits(fields[i].out_value,
579 int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
582 struct jtag_tap *tap, *nextTap;
583 tap_state_t pause_state = TAP_IRSHIFT;
585 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
587 nextTap = jtag_tap_next_enabled(tap);
592 scan_size = tap->ir_length;
594 /* search the list */
597 scanFields(1, fields, TAP_IRSHIFT, pause_state);
598 /* update device information */
599 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
604 /* if a device isn't listed, set it to BYPASS */
605 assert(scan_size <= 32);
606 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
619 int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
621 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
625 int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
627 struct jtag_tap *tap, *nextTap;
628 tap_state_t pause_state = TAP_DRSHIFT;
629 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
631 nextTap = jtag_tap_next_enabled(tap);
637 /* Find a range of fields to write to this tap */
640 assert(!tap->bypass);
642 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
645 /* Shift out a 0 for disabled tap's */
647 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
653 int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
655 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
659 int interface_jtag_add_tlr()
661 setCurrentState(TAP_RESET);
666 int interface_jtag_add_reset(int req_trst, int req_srst)
668 zy1000_reset(req_trst, req_srst);
672 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
674 /* num_cycles can be 0 */
675 setCurrentState(clockstate);
677 /* execute num_cycles, 32 at the time. */
679 for (i = 0; i < num_cycles; i += 32)
683 if (num_cycles-i < num)
687 shiftValueInner(clockstate, clockstate, num, 0);
691 /* finish in end_state */
692 setCurrentState(state);
694 tap_state_t t = TAP_IDLE;
695 /* test manual drive code on any target */
697 uint8_t tms_scan = tap_get_tms_path(t, state);
698 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
700 for (i = 0; i < tms_count; i++)
702 tms = (tms_scan >> i) & 1;
704 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
707 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
713 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
715 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
718 int interface_jtag_add_clocks(int num_cycles)
720 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
723 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
725 /*wait for the fifo to be empty*/
728 for (unsigned i = 0; i < num_bits; i++)
732 if (((seq[i/8] >> (i % 8)) & 1) == 0)
742 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
746 if (state != TAP_INVALID)
748 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
751 /* this would be normal if we are switching to SWD mode */
756 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
763 tap_state_t cur_state = cmd_queue_cur_state;
766 memset(seq, 0, sizeof(seq));
767 assert(num_states < (int)((sizeof(seq) * 8)));
771 if (tap_state_transition(cur_state, false) == path[state_count])
775 else if (tap_state_transition(cur_state, true) == path[state_count])
781 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
785 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
787 cur_state = path[state_count];
792 return interface_add_tms_seq(state_count, seq, cur_state);
795 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
797 /* bypass bits before and after */
802 struct jtag_tap *cur_tap, *nextTap;
803 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
805 nextTap = jtag_tap_next_enabled(cur_tap);
824 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
829 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
831 if (pre_bits + post_bits + 6 > 32)
834 for (i = 0; i < count; i++)
836 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
841 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
843 for (i = 0; i < count - 1; i++)
845 /* Fewer pokes means we get to use the FIFO more efficiently */
846 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
847 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits + pre_bits, (reg_addr | (1 << 5)));
850 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
851 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits, (reg_addr | (1 << 5)));
857 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
860 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count);
861 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
863 static const int bits[] = {32, 2};
864 uint32_t values[] = {0, 0};
866 /* FIX!!!!!! the target_write_memory() API started this nasty problem
867 * with unaligned uint32_t * pointers... */
868 const uint8_t *t = (const uint8_t *)data;
871 /* bypass bits before and after */
874 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
877 struct jtag_tap *cur_tap, *nextTap;
878 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
880 nextTap = jtag_tap_next_enabled(cur_tap);
901 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
909 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
911 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
914 /* copy & paste from arm11_dbgtap.c */
915 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
918 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
919 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
920 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
921 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
922 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
923 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
924 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
925 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
926 /* we don't have to wait for the queue to empty here. waitIdle(); */
927 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
929 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
931 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
934 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
935 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
940 values[0] |= (*t++<<8);
941 values[0] |= (*t++<<16);
942 values[0] |= (*t++<<24);
944 /* This will happen on the last iteration updating the current tap state
945 * so we don't have to track it during the common code path */
952 return jtag_execute_queue();
957 static const struct command_registration zy1000_commands[] = {
960 .handler = handle_power_command,
962 .help = "Turn power switch to target on/off. "
963 "With no arguments, prints status.",
964 .usage = "('on'|'off)",
968 .name = "zy1000_version",
970 .jim_handler = jim_zy1000_version,
971 .help = "Print version info for zy1000.",
972 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
976 .name = "zy1000_server",
978 .jim_handler = jim_zy1000_server,
979 .help = "Tcpip address for ZY1000 server.",
984 .name = "powerstatus",
986 .jim_handler = zylinjtag_Jim_Command_powerstatus,
987 .help = "Returns power status of target",
989 #ifdef CYGPKG_HAL_NIOS2
991 .name = "updatezy1000firmware",
993 .jim_handler = jim_zy1000_writefirmware,
994 .help = "writes firmware to flash",
995 /* .usage = "some_string", */
998 COMMAND_REGISTRATION_DONE
1002 static int tcp_ip = -1;
1004 /* Write large packets if we can */
1005 static size_t out_pos;
1006 static uint8_t out_buffer[16384];
1007 static size_t in_pos;
1008 static size_t in_write;
1009 static uint8_t in_buffer[16384];
1011 static bool flush_writes(void)
1013 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
1018 static bool writeLong(uint32_t l)
1021 for (i = 0; i < 4; i++)
1023 uint8_t c = (l >> (i*8))&0xff;
1024 out_buffer[out_pos++] = c;
1025 if (out_pos >= sizeof(out_buffer))
1027 if (!flush_writes())
1036 static bool readLong(uint32_t *out_data)
1040 if (!flush_writes())
1048 for (i = 0; i < 4; i++)
1051 if (in_pos == in_write)
1055 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
1060 in_write = (size_t) t;
1063 c = in_buffer[in_pos++];
1065 data |= (c << (i*8));
1073 ZY1000_CMD_POKE = 0x0,
1074 ZY1000_CMD_PEEK = 0x8,
1075 ZY1000_CMD_SLEEP = 0x1,
1079 #if !BUILD_ECOSBOARD
1081 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1082 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1084 /* We initialize this late since we need to know the server address
1087 static void tcpip_open(void)
1092 struct sockaddr_in echoServAddr; /* Echo server address */
1094 /* Create a reliable, stream socket using TCP */
1095 if ((tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP)) < 0)
1097 fprintf(stderr, "Failed to connect to zy1000 server\n");
1101 /* Construct the server address structure */
1102 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
1103 echoServAddr.sin_family = AF_INET; /* Internet address family */
1104 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
1105 echoServAddr.sin_port = htons(7777); /* Server port */
1107 /* Establish the connection to the echo server */
1108 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0)
1110 fprintf(stderr, "Failed to connect to zy1000 server\n");
1115 setsockopt(tcp_ip, /* socket affected */
1116 IPPROTO_TCP, /* set option at TCP level */
1117 TCP_NODELAY, /* name of option */
1118 (char *)&flag, /* the cast is historical cruft */
1119 sizeof(int)); /* length of option value */
1125 void zy1000_tcpout(uint32_t address, uint32_t data)
1128 if (!writeLong((ZY1000_CMD_POKE << 24) | address)||
1131 fprintf(stderr, "Could not write to zy1000 server\n");
1136 uint32_t zy1000_tcpin(uint32_t address)
1140 if (!writeLong((ZY1000_CMD_PEEK << 24) | address)||
1143 fprintf(stderr, "Could not read from zy1000 server\n");
1149 int interface_jtag_add_sleep(uint32_t us)
1152 if (!writeLong((ZY1000_CMD_SLEEP << 24))||
1155 fprintf(stderr, "Could not read from zy1000 server\n");
1165 static char tcpip_stack[2048];
1167 static cyg_thread tcpip_thread_object;
1168 static cyg_handle_t tcpip_thread_handle;
1170 /* Infinite loop peeking & poking */
1171 static void tcpipserver(void)
1176 if (!readLong(&address))
1178 enum ZY1000_CMD c = (address >> 24) & 0xff;
1179 address &= 0xffffff;
1182 case ZY1000_CMD_POKE:
1185 if (!readLong(&data))
1187 address &= ~0x80000000;
1188 ZY1000_POKE(address + ZY1000_JTAG_BASE, data);
1191 case ZY1000_CMD_PEEK:
1194 ZY1000_PEEK(address + ZY1000_JTAG_BASE, data);
1195 if (!writeLong(data))
1199 case ZY1000_CMD_SLEEP:
1202 if (!readLong(&data))
1214 static void tcpip_server(cyg_addrword_t data)
1216 int so_reuseaddr_option = 1;
1219 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1221 LOG_ERROR("error creating socket: %s", strerror(errno));
1225 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1228 struct sockaddr_in sin;
1229 unsigned int address_size;
1230 address_size = sizeof(sin);
1231 memset(&sin, 0, sizeof(sin));
1232 sin.sin_family = AF_INET;
1233 sin.sin_addr.s_addr = INADDR_ANY;
1234 sin.sin_port = htons(7777);
1236 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1238 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1242 if (listen(fd, 1) == -1)
1244 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1251 tcp_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1258 setsockopt(tcp_ip, /* socket affected */
1259 IPPROTO_TCP, /* set option at TCP level */
1260 TCP_NODELAY, /* name of option */
1261 (char *)&flag, /* the cast is historical cruft */
1262 sizeof(int)); /* length of option value */
1264 bool save_poll = jtag_poll_get_enabled();
1266 /* polling will screw up the "connection" */
1267 jtag_poll_set_enabled(false);
1271 jtag_poll_set_enabled(save_poll);
1280 int interface_jtag_add_sleep(uint32_t us)
1289 int zy1000_init(void)
1292 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
1295 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
1297 setPower(true); // on by default
1300 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1302 zy1000_speed(jtag_get_speed());
1306 cyg_thread_create(1, tcpip_server, (cyg_addrword_t) 0, "tcip/ip server",
1307 (void *) tcpip_stack, sizeof(tcpip_stack),
1308 &tcpip_thread_handle, &tcpip_thread_object);
1309 cyg_thread_resume(tcpip_thread_handle);
1317 struct jtag_interface zy1000_interface =
1320 .supported = DEBUG_CAP_TMS_SEQ,
1321 .execute_queue = NULL,
1322 .speed = zy1000_speed,
1323 .commands = zy1000_commands,
1324 .init = zy1000_init,
1325 .quit = zy1000_quit,
1327 .speed_div = zy1000_speed_div,
1328 .power_dropout = zy1000_power_dropout,
1329 .srst_asserted = zy1000_srst_asserted,