1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
36 * See Zylin web pages or contact Zylin for more information.
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
50 #include <target/embeddedice.h>
51 #include <jtag/minidriver.h>
52 #include <jtag/interface.h>
54 #include <helper/time_support.h>
56 #include <netinet/tcp.h>
59 #include "zy1000_version.h"
61 #include <cyg/hal/hal_io.h> // low level i/o
62 #include <cyg/hal/hal_diag.h>
64 #ifdef CYGPKG_HAL_NIOS2
65 #include <cyg/hal/io.h>
66 #include <cyg/firmwareutil/firmwareutil.h>
67 #define ZYLIN_KHZ 60000
69 #define ZYLIN_KHZ 64000
72 #define ZYLIN_VERSION GIT_ZY1000_VERSION
73 #define ZYLIN_DATE __DATE__
74 #define ZYLIN_TIME __TIME__
75 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
76 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
79 /* Assume we're connecting to a revc w/60MHz clock. */
80 #define ZYLIN_KHZ 60000
84 /* The software needs to check if it's in RCLK mode or not */
85 static bool zy1000_rclk = false;
87 static int zy1000_khz(int khz, int *jtag_speed)
96 /* Round speed up to nearest divisor.
99 * (64000 + 15999) / 16000 = 4
106 * (64000 + 15998) / 15999 = 5
113 speed = (ZYLIN_KHZ + (khz -1)) / khz;
114 speed = (speed + 1 ) / 2;
118 /* maximum dividend */
126 static int zy1000_speed_div(int speed, int *khz)
134 *khz = ZYLIN_KHZ / speed;
140 static bool readPowerDropout(void)
143 // sample and clear power dropout
144 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
145 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
147 powerDropout = (state & 0x80) != 0;
152 static bool readSRST(void)
155 // sample and clear SRST sensing
156 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
157 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
159 srstAsserted = (state & 0x40) != 0;
163 static int zy1000_srst_asserted(int *srst_asserted)
165 *srst_asserted = readSRST();
169 static int zy1000_power_dropout(int *dropout)
171 *dropout = readPowerDropout();
175 /* Wait for SRST to assert or deassert */
176 static void waitSRST(bool asserted)
181 const char *mode = asserted ? "assert" : "deassert";
185 bool srstAsserted = readSRST();
186 if ( (asserted && srstAsserted) || (!asserted && !srstAsserted) )
190 LOG_USER("SRST took %dms to %s", (int)total, mode);
198 start = timeval_ms();
201 total = timeval_ms() - start;
207 LOG_ERROR("SRST took too long to %s: %dms", mode, (int)total);
214 void zy1000_reset(int trst, int srst)
216 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
218 /* flush the JTAG FIFO. Not flushing the queue before messing with
219 * reset has such interesting bugs as causing hard to reproduce
220 * RCLK bugs as RCLK will stop responding when TRST is asserted
226 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
230 /* Danger!!! if clk != 0 when in
231 * idle in TAP_IDLE, reset halt on str912 will fail.
233 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
240 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
245 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
248 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
250 /* we're now in the RESET state until trst is deasserted */
251 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
254 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
255 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
258 /* wait for srst to float back up */
259 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0))||
260 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
266 int zy1000_speed(int speed)
268 /* flush JTAG master FIFO before setting speed */
276 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
278 LOG_DEBUG("jtag_speed using RCLK");
282 if (speed > 8190 || speed < 2)
284 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. With divisor is %dkHz / even values between 8190-2, i.e. min %dHz, max %dMHz",
285 ZYLIN_KHZ, (ZYLIN_KHZ * 1000) / 8190, ZYLIN_KHZ / (2 * 1000));
286 return ERROR_INVALID_ARGUMENTS;
291 zy1000_speed_div(speed, &khz);
292 LOG_USER("jtag_speed %d => JTAG clk=%d kHz", speed, khz);
293 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
294 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed);
299 static bool savePower;
302 static void setPower(bool power)
307 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
310 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
314 COMMAND_HANDLER(handle_power_command)
320 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
325 LOG_INFO("Target power %s", savePower ? "on" : "off");
328 return ERROR_INVALID_ARGUMENTS;
334 #if !BUILD_ZY1000_MASTER
335 static char *tcp_server = "notspecified";
336 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
341 tcp_server = strdup(Jim_GetString(argv[1], NULL));
348 /* Give TELNET a way to find out what version this is */
349 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
351 if ((argc < 1) || (argc > 3))
353 const char *version_str = NULL;
357 version_str = ZYLIN_OPENOCD_VERSION;
360 const char *str = Jim_GetString(argv[1], NULL);
361 const char *str2 = NULL;
363 str2 = Jim_GetString(argv[2], NULL);
364 if (strcmp("openocd", str) == 0)
366 version_str = ZYLIN_OPENOCD;
368 else if (strcmp("zy1000", str) == 0)
370 version_str = ZYLIN_VERSION;
372 else if (strcmp("date", str) == 0)
374 version_str = ZYLIN_DATE;
376 else if (strcmp("time", str) == 0)
378 version_str = ZYLIN_TIME;
380 else if (strcmp("pcb", str) == 0)
382 #ifdef CYGPKG_HAL_NIOS2
388 #ifdef CYGPKG_HAL_NIOS2
389 else if (strcmp("fpga", str) == 0)
392 /* return a list of 32 bit integers to describe the expected
395 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
396 uint32_t id, timestamp;
397 HAL_READ_UINT32(SYSID_BASE, id);
398 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
399 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
400 version_str = fpga_id;
401 if ((argc>2) && (strcmp("time", str2) == 0))
403 time_t last_mod = timestamp;
404 char * t = ctime (&last_mod) ;
417 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
423 #ifdef CYGPKG_HAL_NIOS2
429 struct cyg_upgrade_info *upgraded_file;
432 static void report_info(void *data, const char * format, va_list args)
434 char *s = alloc_vprintf(format, args);
439 struct cyg_upgrade_info firmware_info =
441 (uint8_t *)0x84000000,
447 "ZylinNiosFirmware\n",
451 // File written to /ram/firmware.phi before arriving at this fn
452 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
457 if (!cyg_firmware_upgrade(NULL, firmware_info))
465 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
467 Jim_Obj * const *argv)
471 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
475 bool dropout = readPowerDropout();
477 Jim_SetResult(interp, Jim_NewIntObj(interp, dropout));
484 int zy1000_quit(void)
492 int interface_jtag_execute_queue(void)
498 /* We must make sure to write data read back to memory location before we return
501 zy1000_flush_readqueue();
503 /* and handle any callbacks... */
504 zy1000_flush_callbackqueue();
508 /* Only check for errors when using RCLK to speed up
511 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
512 /* clear JTAG error register */
513 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
515 if ((empty&0x400) != 0)
517 LOG_WARNING("RCLK timeout");
518 /* the error is informative only as we don't want to break the firmware if there
519 * is a false positive.
521 // return ERROR_FAIL;
530 static void writeShiftValue(uint8_t *data, int bits);
532 // here we shuffle N bits out/in
533 static __inline void scanBits(const uint8_t *out_value, uint8_t *in_value, int num_bits, bool pause_now, tap_state_t shiftState, tap_state_t end_state)
535 tap_state_t pause_state = shiftState;
536 for (int j = 0; j < num_bits; j += 32)
538 int k = num_bits - j;
542 /* we have more to shift out */
543 } else if (pause_now)
545 /* this was the last to shift out this time */
546 pause_state = end_state;
549 // we have (num_bits + 7)/8 bytes of bits to toggle out.
550 // bits are pushed out LSB to MSB
553 if (out_value != NULL)
555 for (int l = 0; l < k; l += 8)
557 value|=out_value[(j + l)/8]<<l;
560 /* mask away unused bits for easier debugging */
563 value&=~(((uint32_t)0xffffffff) << k);
566 /* Shifting by >= 32 is not defined by the C standard
567 * and will in fact shift by &0x1f bits on nios */
570 shiftValueInner(shiftState, pause_state, k, value);
572 if (in_value != NULL)
574 writeShiftValue(in_value + (j/8), k);
579 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, tap_state_t end_state)
581 for (int i = 0; i < num_fields; i++)
583 scanBits(fields[i].out_value,
592 int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
595 struct jtag_tap *tap, *nextTap;
596 tap_state_t pause_state = TAP_IRSHIFT;
598 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
600 nextTap = jtag_tap_next_enabled(tap);
605 scan_size = tap->ir_length;
607 /* search the list */
610 scanFields(1, fields, TAP_IRSHIFT, pause_state);
611 /* update device information */
612 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
617 /* if a device isn't listed, set it to BYPASS */
618 assert(scan_size <= 32);
619 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
632 int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
634 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
638 int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
640 struct jtag_tap *tap, *nextTap;
641 tap_state_t pause_state = TAP_DRSHIFT;
642 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
644 nextTap = jtag_tap_next_enabled(tap);
650 /* Find a range of fields to write to this tap */
653 assert(!tap->bypass);
655 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
658 /* Shift out a 0 for disabled tap's */
660 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
666 int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
668 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
672 int interface_jtag_add_tlr()
674 setCurrentState(TAP_RESET);
679 int interface_jtag_add_reset(int req_trst, int req_srst)
681 zy1000_reset(req_trst, req_srst);
685 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
687 /* num_cycles can be 0 */
688 setCurrentState(clockstate);
690 /* execute num_cycles, 32 at the time. */
692 for (i = 0; i < num_cycles; i += 32)
696 if (num_cycles-i < num)
700 shiftValueInner(clockstate, clockstate, num, 0);
704 /* finish in end_state */
705 setCurrentState(state);
707 tap_state_t t = TAP_IDLE;
708 /* test manual drive code on any target */
710 uint8_t tms_scan = tap_get_tms_path(t, state);
711 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
713 for (i = 0; i < tms_count; i++)
715 tms = (tms_scan >> i) & 1;
717 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
720 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
726 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
728 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
731 int interface_jtag_add_clocks(int num_cycles)
733 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
736 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
738 /*wait for the fifo to be empty*/
741 for (unsigned i = 0; i < num_bits; i++)
745 if (((seq[i/8] >> (i % 8)) & 1) == 0)
755 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
759 if (state != TAP_INVALID)
761 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
764 /* this would be normal if we are switching to SWD mode */
769 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
776 tap_state_t cur_state = cmd_queue_cur_state;
779 memset(seq, 0, sizeof(seq));
780 assert(num_states < (int)((sizeof(seq) * 8)));
784 if (tap_state_transition(cur_state, false) == path[state_count])
788 else if (tap_state_transition(cur_state, true) == path[state_count])
794 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
798 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
800 cur_state = path[state_count];
805 return interface_add_tms_seq(state_count, seq, cur_state);
808 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
810 /* bypass bits before and after */
815 struct jtag_tap *cur_tap, *nextTap;
816 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
818 nextTap = jtag_tap_next_enabled(cur_tap);
838 static const int embeddedice_num_bits[] = {32, 6};
842 values[1] = (1 << 5) | reg_addr;
846 embeddedice_num_bits,
851 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
855 for (i = 0; i < count; i++)
857 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
863 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
865 if ((pre_bits > 32) || (post_bits + 6 > 32))
868 for (i = 0; i < count; i++)
870 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
876 for (i = 0; i < count; i++)
878 /* Fewer pokes means we get to use the FIFO more efficiently */
879 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
880 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
881 /* Danger! here we need to exit into the TAP_IDLE state to make
882 * DCC pick up this value.
884 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits, (reg_addr | (1 << 5)));
893 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
895 /* bypass bits before and after */
898 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
901 if ((pre_bits > 32) || (post_bits > 32))
903 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *, uint32_t, uint32_t *, size_t);
904 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
907 static const int bits[] = {32, 2};
908 uint32_t values[] = {0, 0};
910 /* FIX!!!!!! the target_write_memory() API started this nasty problem
911 * with unaligned uint32_t * pointers... */
912 const uint8_t *t = (const uint8_t *)data;
917 /* Danger! This code doesn't update cmd_queue_cur_state, so
918 * invoking jtag_add_pathmove() before jtag_add_dr_out() after
919 * this loop would fail!
921 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
929 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
931 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
933 /* copy & paste from arm11_dbgtap.c */
934 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
935 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
936 * This is probably a bug in the Avalon bus(cross clocking bridge?)
937 * or in the jtag registers module.
940 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
941 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
942 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
943 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
944 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
945 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
946 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
947 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
948 /* we don't have to wait for the queue to empty here */
949 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
952 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
954 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
958 values[0] |= (*t++<<8);
959 values[0] |= (*t++<<16);
960 values[0] |= (*t++<<24);
968 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
969 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
974 values[0] |= (*t++<<8);
975 values[0] |= (*t++<<16);
976 values[0] |= (*t++<<24);
978 /* This will happen on the last iteration updating cmd_queue_cur_state
979 * so we don't have to track it during the common code path
987 return jtag_execute_queue();
992 static const struct command_registration zy1000_commands[] = {
995 .handler = handle_power_command,
997 .help = "Turn power switch to target on/off. "
998 "With no arguments, prints status.",
999 .usage = "('on'|'off)",
1001 #if BUILD_ZY1000_MASTER
1004 .name = "zy1000_version",
1005 .mode = COMMAND_ANY,
1006 .jim_handler = jim_zy1000_version,
1007 .help = "Print version info for zy1000.",
1008 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
1013 .name = "zy1000_server",
1014 .mode = COMMAND_ANY,
1015 .jim_handler = jim_zy1000_server,
1016 .help = "Tcpip address for ZY1000 server.",
1021 .name = "powerstatus",
1022 .mode = COMMAND_ANY,
1023 .jim_handler = zylinjtag_Jim_Command_powerstatus,
1024 .help = "Returns power status of target",
1026 #ifdef CYGPKG_HAL_NIOS2
1028 .name = "updatezy1000firmware",
1029 .mode = COMMAND_ANY,
1030 .jim_handler = jim_zy1000_writefirmware,
1031 .help = "writes firmware to flash",
1032 /* .usage = "some_string", */
1035 COMMAND_REGISTRATION_DONE
1039 static int tcp_ip = -1;
1041 /* Write large packets if we can */
1042 static size_t out_pos;
1043 static uint8_t out_buffer[16384];
1044 static size_t in_pos;
1045 static size_t in_write;
1046 static uint8_t in_buffer[16384];
1048 static bool flush_writes(void)
1050 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
1055 static bool writeLong(uint32_t l)
1058 for (i = 0; i < 4; i++)
1060 uint8_t c = (l >> (i*8))&0xff;
1061 out_buffer[out_pos++] = c;
1062 if (out_pos >= sizeof(out_buffer))
1064 if (!flush_writes())
1073 static bool readLong(uint32_t *out_data)
1077 for (i = 0; i < 4; i++)
1080 if (in_pos == in_write)
1082 /* If we have some data that we can send, send them before
1083 * we wait for more data
1087 if (!flush_writes())
1095 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
1100 in_write = (size_t) t;
1103 c = in_buffer[in_pos++];
1105 data |= (c << (i*8));
1113 ZY1000_CMD_POKE = 0x0,
1114 ZY1000_CMD_PEEK = 0x8,
1115 ZY1000_CMD_SLEEP = 0x1,
1116 ZY1000_CMD_WAITIDLE = 2
1120 #if !BUILD_ZY1000_MASTER
1122 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1123 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1125 /* We initialize this late since we need to know the server address
1128 static void tcpip_open(void)
1133 struct sockaddr_in echoServAddr; /* Echo server address */
1135 /* Create a reliable, stream socket using TCP */
1136 if ((tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP)) < 0)
1138 fprintf(stderr, "Failed to connect to zy1000 server\n");
1142 /* Construct the server address structure */
1143 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
1144 echoServAddr.sin_family = AF_INET; /* Internet address family */
1145 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
1146 echoServAddr.sin_port = htons(7777); /* Server port */
1148 /* Establish the connection to the echo server */
1149 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0)
1151 fprintf(stderr, "Failed to connect to zy1000 server\n");
1156 setsockopt(tcp_ip, /* socket affected */
1157 IPPROTO_TCP, /* set option at TCP level */
1158 TCP_NODELAY, /* name of option */
1159 (char *)&flag, /* the cast is historical cruft */
1160 sizeof(int)); /* length of option value */
1166 void zy1000_tcpout(uint32_t address, uint32_t data)
1169 if (!writeLong((ZY1000_CMD_POKE << 24) | address)||
1172 fprintf(stderr, "Could not write to zy1000 server\n");
1177 /* By sending the wait to the server, we avoid a readback
1178 * of status. Radically improves performance for this operation
1179 * with long ping times.
1184 if (!writeLong((ZY1000_CMD_WAITIDLE << 24)))
1186 fprintf(stderr, "Could not write to zy1000 server\n");
1191 uint32_t zy1000_tcpin(uint32_t address)
1195 zy1000_flush_readqueue();
1198 if (!writeLong((ZY1000_CMD_PEEK << 24) | address)||
1201 fprintf(stderr, "Could not read from zy1000 server\n");
1207 int interface_jtag_add_sleep(uint32_t us)
1210 if (!writeLong((ZY1000_CMD_SLEEP << 24))||
1213 fprintf(stderr, "Could not read from zy1000 server\n");
1219 /* queue a readback */
1220 #define readqueue_size 16384
1225 } readqueue[readqueue_size];
1227 static int readqueue_pos = 0;
1229 /* flush the readqueue, this means reading any data that
1230 * we're expecting and store them into the final position
1232 void zy1000_flush_readqueue(void)
1234 if (readqueue_pos == 0)
1236 /* simply debugging by allowing easy breakpoints when there
1237 * is something to do. */
1242 for (i = 0; i < readqueue_pos; i++)
1245 if (!readLong(&value))
1247 fprintf(stderr, "Could not read from zy1000 server\n");
1251 uint8_t *in_value = readqueue[i].dest;
1252 int k = readqueue[i].bits;
1254 // we're shifting in data to MSB, shift data to be aligned for returning the value
1257 for (int l = 0; l < k; l += 8)
1259 in_value[l/8]=(value >> l)&0xff;
1265 /* By queuing the callback's we avoid flushing the
1266 read queue until jtag_execute_queue(). This can
1267 reduce latency dramatically for cases where
1268 callbacks are used extensively.
1270 #define callbackqueue_size 128
1271 static struct callbackentry
1273 jtag_callback_t callback;
1274 jtag_callback_data_t data0;
1275 jtag_callback_data_t data1;
1276 jtag_callback_data_t data2;
1277 jtag_callback_data_t data3;
1278 } callbackqueue[callbackqueue_size];
1280 static int callbackqueue_pos = 0;
1282 void zy1000_jtag_add_callback4(jtag_callback_t callback, jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
1284 if (callbackqueue_pos >= callbackqueue_size)
1286 zy1000_flush_callbackqueue();
1289 callbackqueue[callbackqueue_pos].callback = callback;
1290 callbackqueue[callbackqueue_pos].data0 = data0;
1291 callbackqueue[callbackqueue_pos].data1 = data1;
1292 callbackqueue[callbackqueue_pos].data2 = data2;
1293 callbackqueue[callbackqueue_pos].data3 = data3;
1294 callbackqueue_pos++;
1297 static int zy1000_jtag_convert_to_callback4(jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
1299 ((jtag_callback1_t)data1)(data0);
1303 void zy1000_jtag_add_callback(jtag_callback1_t callback, jtag_callback_data_t data0)
1305 zy1000_jtag_add_callback4(zy1000_jtag_convert_to_callback4, data0, (jtag_callback_data_t)callback, 0, 0);
1308 void zy1000_flush_callbackqueue(void)
1310 /* we have to flush the read queue so we have access to
1311 the data the callbacks will use
1313 zy1000_flush_readqueue();
1315 for (i = 0; i < callbackqueue_pos; i++)
1317 struct callbackentry *entry = &callbackqueue[i];
1318 jtag_set_error(entry->callback(entry->data0, entry->data1, entry->data2, entry->data3));
1320 callbackqueue_pos = 0;
1323 static void writeShiftValue(uint8_t *data, int bits)
1327 if (!writeLong((ZY1000_CMD_PEEK << 24) | (ZY1000_JTAG_BASE + 0xc)))
1329 fprintf(stderr, "Could not read from zy1000 server\n");
1333 if (readqueue_pos >= readqueue_size)
1335 zy1000_flush_readqueue();
1338 readqueue[readqueue_pos].dest = data;
1339 readqueue[readqueue_pos].bits = bits;
1345 static void writeShiftValue(uint8_t *data, int bits)
1349 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
1350 VERBOSE(LOG_INFO("getShiftValue %08x", value));
1352 // data in, LSB to MSB
1353 // we're shifting in data to MSB, shift data to be aligned for returning the value
1354 value >>= 32 - bits;
1356 for (int l = 0; l < bits; l += 8)
1358 data[l/8]=(value >> l)&0xff;
1364 #if BUILD_ZY1000_MASTER
1369 static char watchdog_stack[2048];
1370 static cyg_thread watchdog_thread_object;
1371 static cyg_handle_t watchdog_thread_handle;
1374 /* Infinite loop peeking & poking */
1375 static void tcpipserver(void)
1380 if (!readLong(&address))
1382 enum ZY1000_CMD c = (address >> 24) & 0xff;
1383 address &= 0xffffff;
1386 case ZY1000_CMD_POKE:
1389 if (!readLong(&data))
1391 address &= ~0x80000000;
1392 ZY1000_POKE(address + ZY1000_JTAG_BASE, data);
1395 case ZY1000_CMD_PEEK:
1398 ZY1000_PEEK(address + ZY1000_JTAG_BASE, data);
1399 if (!writeLong(data))
1403 case ZY1000_CMD_SLEEP:
1406 if (!readLong(&data))
1408 /* Wait for some us */
1412 case ZY1000_CMD_WAITIDLE:
1424 static void *tcpip_server(void *data)
1426 int so_reuseaddr_option = 1;
1429 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1431 LOG_ERROR("error creating socket: %s", strerror(errno));
1435 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1438 struct sockaddr_in sin;
1439 unsigned int address_size;
1440 address_size = sizeof(sin);
1441 memset(&sin, 0, sizeof(sin));
1442 sin.sin_family = AF_INET;
1443 sin.sin_addr.s_addr = INADDR_ANY;
1444 sin.sin_port = htons(7777);
1446 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1448 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1452 if (listen(fd, 1) == -1)
1454 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1461 tcp_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1468 setsockopt(tcp_ip, /* socket affected */
1469 IPPROTO_TCP, /* set option at TCP level */
1470 TCP_NODELAY, /* name of option */
1471 (char *)&flag, /* the cast is historical cruft */
1472 sizeof(int)); /* length of option value */
1474 bool save_poll = jtag_poll_get_enabled();
1476 /* polling will screw up the "connection" */
1477 jtag_poll_set_enabled(false);
1481 jtag_poll_set_enabled(save_poll);
1486 /* Never reached actually */
1492 #ifdef WATCHDOG_BASE
1493 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1494 static void watchdog_server(cyg_addrword_t data)
1496 int so_reuseaddr_option = 1;
1499 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1501 LOG_ERROR("error creating socket: %s", strerror(errno));
1505 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1508 struct sockaddr_in sin;
1509 unsigned int address_size;
1510 address_size = sizeof(sin);
1511 memset(&sin, 0, sizeof(sin));
1512 sin.sin_family = AF_INET;
1513 sin.sin_addr.s_addr = INADDR_ANY;
1514 sin.sin_port = htons(8888);
1516 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1518 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1522 if (listen(fd, 1) == -1)
1524 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1531 int watchdog_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1533 /* Start watchdog, must be reset every 10 seconds. */
1534 HAL_WRITE_UINT32(WATCHDOG_BASE + 4, 4);
1536 if (watchdog_ip < 0)
1538 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno));
1543 setsockopt(watchdog_ip, /* socket affected */
1544 IPPROTO_TCP, /* set option at TCP level */
1545 TCP_NODELAY, /* name of option */
1546 (char *)&flag, /* the cast is historical cruft */
1547 sizeof(int)); /* length of option value */
1553 if (read(watchdog_ip, &buf, 1) == 1)
1556 HAL_WRITE_UINT32(WATCHDOG_BASE + 8, 0x1234);
1557 /* Echo so we can telnet in and see that resetting works */
1558 write(watchdog_ip, &buf, 1);
1561 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1576 #if BUILD_ZY1000_MASTER
1577 int interface_jtag_add_sleep(uint32_t us)
1584 #if BUILD_ZY1000_MASTER && !BUILD_ECOSBOARD
1585 volatile void *zy1000_jtag_master;
1586 #include <sys/mman.h>
1589 int zy1000_init(void)
1592 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
1593 #elif BUILD_ZY1000_MASTER
1595 if((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1)
1597 LOG_ERROR("No access to /dev/mem");
1600 #ifndef REGISTERS_BASE
1601 #define REGISTERS_BASE 0x9002000
1602 #define REGISTERS_SPAN 128
1605 zy1000_jtag_master = mmap(0, REGISTERS_SPAN, PROT_READ | PROT_WRITE, MAP_SHARED, fd, REGISTERS_BASE);
1607 if(zy1000_jtag_master == (void *) -1)
1610 LOG_ERROR("No access to /dev/mem");
1617 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
1619 setPower(true); // on by default
1622 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1625 int retval = jtag_get_speed(&jtag_speed_var);
1626 if (retval != ERROR_OK)
1628 zy1000_speed(jtag_speed_var);
1630 #if BUILD_ZY1000_MASTER
1631 pthread_create(&thread, NULL, tcpip_server, NULL);
1634 #ifdef WATCHDOG_BASE
1635 cyg_thread_create(1, watchdog_server, (cyg_addrword_t) 0, "watchdog tcip/ip server",
1636 (void *) watchdog_stack, sizeof(watchdog_stack),
1637 &watchdog_thread_handle, &watchdog_thread_object);
1638 cyg_thread_resume(watchdog_thread_handle);
1648 struct jtag_interface zy1000_interface =
1651 .supported = DEBUG_CAP_TMS_SEQ,
1652 .execute_queue = NULL,
1653 .speed = zy1000_speed,
1654 .commands = zy1000_commands,
1655 .init = zy1000_init,
1656 .quit = zy1000_quit,
1658 .speed_div = zy1000_speed_div,
1659 .power_dropout = zy1000_power_dropout,
1660 .srst_asserted = zy1000_srst_asserted,