1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /***************************************************************************
4 * Copyright (C) 2005 by Dominic Rath *
5 * Dominic.Rath@gmx.de *
6 ***************************************************************************/
12 #include <jtag/interface.h>
25 static uint8_t output_value;
26 static int dev_mem_fd;
27 static uint8_t *gpio_controller;
28 static volatile uint8_t *gpio_data_register;
29 static volatile uint8_t *gpio_data_direction_register;
31 /* low level command set
33 static bb_value_t ep93xx_read(void);
34 static int ep93xx_write(int tck, int tms, int tdi);
35 static int ep93xx_reset(int trst, int srst);
37 static int ep93xx_init(void);
38 static int ep93xx_quit(void);
40 struct timespec ep93xx_zzzz;
42 static struct jtag_interface ep93xx_interface = {
43 .supported = DEBUG_CAP_TMS_SEQ,
44 .execute_queue = bitbang_execute_queue,
47 struct adapter_driver ep93xx_adapter_driver = {
49 .transports = jtag_only,
53 .reset = ep93xx_reset,
55 .jtag_ops = &ep93xx_interface,
58 static struct bitbang_interface ep93xx_bitbang = {
60 .write = ep93xx_write,
64 static bb_value_t ep93xx_read(void)
66 return (*gpio_data_register & TDO_BIT) ? BB_HIGH : BB_LOW;
69 static int ep93xx_write(int tck, int tms, int tdi)
72 output_value |= TCK_BIT;
74 output_value &= ~TCK_BIT;
77 output_value |= TMS_BIT;
79 output_value &= ~TMS_BIT;
82 output_value |= TDI_BIT;
84 output_value &= ~TDI_BIT;
86 *gpio_data_register = output_value;
87 nanosleep(&ep93xx_zzzz, NULL);
92 /* (1) assert or (0) deassert reset lines */
93 static int ep93xx_reset(int trst, int srst)
96 output_value |= TRST_BIT;
98 output_value &= ~TRST_BIT;
101 output_value |= SRST_BIT;
103 output_value &= ~SRST_BIT;
105 *gpio_data_register = output_value;
106 nanosleep(&ep93xx_zzzz, NULL);
111 static int set_gonk_mode(void)
113 void *syscon = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
114 MAP_SHARED, dev_mem_fd, 0x80930000);
115 if (syscon == MAP_FAILED) {
116 LOG_ERROR("mmap: %s", strerror(errno));
117 return ERROR_JTAG_INIT_FAILED;
120 uint32_t devicecfg = *((volatile uint32_t *)((uintptr_t)syscon + 0x80));
121 *((volatile uint32_t *)((uintptr_t)syscon + 0xc0)) = 0xaa;
122 *((volatile uint32_t *)((uintptr_t)syscon + 0x80)) = devicecfg | 0x08000000;
124 munmap(syscon, 4096);
129 static int ep93xx_init(void)
133 bitbang_interface = &ep93xx_bitbang;
135 ep93xx_zzzz.tv_sec = 0;
136 ep93xx_zzzz.tv_nsec = 10000000;
138 dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
139 if (dev_mem_fd < 0) {
140 LOG_ERROR("open: %s", strerror(errno));
141 return ERROR_JTAG_INIT_FAILED;
144 gpio_controller = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
145 MAP_SHARED, dev_mem_fd, 0x80840000);
146 if (gpio_controller == MAP_FAILED) {
147 LOG_ERROR("mmap: %s", strerror(errno));
149 return ERROR_JTAG_INIT_FAILED;
152 ret = set_gonk_mode();
153 if (ret != ERROR_OK) {
154 munmap(gpio_controller, 4096);
160 /* Use GPIO port A. */
161 gpio_data_register = gpio_controller + 0x00;
162 gpio_data_direction_register = gpio_controller + 0x10;
165 /* Use GPIO port B. */
166 gpio_data_register = gpio_controller + 0x04;
167 gpio_data_direction_register = gpio_controller + 0x14;
169 /* Use GPIO port C. */
170 gpio_data_register = gpio_controller + 0x08;
171 gpio_data_direction_register = gpio_controller + 0x18;
173 /* Use GPIO port D. */
174 gpio_data_register = gpio_controller + 0x0c;
175 gpio_data_direction_register = gpio_controller + 0x1c;
178 /* Use GPIO port C. */
179 gpio_data_register = gpio_controller + 0x08;
180 gpio_data_direction_register = gpio_controller + 0x18;
182 LOG_INFO("gpio_data_register = %p", gpio_data_register);
183 LOG_INFO("gpio_data_direction_reg = %p", gpio_data_direction_register);
185 * Configure bit 0 (TDO) as an input, and bits 1-5 (TDI, TCK
186 * TMS, TRST, SRST) as outputs. Drive TDI and TCK low, and
187 * TMS/TRST/SRST high.
189 output_value = TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
190 *gpio_data_register = output_value;
191 nanosleep(&ep93xx_zzzz, NULL);
194 * Configure the direction register. 1 = output, 0 = input.
196 *gpio_data_direction_register =
197 TDI_BIT | TCK_BIT | TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
199 nanosleep(&ep93xx_zzzz, NULL);
203 static int ep93xx_quit(void)