1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /***************************************************************************
4 * Copyright (C) 2022 by Steve Marple, stevemarple@googlemail.com *
6 * Based on bcm2835gpio.c and linuxgpiod.c *
7 ***************************************************************************/
13 #include <jtag/interface.h>
14 #include <transport/transport.h>
20 * GPIO register base addresses. Values taken from "AM335x and AMIC110 Sitara
21 * Processors Technical Reference Manual", Chapter 2 Memory Map.
23 #define AM335XGPIO_NUM_GPIO_PORTS 4
24 #define AM335XGPIO_GPIO0_HW_ADDR 0x44E07000
25 #define AM335XGPIO_GPIO1_HW_ADDR 0x4804C000
26 #define AM335XGPIO_GPIO2_HW_ADDR 0x481AC000
27 #define AM335XGPIO_GPIO3_HW_ADDR 0x481AE000
29 /* 32-bit offsets from GPIO port base address. Values taken from "AM335x and
30 * AMIC110 Sitara Processors Technical Reference Manual", Chapter 25
31 * General-Purpose Input/Output.
33 #define AM335XGPIO_GPIO_OE_OFFSET (0x134 / 4)
34 #define AM335XGPIO_GPIO_DATAIN_OFFSET (0x138 / 4)
35 #define AM335XGPIO_GPIO_DATAOUT_OFFSET (0x13C / 4) /* DATAOUT register uses 0 for output, 1 for input */
36 #define AM335XGPIO_GPIO_CLEARDATAOUT_OFFSET (0x190 / 4)
37 #define AM335XGPIO_GPIO_SETDATAOUT_OFFSET (0x194 / 4)
39 /* GPIOs are integer values; need to map to a port module, and the pin within
40 * that module. GPIOs 0 to 31 map to GPIO0, 32 to 63 to GPIO1 etc. This scheme
41 * matches that used by Linux on the BeagleBone.
43 #define AM335XGPIO_PORT_NUM(gpio_num) ((gpio_num) / 32)
44 #define AM335XGPIO_BIT_NUM(gpio_num) ((gpio_num) % 32)
45 #define AM335XGPIO_BIT_MASK(gpio_num) BIT(AM335XGPIO_BIT_NUM(gpio_num))
47 #define AM335XGPIO_READ_REG(gpio_num, offset) \
48 (*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + (offset)))
50 #define AM335XGPIO_WRITE_REG(gpio_num, offset, value) \
51 (*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + (offset)) = (value))
53 #define AM335XGPIO_SET_REG_BITS(gpio_num, offset, bit_mask) \
54 (*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + (offset)) |= (bit_mask))
56 #define AM335XGPIO_CLEAR_REG_BITS(gpio_num, offset, bit_mask) \
57 (*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + (offset)) &= ~(bit_mask))
59 enum amx335gpio_gpio_mode {
60 AM335XGPIO_GPIO_MODE_INPUT,
61 AM335XGPIO_GPIO_MODE_OUTPUT, /* To set output mode but not state */
62 AM335XGPIO_GPIO_MODE_OUTPUT_LOW,
63 AM335XGPIO_GPIO_MODE_OUTPUT_HIGH,
66 static const uint32_t am335xgpio_gpio_port_hw_addr[AM335XGPIO_NUM_GPIO_PORTS] = {
67 AM335XGPIO_GPIO0_HW_ADDR,
68 AM335XGPIO_GPIO1_HW_ADDR,
69 AM335XGPIO_GPIO2_HW_ADDR,
70 AM335XGPIO_GPIO3_HW_ADDR,
73 /* Memory-mapped address pointers */
74 static volatile uint32_t *am335xgpio_gpio_port_mmap_addr[AM335XGPIO_NUM_GPIO_PORTS];
76 static int dev_mem_fd;
78 /* GPIO numbers for each signal. Negative values are invalid */
79 static int tck_gpio = -1;
80 static enum amx335gpio_gpio_mode tck_gpio_mode;
81 static int tms_gpio = -1;
82 static enum amx335gpio_gpio_mode tms_gpio_mode;
83 static int tdi_gpio = -1;
84 static enum amx335gpio_gpio_mode tdi_gpio_mode;
85 static int tdo_gpio = -1;
86 static enum amx335gpio_gpio_mode tdo_gpio_mode;
87 static int trst_gpio = -1;
88 static enum amx335gpio_gpio_mode trst_gpio_mode;
89 static int srst_gpio = -1;
90 static enum amx335gpio_gpio_mode srst_gpio_mode;
91 static int swclk_gpio = -1;
92 static enum amx335gpio_gpio_mode swclk_gpio_mode;
93 static int swdio_gpio = -1;
94 static enum amx335gpio_gpio_mode swdio_gpio_mode;
95 static int swdio_dir_gpio = -1;
96 static enum amx335gpio_gpio_mode swdio_dir_gpio_mode;
97 static int led_gpio = -1;
98 static enum amx335gpio_gpio_mode led_gpio_mode = -1;
100 static bool swdio_dir_is_active_high = true; /* Active state means output */
101 static bool led_is_active_high = true;
103 /* Transition delay coefficients */
104 static int speed_coeff = 600000;
105 static int speed_offset = 575;
106 static unsigned int jtag_delay;
108 static int is_gpio_valid(int gpio_num)
110 return gpio_num >= 0 && gpio_num < (32 * AM335XGPIO_NUM_GPIO_PORTS);
113 static int get_gpio_value(int gpio_num)
115 unsigned int shift = AM335XGPIO_BIT_NUM(gpio_num);
116 return (AM335XGPIO_READ_REG(gpio_num, AM335XGPIO_GPIO_DATAIN_OFFSET) >> shift) & 1;
119 static void set_gpio_value(int gpio_num, int value)
122 AM335XGPIO_WRITE_REG(gpio_num, AM335XGPIO_GPIO_SETDATAOUT_OFFSET, AM335XGPIO_BIT_MASK(gpio_num));
124 AM335XGPIO_WRITE_REG(gpio_num, AM335XGPIO_GPIO_CLEARDATAOUT_OFFSET, AM335XGPIO_BIT_MASK(gpio_num));
127 static enum amx335gpio_gpio_mode get_gpio_mode(int gpio_num)
129 if (AM335XGPIO_READ_REG(gpio_num, AM335XGPIO_GPIO_OE_OFFSET) & AM335XGPIO_BIT_MASK(gpio_num)) {
130 return AM335XGPIO_GPIO_MODE_INPUT;
132 /* Return output level too so that pin mode can be fully restored */
133 if (AM335XGPIO_READ_REG(gpio_num, AM335XGPIO_GPIO_DATAOUT_OFFSET) & AM335XGPIO_BIT_MASK(gpio_num))
134 return AM335XGPIO_GPIO_MODE_OUTPUT_HIGH;
136 return AM335XGPIO_GPIO_MODE_OUTPUT_LOW;
140 static void set_gpio_mode(int gpio_num, enum amx335gpio_gpio_mode gpio_mode)
142 if (gpio_mode == AM335XGPIO_GPIO_MODE_INPUT) {
143 AM335XGPIO_SET_REG_BITS(gpio_num, AM335XGPIO_GPIO_OE_OFFSET, AM335XGPIO_BIT_MASK(gpio_num));
147 if (gpio_mode == AM335XGPIO_GPIO_MODE_OUTPUT_LOW)
148 set_gpio_value(gpio_num, 0);
149 if (gpio_mode == AM335XGPIO_GPIO_MODE_OUTPUT_HIGH)
150 set_gpio_value(gpio_num, 1);
152 if (gpio_mode == AM335XGPIO_GPIO_MODE_OUTPUT ||
153 gpio_mode == AM335XGPIO_GPIO_MODE_OUTPUT_LOW ||
154 gpio_mode == AM335XGPIO_GPIO_MODE_OUTPUT_HIGH) {
155 AM335XGPIO_CLEAR_REG_BITS(gpio_num, AM335XGPIO_GPIO_OE_OFFSET, AM335XGPIO_BIT_MASK(gpio_num));
159 static const char *get_gpio_mode_name(enum amx335gpio_gpio_mode gpio_mode)
162 case AM335XGPIO_GPIO_MODE_INPUT:
164 case AM335XGPIO_GPIO_MODE_OUTPUT:
166 case AM335XGPIO_GPIO_MODE_OUTPUT_LOW:
167 return "output (low)";
168 case AM335XGPIO_GPIO_MODE_OUTPUT_HIGH:
169 return "output (high)";
175 static bb_value_t am335xgpio_read(void)
177 return get_gpio_value(tdo_gpio) ? BB_HIGH : BB_LOW;
180 static int am335xgpio_write(int tck, int tms, int tdi)
182 set_gpio_value(tdi_gpio, tdi);
183 set_gpio_value(tms_gpio, tms);
184 set_gpio_value(tck_gpio, tck); /* Write clock last */
186 for (unsigned int i = 0; i < jtag_delay; ++i)
192 static int am335xgpio_swd_write(int swclk, int swdio)
194 set_gpio_value(swdio_gpio, swdio);
195 set_gpio_value(swclk_gpio, swclk); /* Write clock last */
197 for (unsigned int i = 0; i < jtag_delay; ++i)
203 /* (1) assert or (0) deassert reset lines */
204 static int am335xgpio_reset(int trst, int srst)
206 /* assume active low */
207 if (is_gpio_valid(srst_gpio)) {
208 if (jtag_get_reset_config() & RESET_SRST_PUSH_PULL)
209 set_gpio_mode(srst_gpio, srst ? AM335XGPIO_GPIO_MODE_OUTPUT_LOW : AM335XGPIO_GPIO_MODE_OUTPUT_HIGH);
211 set_gpio_mode(srst_gpio, srst ? AM335XGPIO_GPIO_MODE_OUTPUT_LOW : AM335XGPIO_GPIO_MODE_INPUT);
214 /* assume active low */
215 if (is_gpio_valid(trst_gpio)) {
216 if (jtag_get_reset_config() & RESET_TRST_OPEN_DRAIN)
217 set_gpio_mode(trst_gpio, trst ? AM335XGPIO_GPIO_MODE_OUTPUT_LOW : AM335XGPIO_GPIO_MODE_INPUT);
219 set_gpio_mode(trst_gpio, trst ? AM335XGPIO_GPIO_MODE_OUTPUT_LOW : AM335XGPIO_GPIO_MODE_OUTPUT_HIGH);
222 LOG_DEBUG("am335xgpio_reset(%d, %d), trst_gpio: %d (%s), srst_gpio: %d (%s)",
224 trst_gpio, get_gpio_mode_name(get_gpio_mode(trst_gpio)),
225 srst_gpio, get_gpio_mode_name(get_gpio_mode(srst_gpio)));
229 static void am335xgpio_swdio_drive(bool is_output)
232 set_gpio_value(swdio_dir_gpio, swdio_dir_is_active_high ? 1 : 0);
233 set_gpio_mode(swdio_gpio, AM335XGPIO_GPIO_MODE_OUTPUT);
235 set_gpio_mode(swdio_gpio, AM335XGPIO_GPIO_MODE_INPUT);
236 set_gpio_value(swdio_dir_gpio, swdio_dir_is_active_high ? 0 : 1);
240 static int am335xgpio_swdio_read(void)
242 return get_gpio_value(swdio_gpio);
245 static int am335xgpio_blink(int on)
247 if (is_gpio_valid(led_gpio))
248 set_gpio_value(led_gpio, (!on ^ led_is_active_high) ? 1 : 0);
253 static struct bitbang_interface am335xgpio_bitbang = {
254 .read = am335xgpio_read,
255 .write = am335xgpio_write,
256 .swdio_read = am335xgpio_swdio_read,
257 .swdio_drive = am335xgpio_swdio_drive,
258 .swd_write = am335xgpio_swd_write,
259 .blink = am335xgpio_blink
262 static int am335xgpio_khz(int khz, int *jtag_speed)
265 LOG_DEBUG("RCLK not supported");
268 *jtag_speed = speed_coeff / khz - speed_offset;
274 static int am335xgpio_speed_div(int speed, int *khz)
276 *khz = speed_coeff / (speed + speed_offset);
280 static int am335xgpio_speed(int speed)
286 COMMAND_HANDLER(am335xgpio_handle_jtag_gpionums)
289 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio);
290 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], tms_gpio);
291 COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], tdi_gpio);
292 COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], tdo_gpio);
293 } else if (CMD_ARGC != 0) {
294 return ERROR_COMMAND_SYNTAX_ERROR;
297 command_print(CMD, "AM335x GPIO config: tck = %d, tms = %d, tdi = %d, tdo = %d",
298 tck_gpio, tms_gpio, tdi_gpio, tdo_gpio);
302 COMMAND_HANDLER(am335xgpio_handle_jtag_gpionum_tck)
305 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio);
307 command_print(CMD, "AM335x GPIO config: tck = %d", tck_gpio);
311 COMMAND_HANDLER(am335xgpio_handle_jtag_gpionum_tms)
314 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tms_gpio);
316 command_print(CMD, "AM335x GPIO config: tms = %d", tms_gpio);
320 COMMAND_HANDLER(am335xgpio_handle_jtag_gpionum_tdo)
323 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tdo_gpio);
325 command_print(CMD, "AM335x GPIO config: tdo = %d", tdo_gpio);
329 COMMAND_HANDLER(am335xgpio_handle_jtag_gpionum_tdi)
332 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tdi_gpio);
334 command_print(CMD, "AM335x GPIO config: tdi = %d", tdi_gpio);
338 COMMAND_HANDLER(am335xgpio_handle_jtag_gpionum_srst)
341 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], srst_gpio);
343 command_print(CMD, "AM335x GPIO config: srst = %d", srst_gpio);
347 COMMAND_HANDLER(am335xgpio_handle_jtag_gpionum_trst)
350 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], trst_gpio);
352 command_print(CMD, "AM335x GPIO config: trst = %d", trst_gpio);
356 COMMAND_HANDLER(am335xgpio_handle_swd_gpionums)
359 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
360 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], swdio_gpio);
361 } else if (CMD_ARGC != 0) {
362 return ERROR_COMMAND_SYNTAX_ERROR;
365 command_print(CMD, "AM335x GPIO config: swclk = %d, swdio = %d", swclk_gpio, swdio_gpio);
370 COMMAND_HANDLER(am335xgpio_handle_swd_gpionum_swclk)
373 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
375 command_print(CMD, "AM335x GPIO config: swclk = %d", swclk_gpio);
379 COMMAND_HANDLER(am335xgpio_handle_swd_gpionum_swdio)
382 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swdio_gpio);
384 command_print(CMD, "AM335x GPIO config: swdio = %d", swdio_gpio);
388 COMMAND_HANDLER(am335xgpio_handle_swd_gpionum_swdio_dir)
391 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swdio_dir_gpio);
393 command_print(CMD, "AM335x GPIO config: swdio_dir = %d", swdio_dir_gpio);
397 COMMAND_HANDLER(am335xgpio_handle_swd_dir_output_state)
400 COMMAND_PARSE_BOOL(CMD_ARGV[0], swdio_dir_is_active_high, "high", "low");
402 command_print(CMD, "AM335x GPIO config: swdio_dir_output_state = %s", swdio_dir_is_active_high ? "high" : "low");
406 COMMAND_HANDLER(am335xgpio_handle_gpionum_led)
409 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], led_gpio);
411 command_print(CMD, "AM335x GPIO config: led = %d", led_gpio);
415 COMMAND_HANDLER(am335xgpio_handle_led_on_state)
418 COMMAND_PARSE_BOOL(CMD_ARGV[0], led_is_active_high, "high", "low");
420 command_print(CMD, "AM335x GPIO config: led_on_state = %s", led_is_active_high ? "high" : "low");
424 COMMAND_HANDLER(am335xgpio_handle_speed_coeffs)
427 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], speed_coeff);
428 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], speed_offset);
431 command_print(CMD, "AM335x GPIO config: speed_coeffs = %d, speed_offset = %d",
432 speed_coeff, speed_offset);
436 static const struct command_registration am335xgpio_subcommand_handlers[] = {
439 .handler = am335xgpio_handle_jtag_gpionums,
440 .mode = COMMAND_CONFIG,
441 .help = "gpio numbers for tck, tms, tdi, tdo (in that order).",
442 .usage = "[tck tms tdi tdo]",
446 .handler = am335xgpio_handle_jtag_gpionum_tck,
447 .mode = COMMAND_CONFIG,
448 .help = "gpio number for tck.",
453 .handler = am335xgpio_handle_jtag_gpionum_tms,
454 .mode = COMMAND_CONFIG,
455 .help = "gpio number for tms.",
460 .handler = am335xgpio_handle_jtag_gpionum_tdo,
461 .mode = COMMAND_CONFIG,
462 .help = "gpio number for tdo.",
467 .handler = am335xgpio_handle_jtag_gpionum_tdi,
468 .mode = COMMAND_CONFIG,
469 .help = "gpio number for tdi.",
474 .handler = am335xgpio_handle_swd_gpionums,
475 .mode = COMMAND_CONFIG,
476 .help = "gpio numbers for swclk, swdio (in that order).",
477 .usage = "[swclk swdio]",
481 .handler = am335xgpio_handle_swd_gpionum_swclk,
482 .mode = COMMAND_CONFIG,
483 .help = "gpio number for swclk.",
488 .handler = am335xgpio_handle_swd_gpionum_swdio,
489 .mode = COMMAND_CONFIG,
490 .help = "gpio number for swdio.",
494 .name = "swdio_dir_num",
495 .handler = am335xgpio_handle_swd_gpionum_swdio_dir,
496 .mode = COMMAND_CONFIG,
497 .help = "gpio number for swdio direction control pin.",
498 .usage = "[swdio_dir]",
501 .name = "swdio_dir_output_state",
502 .handler = am335xgpio_handle_swd_dir_output_state,
503 .mode = COMMAND_CONFIG,
504 .help = "required state for swdio_dir pin to select SWDIO buffer to be output.",
505 .usage = "['off'|'on']",
509 .handler = am335xgpio_handle_jtag_gpionum_srst,
510 .mode = COMMAND_CONFIG,
511 .help = "gpio number for srst.",
516 .handler = am335xgpio_handle_jtag_gpionum_trst,
517 .mode = COMMAND_CONFIG,
518 .help = "gpio number for trst.",
523 .handler = am335xgpio_handle_gpionum_led,
524 .mode = COMMAND_CONFIG,
525 .help = "gpio number for led.",
529 .name = "led_on_state",
530 .handler = am335xgpio_handle_led_on_state,
531 .mode = COMMAND_CONFIG,
532 .help = "required state for led pin to turn on LED.",
533 .usage = "['off'|'on']",
536 .name = "speed_coeffs",
537 .handler = am335xgpio_handle_speed_coeffs,
538 .mode = COMMAND_CONFIG,
539 .help = "SPEED_COEFF and SPEED_OFFSET for delay calculations.",
540 .usage = "[SPEED_COEFF SPEED_OFFSET]",
542 COMMAND_REGISTRATION_DONE
545 static const struct command_registration am335xgpio_command_handlers[] = {
547 .name = "am335xgpio",
549 .help = "perform am335xgpio management",
550 .chain = am335xgpio_subcommand_handlers,
553 COMMAND_REGISTRATION_DONE
556 static const char * const am335xgpio_transports[] = { "jtag", "swd", NULL };
558 static struct jtag_interface am335xgpio_interface = {
559 .supported = DEBUG_CAP_TMS_SEQ,
560 .execute_queue = bitbang_execute_queue,
563 static bool am335xgpio_jtag_mode_possible(void)
565 if (!is_gpio_valid(tck_gpio))
567 if (!is_gpio_valid(tms_gpio))
569 if (!is_gpio_valid(tdi_gpio))
571 if (!is_gpio_valid(tdo_gpio))
576 static bool am335xgpio_swd_mode_possible(void)
578 if (!is_gpio_valid(swclk_gpio))
580 if (!is_gpio_valid(swdio_gpio))
585 static int am335xgpio_init(void)
587 bitbang_interface = &am335xgpio_bitbang;
589 LOG_INFO("AM335x GPIO JTAG/SWD bitbang driver");
591 if (transport_is_jtag() && !am335xgpio_jtag_mode_possible()) {
592 LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode");
593 return ERROR_JTAG_INIT_FAILED;
596 if (transport_is_swd() && !am335xgpio_swd_mode_possible()) {
597 LOG_ERROR("Require swclk and swdio gpio for SWD mode");
598 return ERROR_JTAG_INIT_FAILED;
601 dev_mem_fd = open("/dev/gpiomem", O_RDWR | O_SYNC);
602 if (dev_mem_fd < 0) {
603 LOG_DEBUG("Cannot open /dev/gpiomem, fallback to /dev/mem");
604 dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
606 if (dev_mem_fd < 0) {
607 LOG_ERROR("open: %s", strerror(errno));
608 return ERROR_JTAG_INIT_FAILED;
611 for (unsigned int i = 0; i < AM335XGPIO_NUM_GPIO_PORTS; ++i) {
612 am335xgpio_gpio_port_mmap_addr[i] = mmap(NULL, sysconf(_SC_PAGE_SIZE), PROT_READ | PROT_WRITE,
613 MAP_SHARED, dev_mem_fd, am335xgpio_gpio_port_hw_addr[i]);
615 if (am335xgpio_gpio_port_mmap_addr[i] == MAP_FAILED) {
616 LOG_ERROR("mmap: %s", strerror(errno));
618 return ERROR_JTAG_INIT_FAILED;
623 * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST as outputs.
624 * Drive TDI and TCK low, and TMS high.
626 if (transport_is_jtag()) {
627 tdo_gpio_mode = get_gpio_mode(tdo_gpio);
628 tdi_gpio_mode = get_gpio_mode(tdi_gpio);
629 tck_gpio_mode = get_gpio_mode(tck_gpio);
630 tms_gpio_mode = get_gpio_mode(tms_gpio);
631 LOG_DEBUG("saved GPIO mode for tdo (GPIO #%d): %s", tdo_gpio, get_gpio_mode_name(tdo_gpio_mode));
632 LOG_DEBUG("saved GPIO mode for tdi (GPIO #%d): %s", tdi_gpio, get_gpio_mode_name(tdi_gpio_mode));
633 LOG_DEBUG("saved GPIO mode for tck (GPIO #%d): %s", tck_gpio, get_gpio_mode_name(tck_gpio_mode));
634 LOG_DEBUG("saved GPIO mode for tms (GPIO #%d): %s", tms_gpio, get_gpio_mode_name(tms_gpio_mode));
636 set_gpio_mode(tdo_gpio, AM335XGPIO_GPIO_MODE_INPUT);
637 set_gpio_mode(tdi_gpio, AM335XGPIO_GPIO_MODE_OUTPUT_LOW);
638 set_gpio_mode(tms_gpio, AM335XGPIO_GPIO_MODE_OUTPUT_HIGH);
639 set_gpio_mode(tck_gpio, AM335XGPIO_GPIO_MODE_OUTPUT_LOW);
641 if (is_gpio_valid(trst_gpio)) {
642 trst_gpio_mode = get_gpio_mode(trst_gpio);
643 LOG_DEBUG("saved GPIO mode for trst (GPIO #%d): %s", trst_gpio, get_gpio_mode_name(trst_gpio_mode));
647 if (transport_is_swd()) {
648 swclk_gpio_mode = get_gpio_mode(swclk_gpio);
649 swdio_gpio_mode = get_gpio_mode(swdio_gpio);
650 LOG_DEBUG("saved GPIO mode for swclk (GPIO #%d): %s", swclk_gpio, get_gpio_mode_name(swclk_gpio_mode));
651 LOG_DEBUG("saved GPIO mode for swdio (GPIO #%d): %s", swdio_gpio, get_gpio_mode_name(swdio_gpio_mode));
652 if (is_gpio_valid(swdio_dir_gpio)) {
653 swdio_dir_gpio_mode = get_gpio_mode(swdio_dir_gpio);
654 LOG_DEBUG("saved GPIO mode for swdio_dir (GPIO #%d): %s",
655 swdio_dir_gpio, get_gpio_mode_name(swdio_dir_gpio_mode));
656 set_gpio_mode(swdio_dir_gpio,
657 swdio_dir_is_active_high ? AM335XGPIO_GPIO_MODE_OUTPUT_HIGH : AM335XGPIO_GPIO_MODE_OUTPUT_LOW);
660 set_gpio_mode(swdio_gpio, AM335XGPIO_GPIO_MODE_OUTPUT_LOW);
661 set_gpio_mode(swclk_gpio, AM335XGPIO_GPIO_MODE_OUTPUT_LOW);
664 if (is_gpio_valid(srst_gpio)) {
665 srst_gpio_mode = get_gpio_mode(srst_gpio);
666 LOG_DEBUG("saved GPIO mode for srst (GPIO #%d): %s", srst_gpio, get_gpio_mode_name(srst_gpio_mode));
669 if (is_gpio_valid(led_gpio)) {
670 led_gpio_mode = get_gpio_mode(led_gpio);
671 LOG_DEBUG("saved GPIO mode for led (GPIO #%d): %s", led_gpio, get_gpio_mode_name(led_gpio_mode));
672 set_gpio_mode(led_gpio,
673 led_is_active_high ? AM335XGPIO_GPIO_MODE_OUTPUT_LOW : AM335XGPIO_GPIO_MODE_OUTPUT_HIGH);
676 /* Set GPIO modes for TRST and SRST and make both inactive */
677 am335xgpio_reset(0, 0);
681 static int am335xgpio_quit(void)
683 if (transport_is_jtag()) {
684 set_gpio_mode(tdo_gpio, tdo_gpio_mode);
685 set_gpio_mode(tdi_gpio, tdi_gpio_mode);
686 set_gpio_mode(tck_gpio, tck_gpio_mode);
687 set_gpio_mode(tms_gpio, tms_gpio_mode);
688 if (is_gpio_valid(trst_gpio))
689 set_gpio_mode(trst_gpio, trst_gpio_mode);
692 if (transport_is_swd()) {
693 set_gpio_mode(swclk_gpio, swclk_gpio_mode);
694 set_gpio_mode(swdio_gpio, swdio_gpio_mode);
695 if (is_gpio_valid(swdio_dir_gpio))
696 set_gpio_mode(swdio_dir_gpio, swdio_dir_gpio_mode);
699 if (is_gpio_valid(srst_gpio))
700 set_gpio_mode(srst_gpio, srst_gpio_mode);
702 if (is_gpio_valid(led_gpio))
703 set_gpio_mode(led_gpio, led_gpio_mode);
708 struct adapter_driver am335xgpio_adapter_driver = {
709 .name = "am335xgpio",
710 .transports = am335xgpio_transports,
711 .commands = am335xgpio_command_handlers,
713 .init = am335xgpio_init,
714 .quit = am335xgpio_quit,
715 .reset = am335xgpio_reset,
716 .speed = am335xgpio_speed,
717 .khz = am335xgpio_khz,
718 .speed_div = am335xgpio_speed_div,
720 .jtag_ops = &am335xgpio_interface,
721 .swd_ops = &bitbang_swd,