1 /***************************************************************************
2 * Copyright (C) 2013 by Andes Technology *
3 * Hsiangkai Wang <hkwang@andestech.com> *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
19 #ifndef OPENOCD_JTAG_AICE_AICE_USB_H
20 #define OPENOCD_JTAG_AICE_AICE_USB_H
22 #include "aice_port.h"
24 /* AICE USB timeout value */
25 #define AICE_USB_TIMEOUT 5000
27 /* AICE USB buffer size */
28 #define AICE_IN_BUFFER_SIZE 2048
29 #define AICE_OUT_BUFFER_SIZE 2048
30 #define AICE_IN_PACKETS_BUFFER_SIZE 2048
31 #define AICE_OUT_PACKETS_BUFFER_SIZE 2048
32 #define AICE_IN_BATCH_COMMAND_SIZE 512
33 #define AICE_OUT_BATCH_COMMAND_SIZE 512
34 #define AICE_IN_PACK_COMMAND_SIZE 2048
35 #define AICE_OUT_PACK_COMMAND_SIZE 2048
37 /* Constants for AICE command READ_CTRL */
38 #define AICE_READ_CTRL_GET_ICE_STATE 0x00
39 #define AICE_READ_CTRL_GET_HARDWARE_VERSION 0x01
40 #define AICE_READ_CTRL_GET_FPGA_VERSION 0x02
41 #define AICE_READ_CTRL_GET_FIRMWARE_VERSION 0x03
42 #define AICE_READ_CTRL_GET_JTAG_PIN_STATUS 0x04
43 #define AICE_READ_CTRL_BATCH_BUF_INFO 0x22
44 #define AICE_READ_CTRL_BATCH_STATUS 0x23
45 #define AICE_READ_CTRL_BATCH_BUF0_STATE 0x31
46 #define AICE_READ_CTRL_BATCH_BUF4_STATE 0x39
47 #define AICE_READ_CTRL_BATCH_BUF5_STATE 0x3b
49 /* Constants for AICE command WRITE_CTRL */
50 #define AICE_WRITE_CTRL_TCK_CONTROL 0x00
51 #define AICE_WRITE_CTRL_JTAG_PIN_CONTROL 0x01
52 #define AICE_WRITE_CTRL_CLEAR_TIMEOUT_STATUS 0x02
53 #define AICE_WRITE_CTRL_RESERVED 0x03
54 #define AICE_WRITE_CTRL_JTAG_PIN_STATUS 0x04
55 #define AICE_WRITE_CTRL_CUSTOM_DELAY 0x0d
56 #define AICE_WRITE_CTRL_BATCH_CTRL 0x20
57 #define AICE_WRITE_CTRL_BATCH_ITERATION 0x21
58 #define AICE_WRITE_CTRL_BATCH_DIM_SIZE 0x22
59 #define AICE_WRITE_CTRL_BATCH_CMD_BUF0_CTRL 0x30
60 #define AICE_WRITE_CTRL_BATCH_DATA_BUF0_CTRL 0x38
61 #define AICE_WRITE_CTRL_BATCH_DATA_BUF1_CTRL 0x3a
63 #define AICE_BATCH_COMMAND_BUFFER_0 0x0
64 #define AICE_BATCH_COMMAND_BUFFER_1 0x1
65 #define AICE_BATCH_COMMAND_BUFFER_2 0x2
66 #define AICE_BATCH_COMMAND_BUFFER_3 0x3
67 #define AICE_BATCH_DATA_BUFFER_0 0x4
68 #define AICE_BATCH_DATA_BUFFER_1 0x5
69 #define AICE_BATCH_DATA_BUFFER_2 0x6
70 #define AICE_BATCH_DATA_BUFFER_3 0x7
72 /* Constants for AICE command WRITE_CTRL:TCK_CONTROL */
73 #define AICE_TCK_CONTROL_TCK3048 0x08
74 #define AICE_TCK_CONTROL_TCK_SCAN 0x10
76 /* Constants for AICE command WRITE_CTRL:JTAG_PIN_CONTROL */
77 #define AICE_JTAG_PIN_CONTROL_SRST 0x01
78 #define AICE_JTAG_PIN_CONTROL_TRST 0x02
79 #define AICE_JTAG_PIN_CONTROL_STOP 0x04
80 #define AICE_JTAG_PIN_CONTROL_RESTART 0x08
82 /* Constants for AICE command WRITE_CTRL:TCK_CONTROL */
83 #define AICE_TCK_CONTROL_TCK_SCAN 0x10
85 /* Custom SRST/DBGI/TRST */
86 #define AICE_CUSTOM_DELAY_SET_SRST 0x01
87 #define AICE_CUSTOM_DELAY_CLEAN_SRST 0x02
88 #define AICE_CUSTOM_DELAY_SET_DBGI 0x04
89 #define AICE_CUSTOM_DELAY_CLEAN_DBGI 0x08
90 #define AICE_CUSTOM_DELAY_SET_TRST 0x10
91 #define AICE_CUSTOM_DELAY_CLEAN_TRST 0x20
93 struct aice_usb_handler_s {
94 unsigned int usb_read_ep;
95 unsigned int usb_write_ep;
96 struct jtag_libusb_device_handle *usb_handle;
105 uint32_t log2_line_size;
108 struct aice_nds32_info {
109 uint32_t edm_version;
112 uint32_t host_dtr_backup;
113 uint32_t target_dtr_backup;
114 uint32_t edmsw_backup;
115 uint32_t edm_ctl_backup;
116 bool debug_under_dex_on;
119 bool target_dtr_valid;
120 enum nds_memory_access access_channel;
121 enum nds_memory_select memory_select;
122 enum aice_target_state_s core_state;
124 struct cache_info icache;
125 struct cache_info dcache;
128 extern struct aice_port_api_s aice_usb_api;
130 int aice_read_ctrl(uint32_t address, uint32_t *data);
131 int aice_write_ctrl(uint32_t address, uint32_t data);
133 #endif /* OPENOCD_JTAG_AICE_AICE_USB_H */