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   1 /***************************************************************************
   2  *   Copyright (C) 2005 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20 #ifndef STM32X_H
  21 #define STM32X_H
  22
  23 #include "flash.h"
  24 #include "target.h"
  25
  26 typedef struct stm32x_flash_bank_s
  27 {
  28         working_area_t *write_algorithm;
  29 } stm32x_flash_bank_t;
  30
  31 /* stm32x register locations */
  32
  33 #define STM32_FLASH_ACR         0x40022000
  34 #define STM32_FLASH_KEYR        0x40022004
  35 #define STM32_FLASH_OPTKEYR     0x40022008
  36 #define STM32_FLASH_SR          0x4002200C
  37 #define STM32_FLASH_CR          0x40022010
  38 #define STM32_FLASH_AR          0x40022014
  39 #define STM32_FLASH_OBR         0x4002201C
  40 #define STM32_FLASH_WRPR        0x40022020
  41
  42 /* option byte location */
  43
  44 #define STM32_OB_ADR            0x1FFFF800
  45
  46 /* FLASH_CR register bits */
  47
  48 #define FLASH_PG                (1<<0)
  49 #define FLASH_PER               (1<<1)
  50 #define FLASH_MER       (1<<2)
  51 #define FLASH_OPTPG             (1<<4)
  52 #define FLASH_OPTER             (1<<5)
  53 #define FLASH_STRT              (1<<6)
  54 #define FLASH_LOCK              (1<<7)
  55 #define FLASH_OPTWRE    (1<<9)
  56
  57 /* FLASH_SR regsiter bits */
  58
  59 #define FLASH_BSY               (1<<0)
  60 #define FLASH_PGERR     (1<<2)
  61 #define FLASH_WRPRTERR  (1<<4)
  62 #define FLASH_EOP               (1<<5)
  63
  64 /* STM32_FLASH_OBR bit definitions (reading) */
  65
  66 #define OPT_ERROR               0
  67 #define OPT_READOUT             1
  68 #define OPT_RDWDGSW             2
  69 #define OPT_RDRSTSTOP   3
  70 #define OPT_RDRSTSTDBY  4
  71
  72 /* register unlock keys */
  73
  74 #define KEY1                    0x45670123
  75 #define KEY2                    0xCDEF89AB
  76
  77 typedef struct stm32x_mem_layout_s {
  78         u32 sector_start;
  79         u32 sector_size;
  80 } stm32x_mem_layout_t;
  81
  82 #endif /* STM32X_H */
  83