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   1 /***************************************************************************
   2  *   Copyright (C) 2007, 2008 by Ben Dooks                                 *
   3  *   ben@fluff.org                                                         *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20
  21 /*
  22  * S3C24XX Series OpenOCD NAND Flash controller support.
  23  *
  24  * Many thanks to Simtec Electronics for sponsoring this work.
  25  */
  26
  27 #ifdef HAVE_CONFIG_H
  28 #include "config.h"
  29 #endif
  30
  31 #include "s3c24xx_nand.h"
  32
  33
  34 S3C24XX_DEVICE_COMMAND()
  35 {
  36         struct s3c24xx_nand_controller *s3c24xx_info;
  37
  38         s3c24xx_info = malloc(sizeof(struct s3c24xx_nand_controller));
  39         if (s3c24xx_info == NULL) {
  40                 LOG_ERROR("no memory for nand controller\n");
  41                 return -ENOMEM;
  42         }
  43
  44         nand->controller_priv = s3c24xx_info;
  45
  46         s3c24xx_info->target = get_target(args[1]);
  47         if (s3c24xx_info->target == NULL) {
  48                 LOG_ERROR("target '%s' not defined", args[1]);
  49                 return ERROR_COMMAND_SYNTAX_ERROR;
  50         }
  51
  52         return ERROR_OK;
  53 }
  54
  55 int s3c24xx_register_commands(struct command_context_s *cmd_ctx)
  56 {
  57         return ERROR_OK;
  58 }
  59
  60 int s3c24xx_reset(struct nand_device_s *nand)
  61 {
  62         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
  63         struct target *target = s3c24xx_info->target;
  64
  65         if (target->state != TARGET_HALTED) {
  66                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  67                 return ERROR_NAND_OPERATION_FAILED;
  68         }
  69
  70         target_write_u32(target, s3c24xx_info->cmd, 0xff);
  71
  72         return ERROR_OK;
  73 }
  74
  75 int s3c24xx_command(struct nand_device_s *nand, uint8_t command)
  76 {
  77         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
  78         struct target *target = s3c24xx_info->target;
  79
  80         if (target->state != TARGET_HALTED) {
  81                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  82                 return ERROR_NAND_OPERATION_FAILED;
  83         }
  84
  85         target_write_u16(target, s3c24xx_info->cmd, command);
  86         return ERROR_OK;
  87 }
  88
  89
  90 int s3c24xx_address(struct nand_device_s *nand, uint8_t address)
  91 {
  92         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
  93         struct target *target = s3c24xx_info->target;
  94
  95         if (target->state != TARGET_HALTED) {
  96                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  97                 return ERROR_NAND_OPERATION_FAILED;
  98         }
  99
 100         target_write_u16(target, s3c24xx_info->addr, address);
 101         return ERROR_OK;
 102 }
 103
 104 int s3c24xx_write_data(struct nand_device_s *nand, uint16_t data)
 105 {
 106         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
 107         struct target *target = s3c24xx_info->target;
 108
 109         if (target->state != TARGET_HALTED) {
 110                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
 111                 return ERROR_NAND_OPERATION_FAILED;
 112         }
 113
 114         target_write_u8(target, s3c24xx_info->data, data);
 115         return ERROR_OK;
 116 }
 117
 118 int s3c24xx_read_data(struct nand_device_s *nand, void *data)
 119 {
 120         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
 121         struct target *target = s3c24xx_info->target;
 122
 123         if (target->state != TARGET_HALTED) {
 124                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
 125                 return ERROR_NAND_OPERATION_FAILED;
 126         }
 127
 128         target_read_u8(target, s3c24xx_info->data, data);
 129         return ERROR_OK;
 130 }
 131
 132 int s3c24xx_controller_ready(struct nand_device_s *nand, int timeout)
 133 {
 134         return 1;
 135 }