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   1 /***************************************************************************
   2  *   Copyright (C) 2007, 2008 by Ben Dooks                                 *
   3  *   ben@fluff.org                                                         *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20
  21 /*
  22  * S3C2443 OpenOCD NAND Flash controller support.
  23  *
  24  * Many thanks to Simtec Electronics for sponsoring this work.
  25  */
  26
  27 #ifdef HAVE_CONFIG_H
  28 #include "config.h"
  29 #endif
  30
  31 #include "s3c24xx_nand.h"
  32
  33
  34 NAND_DEVICE_COMMAND_HANDLER(s3c2443_nand_device_command)
  35 {
  36         struct s3c24xx_nand_controller *info;
  37         CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
  38
  39         /* fill in the address fields for the core device */
  40         info->cmd = S3C2440_NFCMD;
  41         info->addr = S3C2440_NFADDR;
  42         info->data = S3C2440_NFDATA;
  43         info->nfstat = S3C2412_NFSTAT;
  44
  45         return ERROR_OK;
  46 }
  47
  48 static int s3c2443_init(struct nand_device_s *nand)
  49 {
  50         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
  51         target_t *target = s3c24xx_info->target;
  52
  53         target_write_u32(target, S3C2410_NFCONF,
  54                          S3C2440_NFCONF_TACLS(3) |
  55                          S3C2440_NFCONF_TWRPH0(7) |
  56                          S3C2440_NFCONF_TWRPH1(7));
  57
  58         target_write_u32(target, S3C2440_NFCONT,
  59                          S3C2412_NFCONT_INIT_MAIN_ECC |
  60                          S3C2440_NFCONT_ENABLE);
  61
  62         return ERROR_OK;
  63 }
  64
  65 struct nand_flash_controller s3c2443_nand_controller = {
  66                 .name = "s3c2443",
  67                 .nand_device_command = &s3c2443_nand_device_command,
  68                 .register_commands = &s3c24xx_register_commands,
  69                 .init = &s3c2443_init,
  70                 .reset = &s3c24xx_reset,
  71                 .command = &s3c24xx_command,
  72                 .address = &s3c24xx_address,
  73                 .write_data = &s3c24xx_write_data,
  74                 .read_data = &s3c24xx_read_data,
  75                 .write_page = s3c24xx_write_page,
  76                 .read_page = s3c24xx_read_page,
  77                 .write_block_data = &s3c2440_write_block_data,
  78                 .read_block_data = &s3c2440_read_block_data,
  79                 .controller_ready = &s3c24xx_controller_ready,
  80                 .nand_ready = &s3c2440_nand_ready,
  81         };