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   1 /***************************************************************************
   2  *   Copyright (C) 2007, 2008 by Ben Dooks                                 *
   3  *   ben@fluff.org                                                         *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20
  21 /*
  22  * S3C2410 OpenOCD NAND Flash controller support.
  23  *
  24  * Many thanks to Simtec Electronics for sponsoring this work.
  25  */
  26
  27 #ifdef HAVE_CONFIG_H
  28 #include "config.h"
  29 #endif
  30
  31 #include "s3c24xx_nand.h"
  32
  33
  34 static int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
  35 static int s3c2410_init(struct nand_device_s *device);
  36 static int s3c2410_read_data(struct nand_device_s *device, void *data);
  37 static int s3c2410_write_data(struct nand_device_s *device, uint16_t data);
  38 static int s3c2410_nand_ready(struct nand_device_s *device, int timeout);
  39
  40 nand_flash_controller_t s3c2410_nand_controller =
  41 {
  42         .name                   = "s3c2410",
  43         .nand_device_command    = s3c2410_nand_device_command,
  44         .register_commands      = s3c24xx_register_commands,
  45         .init                   = s3c2410_init,
  46         .reset                  = s3c24xx_reset,
  47         .command                = s3c24xx_command,
  48         .address                = s3c24xx_address,
  49         .write_data             = s3c2410_write_data,
  50         .read_data              = s3c2410_read_data,
  51         .write_page             = s3c24xx_write_page,
  52         .read_page              = s3c24xx_read_page,
  53         .controller_ready       = s3c24xx_controller_ready,
  54         .nand_ready             = s3c2410_nand_ready,
  55 };
  56
  57 static int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
  58                                 char **args, int argc,
  59                                 struct nand_device_s *device)
  60 {
  61         s3c24xx_nand_controller_t *info;
  62
  63         info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
  64         if (info == NULL) {
  65                 return ERROR_NAND_DEVICE_INVALID;
  66         }
  67
  68         /* fill in the address fields for the core device */
  69         info->cmd = S3C2410_NFCMD;
  70         info->addr = S3C2410_NFADDR;
  71         info->data = S3C2410_NFDATA;
  72         info->nfstat = S3C2410_NFSTAT;
  73
  74         return ERROR_OK;
  75 }
  76
  77 static int s3c2410_init(struct nand_device_s *device)
  78 {
  79         s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
  80         target_t *target = s3c24xx_info->target;
  81
  82         target_write_u32(target, S3C2410_NFCONF,
  83                          S3C2410_NFCONF_EN | S3C2410_NFCONF_TACLS(3) |
  84                          S3C2410_NFCONF_TWRPH0(5) | S3C2410_NFCONF_TWRPH1(3));
  85
  86         return ERROR_OK;
  87 }
  88
  89 static int s3c2410_write_data(struct nand_device_s *device, uint16_t data)
  90 {
  91         s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
  92         target_t *target = s3c24xx_info->target;
  93
  94         if (target->state != TARGET_HALTED) {
  95                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  96                 return ERROR_NAND_OPERATION_FAILED;
  97         }
  98
  99         target_write_u32(target, S3C2410_NFDATA, data);
 100         return ERROR_OK;
 101 }
 102
 103 static int s3c2410_read_data(struct nand_device_s *device, void *data)
 104 {
 105         s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
 106         target_t *target = s3c24xx_info->target;
 107
 108         if (target->state != TARGET_HALTED) {
 109                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
 110                 return ERROR_NAND_OPERATION_FAILED;
 111         }
 112
 113         target_read_u8(target, S3C2410_NFDATA, data);
 114         return ERROR_OK;
 115 }
 116
 117 static int s3c2410_nand_ready(struct nand_device_s *device, int timeout)
 118 {
 119         s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
 120         target_t *target = s3c24xx_info->target;
 121         uint8_t status;
 122
 123         if (target->state != TARGET_HALTED) {
 124                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
 125                 return ERROR_NAND_OPERATION_FAILED;
 126         }
 127
 128         do {
 129                 target_read_u8(target, S3C2410_NFSTAT, &status);
 130
 131                 if (status & S3C2410_NFSTAT_BUSY)
 132                         return 1;
 133
 134                 alive_sleep(1);
 135         } while (timeout-- > 0);
 136
 137         return 0;
 138 }