Nicolas Pitre nico at cam.org support for NAND flash used with Marvell Orion and...
[fw/openocd] / src / flash / orion_nand.c
1 /***************************************************************************\r
2  *   Copyright (C) 2009 by Marvell Semiconductors, Inc.                    *\r
3  *   Written by Nicolas Pitre <nico at marvell.com>                           *\r
4  *                                                                         *\r
5  *   This program is free software; you can redistribute it and/or modify  *\r
6  *   it under the terms of the GNU General Public License as published by  *\r
7  *   the Free Software Foundation; either version 2 of the License, or     *\r
8  *   (at your option) any later version.                                   *\r
9  *                                                                         *\r
10  *   This program is distributed in the hope that it will be useful,       *\r
11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *\r
12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *\r
13  *   GNU General Public License for more details.                          *\r
14  *                                                                         *\r
15  *   You should have received a copy of the GNU General Public License     *\r
16  *   along with this program; if not, write to the                         *\r
17  *   Free Software Foundation, Inc.,                                       *\r
18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *\r
19  ***************************************************************************/\r
20 \r
21 /*\r
22  * NAND controller interface for Marvell Orion/Kirkwood SoCs.\r
23  */\r
24 \r
25 #ifdef HAVE_CONFIG_H\r
26 #include "config.h"\r
27 #endif\r
28 \r
29 #include "replacements.h"\r
30 #include "log.h"\r
31 \r
32 #include <stdlib.h>\r
33 #include <string.h>\r
34 \r
35 #include "nand.h"\r
36 #include "target.h"\r
37 #include "armv4_5.h"\r
38 #include "binarybuffer.h"\r
39 \r
40 typedef struct orion_nand_controller_s\r
41 {\r
42         struct target_s *target;\r
43         working_area_t *copy_area;\r
44 \r
45         u32             cmd;\r
46         u32             addr;\r
47         u32             data;\r
48 } orion_nand_controller_t;\r
49 \r
50 #define CHECK_HALTED \\r
51         do { \\r
52                 if (target->state != TARGET_HALTED) { \\r
53                         LOG_ERROR("NAND flash access requires halted target"); \\r
54                         return ERROR_NAND_OPERATION_FAILED; \\r
55                 } \\r
56         } while (0)\r
57 \r
58 int orion_nand_command(struct nand_device_s *device, u8 command)\r
59 {\r
60         orion_nand_controller_t *hw = device->controller_priv;\r
61         target_t *target = hw->target;\r
62 \r
63         CHECK_HALTED;\r
64         target_write_u8(target, hw->cmd, command);\r
65         return ERROR_OK;\r
66 }\r
67 \r
68 int orion_nand_address(struct nand_device_s *device, u8 address)\r
69 {\r
70         orion_nand_controller_t *hw = device->controller_priv;\r
71         target_t *target = hw->target;\r
72 \r
73         CHECK_HALTED;\r
74         target_write_u8(target, hw->addr, address);\r
75         return ERROR_OK;\r
76 }\r
77 \r
78 int orion_nand_read(struct nand_device_s *device, void *data)\r
79 {\r
80         orion_nand_controller_t *hw = device->controller_priv;\r
81         target_t *target = hw->target;\r
82 \r
83         CHECK_HALTED;\r
84         target_read_u8(target, hw->data, data);\r
85         return ERROR_OK;\r
86 }\r
87 \r
88 int orion_nand_write(struct nand_device_s *device, u16 data)\r
89 {\r
90         orion_nand_controller_t *hw = device->controller_priv;\r
91         target_t *target = hw->target;\r
92 \r
93         CHECK_HALTED;\r
94         target_write_u8(target, hw->data, data);\r
95         return ERROR_OK;\r
96 }\r
97 \r
98 int orion_nand_slow_block_write(struct nand_device_s *device, u8 *data, int size)\r
99 {\r
100         while (size--)\r
101                 orion_nand_write(device, *data++);\r
102         return ERROR_OK;\r
103 }\r
104 \r
105 int orion_nand_fast_block_write(struct nand_device_s *device, u8 *data, int size)\r
106 {\r
107         orion_nand_controller_t *hw = device->controller_priv;\r
108         target_t *target = hw->target;\r
109         armv4_5_algorithm_t algo;\r
110         reg_param_t reg_params[3];\r
111         u32 target_buf;\r
112         int retval;\r
113 \r
114         static const u32 code[] = {\r
115                 0xe4d13001,     /* ldrb r3, [r1], #1    */\r
116                 0xe5c03000,     /* strb r3, [r0]        */\r
117                 0xe2522001,     /* subs r2, r2, #1      */\r
118                 0x1afffffb,     /* bne  0               */\r
119                 0xeafffffe,     /* b    .               */\r
120         };\r
121         int code_size = sizeof(code);\r
122 \r
123         if (!hw->copy_area) {\r
124                 u8 code_buf[code_size];\r
125                 int i;\r
126 \r
127                 /* make sure we have a working area */\r
128                 if (target_alloc_working_area(target,\r
129                                               code_size + device->page_size,\r
130                                               &hw->copy_area) != ERROR_OK)\r
131                 {\r
132                         return orion_nand_slow_block_write(device, data, size);\r
133                 }\r
134 \r
135                 /* copy target instructions to target endianness */\r
136                 for (i = 0; i < code_size/4; i++)\r
137                         target_buffer_set_u32(target, code_buf + i*4, code[i]);\r
138 \r
139                 /* write code to working area */\r
140                 retval = target->type->write_memory(target,\r
141                                         hw->copy_area->address,\r
142                                         4, code_size/4, code_buf);\r
143                 if (retval != ERROR_OK)\r
144                         return retval;\r
145         }\r
146 \r
147         /* copy data to target's memory */\r
148         target_buf = hw->copy_area->address + code_size;\r
149         retval = target->type->bulk_write_memory(target, target_buf,\r
150                                                  size/4, data);\r
151         if (retval == ERROR_OK && size & 3) {\r
152                 retval = target->type->write_memory(target,\r
153                                         target_buf + (size & ~3),\r
154                                         1, size & 3, data + (size & ~3));\r
155         }\r
156         if (retval != ERROR_OK)\r
157                 return retval;\r
158 \r
159         algo.common_magic = ARMV4_5_COMMON_MAGIC;\r
160         algo.core_mode = ARMV4_5_MODE_SVC;\r
161         algo.core_state = ARMV4_5_STATE_ARM;\r
162 \r
163         init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);\r
164         init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);\r
165         init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);\r
166 \r
167         buf_set_u32(reg_params[0].value, 0, 32, hw->data);\r
168         buf_set_u32(reg_params[1].value, 0, 32, target_buf);\r
169         buf_set_u32(reg_params[2].value, 0, 32, size);\r
170 \r
171         retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params,\r
172                                         hw->copy_area->address,\r
173                                         hw->copy_area->address + code_size - 4,\r
174                                         1000, &algo);\r
175         if (retval != ERROR_OK)\r
176                 LOG_ERROR("error executing hosted NAND write");\r
177 \r
178         destroy_reg_param(&reg_params[0]);\r
179         destroy_reg_param(&reg_params[1]);\r
180         destroy_reg_param(&reg_params[2]);\r
181         return retval;\r
182 }\r
183 \r
184 int orion_nand_reset(struct nand_device_s *device)\r
185 {\r
186         return orion_nand_command(device, NAND_CMD_RESET);\r
187 }\r
188 \r
189 int orion_nand_controller_ready(struct nand_device_s *device, int timeout)\r
190 {\r
191         return 1;\r
192 }\r
193 \r
194 int orion_nand_register_commands(struct command_context_s *cmd_ctx)\r
195 {\r
196         return ERROR_OK;\r
197 }\r
198 \r
199 int orion_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,\r
200                               char **args, int argc,\r
201                               struct nand_device_s *device)\r
202 {\r
203         orion_nand_controller_t *hw;\r
204         u32 base;\r
205         u8 ale, cle;\r
206 \r
207         if (argc != 3) {\r
208                 LOG_ERROR("arguments must be: <target_number> <NAND_address>\n");\r
209                 return ERROR_NAND_DEVICE_INVALID;\r
210         }\r
211 \r
212         hw = calloc(1, sizeof(*hw));\r
213         if (!hw) {\r
214                 LOG_ERROR("no memory for nand controller\n");\r
215                 return ERROR_NAND_DEVICE_INVALID;\r
216         }\r
217 \r
218         device->controller_priv = hw;\r
219         hw->target = get_target_by_num(strtoul(args[1], NULL, 0));\r
220         if (!hw->target) {\r
221                 LOG_ERROR("no target '%s' configured", args[1]);\r
222                 free(hw);\r
223                 return ERROR_NAND_DEVICE_INVALID;\r
224         }\r
225 \r
226         base = strtoul(args[2], NULL, 0);\r
227         cle = 0;\r
228         ale = 1;\r
229 \r
230         hw->data = base;\r
231         hw->cmd = base + (1 << cle);\r
232         hw->addr = base + (1 << ale);\r
233 \r
234         return ERROR_OK;\r
235 }\r
236 \r
237 int orion_nand_init(struct nand_device_s *device)\r
238 {\r
239         return ERROR_OK;\r
240 }\r
241 \r
242 nand_flash_controller_t orion_nand_controller =\r
243 {\r
244         .name                   = "orion",\r
245         .command                = orion_nand_command,\r
246         .address                = orion_nand_address,\r
247         .read_data              = orion_nand_read,\r
248         .write_data             = orion_nand_write,\r
249         .write_block_data       = orion_nand_fast_block_write,\r
250         .reset                  = orion_nand_reset,\r
251         .controller_ready       = orion_nand_controller_ready,\r
252         .nand_device_command    = orion_nand_device_command,\r
253         .register_commands      = orion_nand_register_commands,\r
254         .init                   = orion_nand_init,\r
255 };\r
256 \r