1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 #include <target/arm7_9_common.h>
32 static int str9xpec_erase_area(struct flash_bank *bank, int first, int last);
33 static int str9xpec_set_address(struct flash_bank *bank, uint8_t sector);
34 static int str9xpec_write_options(struct flash_bank *bank);
36 int str9xpec_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_state_t end_state)
39 return ERROR_TARGET_INVALID;
42 if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
44 struct scan_field field;
46 field.num_bits = tap->ir_length;
47 field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
48 buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
49 field.in_value = NULL;
51 jtag_add_ir_scan(tap, &field, end_state);
53 free(field.out_value);
59 static uint8_t str9xpec_isc_status(struct jtag_tap *tap)
61 struct scan_field field;
64 if (str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE) != ERROR_OK)
65 return ISC_STATUS_ERROR;
68 field.out_value = NULL;
69 field.in_value = &status;
72 jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
75 LOG_DEBUG("status: 0x%2.2x", status);
77 if (status & ISC_STATUS_SECURITY)
78 LOG_INFO("Device Security Bit Set");
83 static int str9xpec_isc_enable(struct flash_bank *bank)
87 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
89 tap = str9xpec_info->tap;
91 if (str9xpec_info->isc_enable)
95 if (str9xpec_set_instr(tap, ISC_ENABLE, TAP_IDLE) != ERROR_OK)
96 return ERROR_TARGET_INVALID;
98 /* check ISC status */
99 status = str9xpec_isc_status(tap);
100 if (status & ISC_STATUS_MODE)
102 /* we have entered isc mode */
103 str9xpec_info->isc_enable = 1;
104 LOG_DEBUG("ISC_MODE Enabled");
110 static int str9xpec_isc_disable(struct flash_bank *bank)
113 struct jtag_tap *tap;
114 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
116 tap = str9xpec_info->tap;
118 if (!str9xpec_info->isc_enable)
121 if (str9xpec_set_instr(tap, ISC_DISABLE, TAP_IDLE) != ERROR_OK)
122 return ERROR_TARGET_INVALID;
124 /* delay to handle aborts */
127 /* check ISC status */
128 status = str9xpec_isc_status(tap);
129 if (!(status & ISC_STATUS_MODE))
131 /* we have left isc mode */
132 str9xpec_info->isc_enable = 0;
133 LOG_DEBUG("ISC_MODE Disabled");
139 static int str9xpec_read_config(struct flash_bank *bank)
141 struct scan_field field;
143 struct jtag_tap *tap;
145 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
147 tap = str9xpec_info->tap;
149 LOG_DEBUG("ISC_CONFIGURATION");
151 /* execute ISC_CONFIGURATION command */
152 str9xpec_set_instr(tap, ISC_CONFIGURATION, TAP_IRPAUSE);
155 field.out_value = NULL;
156 field.in_value = str9xpec_info->options;
159 jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
160 jtag_execute_queue();
162 status = str9xpec_isc_status(tap);
167 static int str9xpec_build_block_list(struct flash_bank *bank)
169 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
173 int b0_sectors = 0, b1_sectors = 0;
175 int b1_size = 0x2000;
199 LOG_ERROR("BUG: unknown bank->size encountered");
203 num_sectors = b0_sectors + b1_sectors;
205 bank->num_sectors = num_sectors;
206 bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
207 str9xpec_info->sector_bits = malloc(sizeof(uint32_t) * num_sectors);
211 for (i = 0; i < b0_sectors; i++)
213 bank->sectors[num_sectors].offset = offset;
214 bank->sectors[num_sectors].size = 0x10000;
215 offset += bank->sectors[i].size;
216 bank->sectors[num_sectors].is_erased = -1;
217 bank->sectors[num_sectors].is_protected = 1;
218 str9xpec_info->sector_bits[num_sectors++] = i;
221 for (i = 0; i < b1_sectors; i++)
223 bank->sectors[num_sectors].offset = offset;
224 bank->sectors[num_sectors].size = b1_size;
225 offset += bank->sectors[i].size;
226 bank->sectors[num_sectors].is_erased = -1;
227 bank->sectors[num_sectors].is_protected = 1;
228 str9xpec_info->sector_bits[num_sectors++] = i + 32;
234 /* flash bank str9x <base> <size> 0 0 <target#>
236 FLASH_BANK_COMMAND_HANDLER(str9xpec_flash_bank_command)
238 struct str9xpec_flash_controller *str9xpec_info;
239 struct arm *armv4_5 = NULL;
240 struct arm7_9_common *arm7_9 = NULL;
241 struct arm_jtag *jtag_info = NULL;
245 LOG_WARNING("incomplete flash_bank str9x configuration");
246 return ERROR_FLASH_BANK_INVALID;
249 str9xpec_info = malloc(sizeof(struct str9xpec_flash_controller));
250 bank->driver_priv = str9xpec_info;
252 /* REVISIT verify that the jtag position of flash controller is
253 * right after *THIS* core, which must be a STR9xx core ...
255 armv4_5 = bank->target->arch_info;
256 arm7_9 = armv4_5->arch_info;
257 jtag_info = &arm7_9->jtag_info;
259 str9xpec_info->tap = bank->target->tap;
260 str9xpec_info->isc_enable = 0;
262 str9xpec_build_block_list(bank);
264 /* clear option byte register */
265 buf_set_u32(str9xpec_info->options, 0, 64, 0);
270 static int str9xpec_blank_check(struct flash_bank *bank, int first, int last)
272 struct scan_field field;
274 struct jtag_tap *tap;
276 uint8_t *buffer = NULL;
278 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
280 tap = str9xpec_info->tap;
282 if (!str9xpec_info->isc_enable) {
283 str9xpec_isc_enable(bank);
286 if (!str9xpec_info->isc_enable) {
287 return ERROR_FLASH_OPERATION_FAILED;
290 buffer = calloc(DIV_ROUND_UP(64, 8), 1);
292 LOG_DEBUG("blank check: first_bank: %i, last_bank: %i", first, last);
294 for (i = first; i <= last; i++) {
295 buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
298 /* execute ISC_BLANK_CHECK command */
299 str9xpec_set_instr(tap, ISC_BLANK_CHECK, TAP_IRPAUSE);
302 field.out_value = buffer;
303 field.in_value = NULL;
305 jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
306 jtag_add_sleep(40000);
308 /* read blank check result */
310 field.out_value = NULL;
311 field.in_value = buffer;
313 jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
314 jtag_execute_queue();
316 status = str9xpec_isc_status(tap);
318 for (i = first; i <= last; i++)
320 if (buf_get_u32(buffer, str9xpec_info->sector_bits[i], 1))
321 bank->sectors[i].is_erased = 0;
323 bank->sectors[i].is_erased = 1;
328 str9xpec_isc_disable(bank);
330 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
331 return ERROR_FLASH_OPERATION_FAILED;
335 static int str9xpec_protect_check(struct flash_bank *bank)
340 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
342 status = str9xpec_read_config(bank);
344 for (i = 0; i < bank->num_sectors; i++)
346 if (buf_get_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1))
347 bank->sectors[i].is_protected = 1;
349 bank->sectors[i].is_protected = 0;
352 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
353 return ERROR_FLASH_OPERATION_FAILED;
357 static int str9xpec_erase_area(struct flash_bank *bank, int first, int last)
359 struct scan_field field;
361 struct jtag_tap *tap;
363 uint8_t *buffer = NULL;
365 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
367 tap = str9xpec_info->tap;
369 if (!str9xpec_info->isc_enable) {
370 str9xpec_isc_enable(bank);
373 if (!str9xpec_info->isc_enable) {
374 return ISC_STATUS_ERROR;
377 buffer = calloc(DIV_ROUND_UP(64, 8), 1);
379 LOG_DEBUG("erase: first_bank: %i, last_bank: %i", first, last);
381 /* last bank: 0xFF signals a full erase (unlock complete device) */
382 /* last bank: 0xFE signals a option byte erase */
385 for (i = 0; i < 64; i++) {
386 buf_set_u32(buffer, i, 1, 1);
389 else if (last == 0xFE)
391 buf_set_u32(buffer, 49, 1, 1);
395 for (i = first; i <= last; i++) {
396 buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
400 LOG_DEBUG("ISC_ERASE");
402 /* execute ISC_ERASE command */
403 str9xpec_set_instr(tap, ISC_ERASE, TAP_IRPAUSE);
406 field.out_value = buffer;
407 field.in_value = NULL;
409 jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
410 jtag_execute_queue();
414 /* wait for erase completion */
415 while (!((status = str9xpec_isc_status(tap)) & ISC_STATUS_BUSY)) {
421 str9xpec_isc_disable(bank);
426 static int str9xpec_erase(struct flash_bank *bank, int first, int last)
430 status = str9xpec_erase_area(bank, first, last);
432 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
433 return ERROR_FLASH_OPERATION_FAILED;
438 static int str9xpec_lock_device(struct flash_bank *bank)
440 struct scan_field field;
442 struct jtag_tap *tap;
443 struct str9xpec_flash_controller *str9xpec_info = NULL;
445 str9xpec_info = bank->driver_priv;
446 tap = str9xpec_info->tap;
448 if (!str9xpec_info->isc_enable) {
449 str9xpec_isc_enable(bank);
452 if (!str9xpec_info->isc_enable) {
453 return ISC_STATUS_ERROR;
456 /* set security address */
457 str9xpec_set_address(bank, 0x80);
459 /* execute ISC_PROGRAM command */
460 str9xpec_set_instr(tap, ISC_PROGRAM_SECURITY, TAP_IDLE);
462 str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
466 field.out_value = NULL;
467 field.in_value = &status;
469 jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state());
470 jtag_execute_queue();
472 } while (!(status & ISC_STATUS_BUSY));
474 str9xpec_isc_disable(bank);
479 static int str9xpec_unlock_device(struct flash_bank *bank)
483 status = str9xpec_erase_area(bank, 0, 255);
488 static int str9xpec_protect(struct flash_bank *bank, int set, int first, int last)
493 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
495 status = str9xpec_read_config(bank);
497 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
498 return ERROR_FLASH_OPERATION_FAILED;
500 LOG_DEBUG("protect: first_bank: %i, last_bank: %i", first, last);
502 /* last bank: 0xFF signals a full device protect */
507 status = str9xpec_lock_device(bank);
511 /* perform full erase to unlock device */
512 status = str9xpec_unlock_device(bank);
517 for (i = first; i <= last; i++)
520 buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 1);
522 buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 0);
525 status = str9xpec_write_options(bank);
528 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
529 return ERROR_FLASH_OPERATION_FAILED;
534 static int str9xpec_set_address(struct flash_bank *bank, uint8_t sector)
536 struct jtag_tap *tap;
537 struct scan_field field;
538 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
540 tap = str9xpec_info->tap;
542 /* set flash controller address */
543 str9xpec_set_instr(tap, ISC_ADDRESS_SHIFT, TAP_IRPAUSE);
546 field.out_value = §or;
547 field.in_value = NULL;
549 jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state());
554 static int str9xpec_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
556 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
557 uint32_t dwords_remaining = (count / 8);
558 uint32_t bytes_remaining = (count & 0x00000007);
559 uint32_t bytes_written = 0;
561 uint32_t check_address = offset;
562 struct jtag_tap *tap;
563 struct scan_field field;
566 int first_sector = 0;
569 tap = str9xpec_info->tap;
571 if (!str9xpec_info->isc_enable) {
572 str9xpec_isc_enable(bank);
575 if (!str9xpec_info->isc_enable) {
576 return ERROR_FLASH_OPERATION_FAILED;
581 LOG_WARNING("offset 0x%" PRIx32 " breaks required 8-byte alignment", offset);
582 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
585 for (i = 0; i < bank->num_sectors; i++)
587 uint32_t sec_start = bank->sectors[i].offset;
588 uint32_t sec_end = sec_start + bank->sectors[i].size;
590 /* check if destination falls within the current sector */
591 if ((check_address >= sec_start) && (check_address < sec_end))
593 /* check if destination ends in the current sector */
594 if (offset + count < sec_end)
595 check_address = offset + count;
597 check_address = sec_end;
600 if ((offset >= sec_start) && (offset < sec_end)) {
604 if ((offset + count >= sec_start) && (offset + count < sec_end)) {
609 if (check_address != offset + count)
610 return ERROR_FLASH_DST_OUT_OF_BANK;
612 LOG_DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector);
614 scanbuf = calloc(DIV_ROUND_UP(64, 8), 1);
616 LOG_DEBUG("ISC_PROGRAM");
618 for (i = first_sector; i <= last_sector; i++)
620 str9xpec_set_address(bank, str9xpec_info->sector_bits[i]);
622 dwords_remaining = dwords_remaining < (bank->sectors[i].size/8) ? dwords_remaining : (bank->sectors[i].size/8);
624 while (dwords_remaining > 0)
626 str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
629 field.out_value = (buffer + bytes_written);
630 field.in_value = NULL;
632 jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
634 /* small delay before polling */
637 str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
641 field.out_value = NULL;
642 field.in_value = scanbuf;
644 jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state());
645 jtag_execute_queue();
647 status = buf_get_u32(scanbuf, 0, 8);
649 } while (!(status & ISC_STATUS_BUSY));
651 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
652 return ERROR_FLASH_OPERATION_FAILED;
654 /* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
655 return ERROR_FLASH_OPERATION_FAILED; */
664 uint8_t last_dword[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
667 while (bytes_remaining > 0)
669 last_dword[i++] = *(buffer + bytes_written);
674 str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
677 field.out_value = last_dword;
678 field.in_value = NULL;
680 jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
682 /* small delay before polling */
685 str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
689 field.out_value = NULL;
690 field.in_value = scanbuf;
692 jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state());
693 jtag_execute_queue();
695 status = buf_get_u32(scanbuf, 0, 8);
697 } while (!(status & ISC_STATUS_BUSY));
699 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
700 return ERROR_FLASH_OPERATION_FAILED;
702 /* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
703 return ERROR_FLASH_OPERATION_FAILED; */
708 str9xpec_isc_disable(bank);
713 static int str9xpec_probe(struct flash_bank *bank)
718 COMMAND_HANDLER(str9xpec_handle_part_id_command)
720 struct scan_field field;
721 uint8_t *buffer = NULL;
722 struct jtag_tap *tap;
724 struct str9xpec_flash_controller *str9xpec_info = NULL;
727 return ERROR_COMMAND_SYNTAX_ERROR;
729 struct flash_bank *bank;
730 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
731 if (ERROR_OK != retval)
734 str9xpec_info = bank->driver_priv;
735 tap = str9xpec_info->tap;
737 buffer = calloc(DIV_ROUND_UP(32, 8), 1);
739 str9xpec_set_instr(tap, ISC_IDCODE, TAP_IRPAUSE);
742 field.out_value = NULL;
743 field.in_value = buffer;
745 jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
746 jtag_execute_queue();
748 idcode = buf_get_u32(buffer, 0, 32);
750 command_print(CMD_CTX, "str9xpec part id: 0x%8.8" PRIx32 "", idcode);
757 static int str9xpec_erase_check(struct flash_bank *bank)
759 return str9xpec_blank_check(bank, 0, bank->num_sectors - 1);
762 static int str9xpec_info(struct flash_bank *bank, char *buf, int buf_size)
764 snprintf(buf, buf_size, "str9xpec flash driver info");
768 COMMAND_HANDLER(str9xpec_handle_flash_options_read_command)
771 struct str9xpec_flash_controller *str9xpec_info = NULL;
775 command_print(CMD_CTX, "str9xpec options_read <bank>");
779 struct flash_bank *bank;
780 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
781 if (ERROR_OK != retval)
784 str9xpec_info = bank->driver_priv;
786 status = str9xpec_read_config(bank);
788 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
789 return ERROR_FLASH_OPERATION_FAILED;
792 if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1))
793 command_print(CMD_CTX, "CS Map: bank1");
795 command_print(CMD_CTX, "CS Map: bank0");
798 if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_OTPBIT, 1))
799 command_print(CMD_CTX, "OTP Lock: OTP Locked");
801 command_print(CMD_CTX, "OTP Lock: OTP Unlocked");
804 if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1))
805 command_print(CMD_CTX, "LVD Threshold: 2.7v");
807 command_print(CMD_CTX, "LVD Threshold: 2.4v");
809 /* LVD reset warning */
810 if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1))
811 command_print(CMD_CTX, "LVD Reset Warning: VDD or VDDQ Inputs");
813 command_print(CMD_CTX, "LVD Reset Warning: VDD Input Only");
815 /* LVD reset select */
816 if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1))
817 command_print(CMD_CTX, "LVD Reset Selection: VDD or VDDQ Inputs");
819 command_print(CMD_CTX, "LVD Reset Selection: VDD Input Only");
824 static int str9xpec_write_options(struct flash_bank *bank)
826 struct scan_field field;
828 struct jtag_tap *tap;
829 struct str9xpec_flash_controller *str9xpec_info = NULL;
831 str9xpec_info = bank->driver_priv;
832 tap = str9xpec_info->tap;
834 /* erase config options first */
835 status = str9xpec_erase_area(bank, 0xFE, 0xFE);
837 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
840 if (!str9xpec_info->isc_enable) {
841 str9xpec_isc_enable(bank);
844 if (!str9xpec_info->isc_enable) {
845 return ISC_STATUS_ERROR;
848 /* according to data 64th bit has to be set */
849 buf_set_u32(str9xpec_info->options, 63, 1, 1);
851 /* set option byte address */
852 str9xpec_set_address(bank, 0x50);
854 /* execute ISC_PROGRAM command */
855 str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
858 field.out_value = str9xpec_info->options;
859 field.in_value = NULL;
861 jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
863 /* small delay before polling */
866 str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
870 field.out_value = NULL;
871 field.in_value = &status;
873 jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state());
874 jtag_execute_queue();
876 } while (!(status & ISC_STATUS_BUSY));
878 str9xpec_isc_disable(bank);
883 COMMAND_HANDLER(str9xpec_handle_flash_options_write_command)
889 command_print(CMD_CTX, "str9xpec options_write <bank>");
893 struct flash_bank *bank;
894 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
895 if (ERROR_OK != retval)
898 status = str9xpec_write_options(bank);
900 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
901 return ERROR_FLASH_OPERATION_FAILED;
903 command_print(CMD_CTX, "str9xpec write options complete.\n"
904 "INFO: a reset or power cycle is required "
905 "for the new settings to take effect.");
910 COMMAND_HANDLER(str9xpec_handle_flash_options_cmap_command)
912 struct str9xpec_flash_controller *str9xpec_info = NULL;
916 command_print(CMD_CTX, "str9xpec options_cmap <bank> <bank0 | bank1>");
920 struct flash_bank *bank;
921 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
922 if (ERROR_OK != retval)
925 str9xpec_info = bank->driver_priv;
927 if (strcmp(CMD_ARGV[1], "bank1") == 0)
929 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1, 1);
933 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1, 0);
939 COMMAND_HANDLER(str9xpec_handle_flash_options_lvdthd_command)
941 struct str9xpec_flash_controller *str9xpec_info = NULL;
945 command_print(CMD_CTX, "str9xpec options_lvdthd <bank> <2.4v | 2.7v>");
949 struct flash_bank *bank;
950 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
951 if (ERROR_OK != retval)
954 str9xpec_info = bank->driver_priv;
956 if (strcmp(CMD_ARGV[1], "2.7v") == 0)
958 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1, 1);
962 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1, 0);
968 COMMAND_HANDLER(str9xpec_handle_flash_options_lvdsel_command)
970 struct str9xpec_flash_controller *str9xpec_info = NULL;
974 command_print(CMD_CTX, "str9xpec options_lvdsel <bank> <vdd | vdd_vddq>");
978 struct flash_bank *bank;
979 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
980 if (ERROR_OK != retval)
983 str9xpec_info = bank->driver_priv;
985 if (strcmp(CMD_ARGV[1], "vdd_vddq") == 0)
987 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1, 1);
991 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1, 0);
997 COMMAND_HANDLER(str9xpec_handle_flash_options_lvdwarn_command)
999 struct str9xpec_flash_controller *str9xpec_info = NULL;
1003 command_print(CMD_CTX, "str9xpec options_lvdwarn <bank> <vdd | vdd_vddq>");
1007 struct flash_bank *bank;
1008 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
1009 if (ERROR_OK != retval)
1012 str9xpec_info = bank->driver_priv;
1014 if (strcmp(CMD_ARGV[1], "vdd_vddq") == 0)
1016 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1, 1);
1020 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1, 0);
1026 COMMAND_HANDLER(str9xpec_handle_flash_lock_command)
1032 command_print(CMD_CTX, "str9xpec lock <bank>");
1036 struct flash_bank *bank;
1037 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
1038 if (ERROR_OK != retval)
1041 status = str9xpec_lock_device(bank);
1043 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
1044 return ERROR_FLASH_OPERATION_FAILED;
1049 COMMAND_HANDLER(str9xpec_handle_flash_unlock_command)
1055 command_print(CMD_CTX, "str9xpec unlock <bank>");
1059 struct flash_bank *bank;
1060 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
1061 if (ERROR_OK != retval)
1064 status = str9xpec_unlock_device(bank);
1066 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
1067 return ERROR_FLASH_OPERATION_FAILED;
1069 command_print(CMD_CTX, "str9xpec unlocked.\n"
1070 "INFO: a reset or power cycle is required "
1071 "for the new settings to take effect.");
1076 COMMAND_HANDLER(str9xpec_handle_flash_enable_turbo_command)
1078 struct jtag_tap *tap0;
1079 struct jtag_tap *tap1;
1080 struct jtag_tap *tap2;
1081 struct str9xpec_flash_controller *str9xpec_info = NULL;
1085 command_print(CMD_CTX, "str9xpec enable_turbo <bank>");
1089 struct flash_bank *bank;
1090 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
1091 if (ERROR_OK != retval)
1094 str9xpec_info = bank->driver_priv;
1096 tap0 = str9xpec_info->tap;
1098 /* remove arm core from chain - enter turbo mode */
1099 tap1 = tap0->next_tap;
1102 /* things are *WRONG* */
1103 command_print(CMD_CTX,"**STR9FLASH** (tap1) invalid chain?");
1106 tap2 = tap1->next_tap;
1109 /* things are *WRONG* */
1110 command_print(CMD_CTX,"**STR9FLASH** (tap2) invalid chain?");
1114 /* enable turbo mode - TURBO-PROG-ENABLE */
1115 str9xpec_set_instr(tap2, 0xD, TAP_IDLE);
1116 if ((retval = jtag_execute_queue()) != ERROR_OK)
1119 /* modify scan chain - str9 core has been removed */
1125 COMMAND_HANDLER(str9xpec_handle_flash_disable_turbo_command)
1127 struct jtag_tap *tap;
1128 struct str9xpec_flash_controller *str9xpec_info = NULL;
1132 command_print(CMD_CTX, "str9xpec disable_turbo <bank>");
1136 struct flash_bank *bank;
1137 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
1138 if (ERROR_OK != retval)
1141 str9xpec_info = bank->driver_priv;
1142 tap = str9xpec_info->tap;
1147 /* exit turbo mode via RESET */
1148 str9xpec_set_instr(tap, ISC_NOOP, TAP_IDLE);
1150 jtag_execute_queue();
1152 /* restore previous scan chain */
1153 if (tap->next_tap) {
1154 tap->next_tap->enabled = 1;
1160 static const struct command_registration str9xpec_config_command_handlers[] = {
1162 .name = "enable_turbo",
1163 .handler = str9xpec_handle_flash_enable_turbo_command,
1164 .mode = COMMAND_EXEC,
1165 .help = "enable str9xpec turbo mode",
1168 .name = "disable_turbo",
1169 .handler = str9xpec_handle_flash_disable_turbo_command,
1170 .mode = COMMAND_EXEC,
1171 .help = "disable str9xpec turbo mode",
1174 .name = "options_cmap",
1175 .handler = str9xpec_handle_flash_options_cmap_command,
1176 .mode = COMMAND_EXEC,
1177 .help = "configure str9xpec boot sector",
1180 .name = "options_lvdthd",
1181 .handler = str9xpec_handle_flash_options_lvdthd_command,
1182 .mode = COMMAND_EXEC,
1183 .help = "configure str9xpec lvd threshold",
1186 .name = "options_lvdsel",
1187 .handler = str9xpec_handle_flash_options_lvdsel_command,
1188 .mode = COMMAND_EXEC,
1189 .help = "configure str9xpec lvd selection",
1192 .name = "options_lvdwarn",
1193 .handler = str9xpec_handle_flash_options_lvdwarn_command,
1194 .mode = COMMAND_EXEC,
1195 .help = "configure str9xpec lvd warning",
1198 .name = "options_read",
1199 .handler = str9xpec_handle_flash_options_read_command,
1200 .mode = COMMAND_EXEC,
1201 .help = "read str9xpec options",
1204 .name = "options_write",
1205 .handler = str9xpec_handle_flash_options_write_command,
1206 .mode = COMMAND_EXEC,
1207 .help = "write str9xpec options",
1211 .handler = str9xpec_handle_flash_lock_command,
1212 .mode = COMMAND_EXEC,
1213 .help = "lock str9xpec device",
1217 .handler = str9xpec_handle_flash_unlock_command,
1218 .mode = COMMAND_EXEC,
1219 .help = "unlock str9xpec device",
1223 .handler = str9xpec_handle_part_id_command,
1224 .mode = COMMAND_EXEC,
1225 .help = "print part id of str9xpec flash bank <num>",
1227 COMMAND_REGISTRATION_DONE
1229 static const struct command_registration str9xpec_command_handlers[] = {
1232 .mode = COMMAND_ANY,
1233 .help = "str9xpec flash command group",
1234 .chain = str9xpec_config_command_handlers,
1236 COMMAND_REGISTRATION_DONE
1239 struct flash_driver str9xpec_flash = {
1241 .commands = str9xpec_command_handlers,
1242 .flash_bank_command = str9xpec_flash_bank_command,
1243 .erase = str9xpec_erase,
1244 .protect = str9xpec_protect,
1245 .write = str9xpec_write,
1246 .probe = str9xpec_probe,
1247 .auto_probe = str9xpec_probe,
1248 .erase_check = str9xpec_erase_check,
1249 .protect_check = str9xpec_protect_check,
1250 .info = str9xpec_info,