1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 #include <target/arm7_9_common.h>
32 static int str9xpec_erase_area(struct flash_bank *bank, int first, int last);
33 static int str9xpec_set_address(struct flash_bank *bank, uint8_t sector);
34 static int str9xpec_write_options(struct flash_bank *bank);
36 int str9xpec_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_state_t end_state)
39 return ERROR_TARGET_INVALID;
42 if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
44 struct scan_field field;
46 field.num_bits = tap->ir_length;
47 field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
48 buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
49 field.in_value = NULL;
51 jtag_add_ir_scan(tap, &field, end_state);
53 free(field.out_value);
59 static uint8_t str9xpec_isc_status(struct jtag_tap *tap)
61 struct scan_field field;
64 if (str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE) != ERROR_OK)
65 return ISC_STATUS_ERROR;
68 field.out_value = NULL;
69 field.in_value = &status;
72 jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
75 LOG_DEBUG("status: 0x%2.2x", status);
77 if (status & ISC_STATUS_SECURITY)
78 LOG_INFO("Device Security Bit Set");
83 static int str9xpec_isc_enable(struct flash_bank *bank)
87 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
89 tap = str9xpec_info->tap;
91 if (str9xpec_info->isc_enable)
95 if (str9xpec_set_instr(tap, ISC_ENABLE, TAP_IDLE) != ERROR_OK)
96 return ERROR_TARGET_INVALID;
98 /* check ISC status */
99 status = str9xpec_isc_status(tap);
100 if (status & ISC_STATUS_MODE)
102 /* we have entered isc mode */
103 str9xpec_info->isc_enable = 1;
104 LOG_DEBUG("ISC_MODE Enabled");
110 static int str9xpec_isc_disable(struct flash_bank *bank)
113 struct jtag_tap *tap;
114 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
116 tap = str9xpec_info->tap;
118 if (!str9xpec_info->isc_enable)
121 if (str9xpec_set_instr(tap, ISC_DISABLE, TAP_IDLE) != ERROR_OK)
122 return ERROR_TARGET_INVALID;
124 /* delay to handle aborts */
127 /* check ISC status */
128 status = str9xpec_isc_status(tap);
129 if (!(status & ISC_STATUS_MODE))
131 /* we have left isc mode */
132 str9xpec_info->isc_enable = 0;
133 LOG_DEBUG("ISC_MODE Disabled");
139 static int str9xpec_read_config(struct flash_bank *bank)
141 struct scan_field field;
143 struct jtag_tap *tap;
145 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
147 tap = str9xpec_info->tap;
149 LOG_DEBUG("ISC_CONFIGURATION");
151 /* execute ISC_CONFIGURATION command */
152 str9xpec_set_instr(tap, ISC_CONFIGURATION, TAP_IRPAUSE);
155 field.out_value = NULL;
156 field.in_value = str9xpec_info->options;
159 jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
160 jtag_execute_queue();
162 status = str9xpec_isc_status(tap);
167 static int str9xpec_build_block_list(struct flash_bank *bank)
169 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
173 int b0_sectors = 0, b1_sectors = 0;
175 int b1_size = 0x2000;
199 LOG_ERROR("BUG: unknown bank->size encountered");
203 num_sectors = b0_sectors + b1_sectors;
205 bank->num_sectors = num_sectors;
206 bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
207 str9xpec_info->sector_bits = malloc(sizeof(uint32_t) * num_sectors);
211 for (i = 0; i < b0_sectors; i++)
213 bank->sectors[num_sectors].offset = offset;
214 bank->sectors[num_sectors].size = 0x10000;
215 offset += bank->sectors[i].size;
216 bank->sectors[num_sectors].is_erased = -1;
217 bank->sectors[num_sectors].is_protected = 1;
218 str9xpec_info->sector_bits[num_sectors++] = i;
221 for (i = 0; i < b1_sectors; i++)
223 bank->sectors[num_sectors].offset = offset;
224 bank->sectors[num_sectors].size = b1_size;
225 offset += bank->sectors[i].size;
226 bank->sectors[num_sectors].is_erased = -1;
227 bank->sectors[num_sectors].is_protected = 1;
228 str9xpec_info->sector_bits[num_sectors++] = i + 32;
234 /* flash bank str9x <base> <size> 0 0 <target#>
236 FLASH_BANK_COMMAND_HANDLER(str9xpec_flash_bank_command)
238 struct str9xpec_flash_controller *str9xpec_info;
239 struct arm *armv4_5 = NULL;
240 struct arm7_9_common *arm7_9 = NULL;
241 struct arm_jtag *jtag_info = NULL;
245 LOG_WARNING("incomplete flash_bank str9x configuration");
246 return ERROR_FLASH_BANK_INVALID;
249 str9xpec_info = malloc(sizeof(struct str9xpec_flash_controller));
250 bank->driver_priv = str9xpec_info;
252 /* REVISIT verify that the jtag position of flash controller is
253 * right after *THIS* core, which must be a STR9xx core ...
255 armv4_5 = bank->target->arch_info;
256 arm7_9 = armv4_5->arch_info;
257 jtag_info = &arm7_9->jtag_info;
259 str9xpec_info->tap = bank->target->tap;
260 str9xpec_info->isc_enable = 0;
262 str9xpec_build_block_list(bank);
264 /* clear option byte register */
265 buf_set_u32(str9xpec_info->options, 0, 64, 0);
270 static int str9xpec_blank_check(struct flash_bank *bank, int first, int last)
272 struct scan_field field;
274 struct jtag_tap *tap;
276 uint8_t *buffer = NULL;
278 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
280 tap = str9xpec_info->tap;
282 if (!str9xpec_info->isc_enable) {
283 str9xpec_isc_enable(bank);
286 if (!str9xpec_info->isc_enable) {
287 return ERROR_FLASH_OPERATION_FAILED;
290 buffer = calloc(DIV_ROUND_UP(64, 8), 1);
292 LOG_DEBUG("blank check: first_bank: %i, last_bank: %i", first, last);
294 for (i = first; i <= last; i++) {
295 buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
298 /* execute ISC_BLANK_CHECK command */
299 str9xpec_set_instr(tap, ISC_BLANK_CHECK, TAP_IRPAUSE);
302 field.out_value = buffer;
303 field.in_value = NULL;
305 jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
306 jtag_add_sleep(40000);
308 /* read blank check result */
310 field.out_value = NULL;
311 field.in_value = buffer;
313 jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
314 jtag_execute_queue();
316 status = str9xpec_isc_status(tap);
318 for (i = first; i <= last; i++)
320 if (buf_get_u32(buffer, str9xpec_info->sector_bits[i], 1))
321 bank->sectors[i].is_erased = 0;
323 bank->sectors[i].is_erased = 1;
328 str9xpec_isc_disable(bank);
330 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
331 return ERROR_FLASH_OPERATION_FAILED;
335 static int str9xpec_protect_check(struct flash_bank *bank)
340 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
342 status = str9xpec_read_config(bank);
344 for (i = 0; i < bank->num_sectors; i++)
346 if (buf_get_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1))
347 bank->sectors[i].is_protected = 1;
349 bank->sectors[i].is_protected = 0;
352 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
353 return ERROR_FLASH_OPERATION_FAILED;
357 static int str9xpec_erase_area(struct flash_bank *bank, int first, int last)
359 struct scan_field field;
361 struct jtag_tap *tap;
363 uint8_t *buffer = NULL;
365 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
367 tap = str9xpec_info->tap;
369 if (!str9xpec_info->isc_enable) {
370 str9xpec_isc_enable(bank);
373 if (!str9xpec_info->isc_enable) {
374 return ISC_STATUS_ERROR;
377 buffer = calloc(DIV_ROUND_UP(64, 8), 1);
379 LOG_DEBUG("erase: first_bank: %i, last_bank: %i", first, last);
381 /* last bank: 0xFF signals a full erase (unlock complete device) */
382 /* last bank: 0xFE signals a option byte erase */
385 for (i = 0; i < 64; i++) {
386 buf_set_u32(buffer, i, 1, 1);
389 else if (last == 0xFE)
391 buf_set_u32(buffer, 49, 1, 1);
395 for (i = first; i <= last; i++) {
396 buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
400 LOG_DEBUG("ISC_ERASE");
402 /* execute ISC_ERASE command */
403 str9xpec_set_instr(tap, ISC_ERASE, TAP_IRPAUSE);
406 field.out_value = buffer;
407 field.in_value = NULL;
409 jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
410 jtag_execute_queue();
414 /* wait for erase completion */
415 while (!((status = str9xpec_isc_status(tap)) & ISC_STATUS_BUSY)) {
421 str9xpec_isc_disable(bank);
426 static int str9xpec_erase(struct flash_bank *bank, int first, int last)
430 status = str9xpec_erase_area(bank, first, last);
432 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
433 return ERROR_FLASH_OPERATION_FAILED;
438 static int str9xpec_lock_device(struct flash_bank *bank)
440 struct scan_field field;
442 struct jtag_tap *tap;
443 struct str9xpec_flash_controller *str9xpec_info = NULL;
445 str9xpec_info = bank->driver_priv;
446 tap = str9xpec_info->tap;
448 if (!str9xpec_info->isc_enable) {
449 str9xpec_isc_enable(bank);
452 if (!str9xpec_info->isc_enable) {
453 return ISC_STATUS_ERROR;
456 /* set security address */
457 str9xpec_set_address(bank, 0x80);
459 /* execute ISC_PROGRAM command */
460 str9xpec_set_instr(tap, ISC_PROGRAM_SECURITY, TAP_IDLE);
462 str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
466 field.out_value = NULL;
467 field.in_value = &status;
469 jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
470 jtag_execute_queue();
472 } while (!(status & ISC_STATUS_BUSY));
474 str9xpec_isc_disable(bank);
479 static int str9xpec_unlock_device(struct flash_bank *bank)
483 status = str9xpec_erase_area(bank, 0, 255);
488 static int str9xpec_protect(struct flash_bank *bank, int set, int first, int last)
493 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
495 status = str9xpec_read_config(bank);
497 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
498 return ERROR_FLASH_OPERATION_FAILED;
500 LOG_DEBUG("protect: first_bank: %i, last_bank: %i", first, last);
502 /* last bank: 0xFF signals a full device protect */
507 status = str9xpec_lock_device(bank);
511 /* perform full erase to unlock device */
512 status = str9xpec_unlock_device(bank);
517 for (i = first; i <= last; i++)
520 buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 1);
522 buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 0);
525 status = str9xpec_write_options(bank);
528 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
529 return ERROR_FLASH_OPERATION_FAILED;
534 static int str9xpec_set_address(struct flash_bank *bank, uint8_t sector)
536 struct jtag_tap *tap;
537 struct scan_field field;
538 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
540 tap = str9xpec_info->tap;
542 /* set flash controller address */
543 str9xpec_set_instr(tap, ISC_ADDRESS_SHIFT, TAP_IRPAUSE);
546 field.out_value = §or;
547 field.in_value = NULL;
549 jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
554 static int str9xpec_write(struct flash_bank *bank, uint8_t *buffer,
555 uint32_t offset, uint32_t count)
557 struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
558 uint32_t dwords_remaining = (count / 8);
559 uint32_t bytes_remaining = (count & 0x00000007);
560 uint32_t bytes_written = 0;
562 uint32_t check_address = offset;
563 struct jtag_tap *tap;
564 struct scan_field field;
567 int first_sector = 0;
570 tap = str9xpec_info->tap;
572 if (!str9xpec_info->isc_enable) {
573 str9xpec_isc_enable(bank);
576 if (!str9xpec_info->isc_enable) {
577 return ERROR_FLASH_OPERATION_FAILED;
582 LOG_WARNING("offset 0x%" PRIx32 " breaks required 8-byte alignment", offset);
583 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
586 for (i = 0; i < bank->num_sectors; i++)
588 uint32_t sec_start = bank->sectors[i].offset;
589 uint32_t sec_end = sec_start + bank->sectors[i].size;
591 /* check if destination falls within the current sector */
592 if ((check_address >= sec_start) && (check_address < sec_end))
594 /* check if destination ends in the current sector */
595 if (offset + count < sec_end)
596 check_address = offset + count;
598 check_address = sec_end;
601 if ((offset >= sec_start) && (offset < sec_end)) {
605 if ((offset + count >= sec_start) && (offset + count < sec_end)) {
610 if (check_address != offset + count)
611 return ERROR_FLASH_DST_OUT_OF_BANK;
613 LOG_DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector);
615 scanbuf = calloc(DIV_ROUND_UP(64, 8), 1);
617 LOG_DEBUG("ISC_PROGRAM");
619 for (i = first_sector; i <= last_sector; i++)
621 str9xpec_set_address(bank, str9xpec_info->sector_bits[i]);
623 dwords_remaining = dwords_remaining < (bank->sectors[i].size/8)
624 ? dwords_remaining : (bank->sectors[i].size/8);
626 while (dwords_remaining > 0)
628 str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
631 field.out_value = (buffer + bytes_written);
632 field.in_value = NULL;
634 jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
636 /* small delay before polling */
639 str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
643 field.out_value = NULL;
644 field.in_value = scanbuf;
646 jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
647 jtag_execute_queue();
649 status = buf_get_u32(scanbuf, 0, 8);
651 } while (!(status & ISC_STATUS_BUSY));
653 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
654 return ERROR_FLASH_OPERATION_FAILED;
656 /* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
657 return ERROR_FLASH_OPERATION_FAILED; */
666 uint8_t last_dword[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
669 while (bytes_remaining > 0)
671 last_dword[i++] = *(buffer + bytes_written);
676 str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
679 field.out_value = last_dword;
680 field.in_value = NULL;
682 jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
684 /* small delay before polling */
687 str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
691 field.out_value = NULL;
692 field.in_value = scanbuf;
694 jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
695 jtag_execute_queue();
697 status = buf_get_u32(scanbuf, 0, 8);
699 } while (!(status & ISC_STATUS_BUSY));
701 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
702 return ERROR_FLASH_OPERATION_FAILED;
704 /* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
705 return ERROR_FLASH_OPERATION_FAILED; */
710 str9xpec_isc_disable(bank);
715 static int str9xpec_probe(struct flash_bank *bank)
720 COMMAND_HANDLER(str9xpec_handle_part_id_command)
722 struct scan_field field;
723 uint8_t *buffer = NULL;
724 struct jtag_tap *tap;
726 struct str9xpec_flash_controller *str9xpec_info = NULL;
729 return ERROR_COMMAND_SYNTAX_ERROR;
731 struct flash_bank *bank;
732 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
733 if (ERROR_OK != retval)
736 str9xpec_info = bank->driver_priv;
737 tap = str9xpec_info->tap;
739 buffer = calloc(DIV_ROUND_UP(32, 8), 1);
741 str9xpec_set_instr(tap, ISC_IDCODE, TAP_IRPAUSE);
744 field.out_value = NULL;
745 field.in_value = buffer;
747 jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
748 jtag_execute_queue();
750 idcode = buf_get_u32(buffer, 0, 32);
752 command_print(CMD_CTX, "str9xpec part id: 0x%8.8" PRIx32 "", idcode);
759 static int str9xpec_erase_check(struct flash_bank *bank)
761 return str9xpec_blank_check(bank, 0, bank->num_sectors - 1);
764 static int str9xpec_info(struct flash_bank *bank, char *buf, int buf_size)
766 snprintf(buf, buf_size, "str9xpec flash driver info");
770 COMMAND_HANDLER(str9xpec_handle_flash_options_read_command)
773 struct str9xpec_flash_controller *str9xpec_info = NULL;
777 command_print(CMD_CTX, "str9xpec options_read <bank>");
781 struct flash_bank *bank;
782 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
783 if (ERROR_OK != retval)
786 str9xpec_info = bank->driver_priv;
788 status = str9xpec_read_config(bank);
790 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
791 return ERROR_FLASH_OPERATION_FAILED;
794 if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1))
795 command_print(CMD_CTX, "CS Map: bank1");
797 command_print(CMD_CTX, "CS Map: bank0");
800 if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_OTPBIT, 1))
801 command_print(CMD_CTX, "OTP Lock: OTP Locked");
803 command_print(CMD_CTX, "OTP Lock: OTP Unlocked");
806 if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1))
807 command_print(CMD_CTX, "LVD Threshold: 2.7v");
809 command_print(CMD_CTX, "LVD Threshold: 2.4v");
811 /* LVD reset warning */
812 if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1))
813 command_print(CMD_CTX, "LVD Reset Warning: VDD or VDDQ Inputs");
815 command_print(CMD_CTX, "LVD Reset Warning: VDD Input Only");
817 /* LVD reset select */
818 if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1))
819 command_print(CMD_CTX, "LVD Reset Selection: VDD or VDDQ Inputs");
821 command_print(CMD_CTX, "LVD Reset Selection: VDD Input Only");
826 static int str9xpec_write_options(struct flash_bank *bank)
828 struct scan_field field;
830 struct jtag_tap *tap;
831 struct str9xpec_flash_controller *str9xpec_info = NULL;
833 str9xpec_info = bank->driver_priv;
834 tap = str9xpec_info->tap;
836 /* erase config options first */
837 status = str9xpec_erase_area(bank, 0xFE, 0xFE);
839 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
842 if (!str9xpec_info->isc_enable) {
843 str9xpec_isc_enable(bank);
846 if (!str9xpec_info->isc_enable) {
847 return ISC_STATUS_ERROR;
850 /* according to data 64th bit has to be set */
851 buf_set_u32(str9xpec_info->options, 63, 1, 1);
853 /* set option byte address */
854 str9xpec_set_address(bank, 0x50);
856 /* execute ISC_PROGRAM command */
857 str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
860 field.out_value = str9xpec_info->options;
861 field.in_value = NULL;
863 jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
865 /* small delay before polling */
868 str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
872 field.out_value = NULL;
873 field.in_value = &status;
875 jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
876 jtag_execute_queue();
878 } while (!(status & ISC_STATUS_BUSY));
880 str9xpec_isc_disable(bank);
885 COMMAND_HANDLER(str9xpec_handle_flash_options_write_command)
891 command_print(CMD_CTX, "str9xpec options_write <bank>");
895 struct flash_bank *bank;
896 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
897 if (ERROR_OK != retval)
900 status = str9xpec_write_options(bank);
902 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
903 return ERROR_FLASH_OPERATION_FAILED;
905 command_print(CMD_CTX, "str9xpec write options complete.\n"
906 "INFO: a reset or power cycle is required "
907 "for the new settings to take effect.");
912 COMMAND_HANDLER(str9xpec_handle_flash_options_cmap_command)
914 struct str9xpec_flash_controller *str9xpec_info = NULL;
918 command_print(CMD_CTX, "str9xpec options_cmap <bank> <bank0 | bank1>");
922 struct flash_bank *bank;
923 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
924 if (ERROR_OK != retval)
927 str9xpec_info = bank->driver_priv;
929 if (strcmp(CMD_ARGV[1], "bank1") == 0)
931 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1, 1);
935 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1, 0);
941 COMMAND_HANDLER(str9xpec_handle_flash_options_lvdthd_command)
943 struct str9xpec_flash_controller *str9xpec_info = NULL;
947 command_print(CMD_CTX, "str9xpec options_lvdthd <bank> <2.4v | 2.7v>");
951 struct flash_bank *bank;
952 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
953 if (ERROR_OK != retval)
956 str9xpec_info = bank->driver_priv;
958 if (strcmp(CMD_ARGV[1], "2.7v") == 0)
960 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1, 1);
964 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1, 0);
970 COMMAND_HANDLER(str9xpec_handle_flash_options_lvdsel_command)
972 struct str9xpec_flash_controller *str9xpec_info = NULL;
976 command_print(CMD_CTX, "str9xpec options_lvdsel <bank> <vdd | vdd_vddq>");
980 struct flash_bank *bank;
981 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
982 if (ERROR_OK != retval)
985 str9xpec_info = bank->driver_priv;
987 if (strcmp(CMD_ARGV[1], "vdd_vddq") == 0)
989 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1, 1);
993 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1, 0);
999 COMMAND_HANDLER(str9xpec_handle_flash_options_lvdwarn_command)
1001 struct str9xpec_flash_controller *str9xpec_info = NULL;
1005 command_print(CMD_CTX, "str9xpec options_lvdwarn <bank> <vdd | vdd_vddq>");
1009 struct flash_bank *bank;
1010 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
1011 if (ERROR_OK != retval)
1014 str9xpec_info = bank->driver_priv;
1016 if (strcmp(CMD_ARGV[1], "vdd_vddq") == 0)
1018 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1, 1);
1022 buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1, 0);
1028 COMMAND_HANDLER(str9xpec_handle_flash_lock_command)
1034 command_print(CMD_CTX, "str9xpec lock <bank>");
1038 struct flash_bank *bank;
1039 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
1040 if (ERROR_OK != retval)
1043 status = str9xpec_lock_device(bank);
1045 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
1046 return ERROR_FLASH_OPERATION_FAILED;
1051 COMMAND_HANDLER(str9xpec_handle_flash_unlock_command)
1057 command_print(CMD_CTX, "str9xpec unlock <bank>");
1061 struct flash_bank *bank;
1062 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
1063 if (ERROR_OK != retval)
1066 status = str9xpec_unlock_device(bank);
1068 if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
1069 return ERROR_FLASH_OPERATION_FAILED;
1071 command_print(CMD_CTX, "str9xpec unlocked.\n"
1072 "INFO: a reset or power cycle is required "
1073 "for the new settings to take effect.");
1078 COMMAND_HANDLER(str9xpec_handle_flash_enable_turbo_command)
1080 struct jtag_tap *tap0;
1081 struct jtag_tap *tap1;
1082 struct jtag_tap *tap2;
1083 struct str9xpec_flash_controller *str9xpec_info = NULL;
1087 command_print(CMD_CTX, "str9xpec enable_turbo <bank>");
1091 struct flash_bank *bank;
1092 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
1093 if (ERROR_OK != retval)
1096 str9xpec_info = bank->driver_priv;
1098 tap0 = str9xpec_info->tap;
1100 /* remove arm core from chain - enter turbo mode */
1101 tap1 = tap0->next_tap;
1104 /* things are *WRONG* */
1105 command_print(CMD_CTX,"**STR9FLASH** (tap1) invalid chain?");
1108 tap2 = tap1->next_tap;
1111 /* things are *WRONG* */
1112 command_print(CMD_CTX,"**STR9FLASH** (tap2) invalid chain?");
1116 /* enable turbo mode - TURBO-PROG-ENABLE */
1117 str9xpec_set_instr(tap2, 0xD, TAP_IDLE);
1118 if ((retval = jtag_execute_queue()) != ERROR_OK)
1121 /* modify scan chain - str9 core has been removed */
1127 COMMAND_HANDLER(str9xpec_handle_flash_disable_turbo_command)
1129 struct jtag_tap *tap;
1130 struct str9xpec_flash_controller *str9xpec_info = NULL;
1134 command_print(CMD_CTX, "str9xpec disable_turbo <bank>");
1138 struct flash_bank *bank;
1139 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
1140 if (ERROR_OK != retval)
1143 str9xpec_info = bank->driver_priv;
1144 tap = str9xpec_info->tap;
1149 /* exit turbo mode via RESET */
1150 str9xpec_set_instr(tap, ISC_NOOP, TAP_IDLE);
1152 jtag_execute_queue();
1154 /* restore previous scan chain */
1155 if (tap->next_tap) {
1156 tap->next_tap->enabled = 1;
1162 static const struct command_registration str9xpec_config_command_handlers[] = {
1164 .name = "enable_turbo",
1165 .handler = str9xpec_handle_flash_enable_turbo_command,
1166 .mode = COMMAND_EXEC,
1167 .help = "enable str9xpec turbo mode",
1170 .name = "disable_turbo",
1171 .handler = str9xpec_handle_flash_disable_turbo_command,
1172 .mode = COMMAND_EXEC,
1173 .help = "disable str9xpec turbo mode",
1176 .name = "options_cmap",
1177 .handler = str9xpec_handle_flash_options_cmap_command,
1178 .mode = COMMAND_EXEC,
1179 .help = "configure str9xpec boot sector",
1182 .name = "options_lvdthd",
1183 .handler = str9xpec_handle_flash_options_lvdthd_command,
1184 .mode = COMMAND_EXEC,
1185 .help = "configure str9xpec lvd threshold",
1188 .name = "options_lvdsel",
1189 .handler = str9xpec_handle_flash_options_lvdsel_command,
1190 .mode = COMMAND_EXEC,
1191 .help = "configure str9xpec lvd selection",
1194 .name = "options_lvdwarn",
1195 .handler = str9xpec_handle_flash_options_lvdwarn_command,
1196 .mode = COMMAND_EXEC,
1197 .help = "configure str9xpec lvd warning",
1200 .name = "options_read",
1201 .handler = str9xpec_handle_flash_options_read_command,
1202 .mode = COMMAND_EXEC,
1203 .help = "read str9xpec options",
1206 .name = "options_write",
1207 .handler = str9xpec_handle_flash_options_write_command,
1208 .mode = COMMAND_EXEC,
1209 .help = "write str9xpec options",
1213 .handler = str9xpec_handle_flash_lock_command,
1214 .mode = COMMAND_EXEC,
1215 .help = "lock str9xpec device",
1219 .handler = str9xpec_handle_flash_unlock_command,
1220 .mode = COMMAND_EXEC,
1221 .help = "unlock str9xpec device",
1225 .handler = str9xpec_handle_part_id_command,
1226 .mode = COMMAND_EXEC,
1227 .help = "print part id of str9xpec flash bank <num>",
1229 COMMAND_REGISTRATION_DONE
1232 static const struct command_registration str9xpec_command_handlers[] = {
1235 .mode = COMMAND_ANY,
1236 .help = "str9xpec flash command group",
1237 .chain = str9xpec_config_command_handlers,
1239 COMMAND_REGISTRATION_DONE
1242 struct flash_driver str9xpec_flash = {
1244 .commands = str9xpec_command_handlers,
1245 .flash_bank_command = str9xpec_flash_bank_command,
1246 .erase = str9xpec_erase,
1247 .protect = str9xpec_protect,
1248 .write = str9xpec_write,
1249 .probe = str9xpec_probe,
1250 .auto_probe = str9xpec_probe,
1251 .erase_check = str9xpec_erase_check,
1252 .protect_check = str9xpec_protect_check,
1253 .info = str9xpec_info,