flash/nor/at91samd: Use 32-bit register writes for ST-Link compat
[fw/openocd] / src / flash / nor / spi.h
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 /***************************************************************************
4  *   Copyright (C) 2018-2019 by Andreas Bolsch                             *
5  *   andreas.bolsch@mni.thm.de                                             *
6  *                                                                         *
7  *   Copyright (C) 2012 by George Harris                                   *
8  *   george@luminairecoffee.com                                            *
9  *                                                                         *
10  *   Copyright (C) 2010 by Antonio Borneo                                  *
11  *   borneo.antonio@gmail.com                                              *
12  ***************************************************************************/
13
14 #ifndef OPENOCD_FLASH_NOR_SPI_H
15 #define OPENOCD_FLASH_NOR_SPI_H
16
17 #ifndef __ASSEMBLER__
18
19 /* data structure to maintain flash ids from different vendors */
20 struct flash_device {
21         const char *name;
22         uint8_t read_cmd;
23         uint8_t qread_cmd;
24         uint8_t pprog_cmd;
25         uint8_t erase_cmd;
26         uint8_t chip_erase_cmd;
27         uint32_t device_id;
28         uint32_t pagesize;
29         uint32_t sectorsize;
30         uint32_t size_in_bytes;
31 };
32
33 #define FLASH_ID(n, re, qr, pp, es, ces, id, psize, ssize, size) \
34 {                                       \
35         .name = n,                      \
36         .read_cmd = re,                 \
37         .qread_cmd = qr,                \
38         .pprog_cmd = pp,                \
39         .erase_cmd = es,                \
40         .chip_erase_cmd = ces,          \
41         .device_id = id,                \
42         .pagesize = psize,              \
43         .sectorsize = ssize,            \
44         .size_in_bytes = size,          \
45 }
46
47 #define FRAM_ID(n, re, qr, pp, id, size) \
48 {                                       \
49         .name = n,                      \
50         .read_cmd = re,                 \
51         .qread_cmd = qr,                \
52         .pprog_cmd = pp,                \
53         .erase_cmd = 0x00,              \
54         .chip_erase_cmd = 0x00,         \
55         .device_id = id,                \
56         .pagesize = 0,                  \
57         .sectorsize = 0,                \
58         .size_in_bytes = size,          \
59 }
60
61 extern const struct flash_device flash_devices[];
62
63 #endif
64
65 /* fields in SPI flash status register */
66 #define SPIFLASH_BSY            0
67 #define SPIFLASH_BSY_BIT        (1 << SPIFLASH_BSY)     /* WIP Bit of SPI SR */
68 #define SPIFLASH_WE                     1
69 #define SPIFLASH_WE_BIT         (1 << SPIFLASH_WE)      /* WEL Bit of SPI SR */
70
71 /* SPI Flash Commands */
72 #define SPIFLASH_READ_ID                0x9F /* Read Flash Identification */
73 #define SPIFLASH_READ_MID               0xAF /* Read Flash Identification, multi-io */
74 #define SPIFLASH_READ_STATUS    0x05 /* Read Status Register */
75 #define SPIFLASH_WRITE_ENABLE   0x06 /* Write Enable */
76 #define SPIFLASH_PAGE_PROGRAM   0x02 /* Page Program */
77 #define SPIFLASH_FAST_READ              0x0B /* Fast Read */
78 #define SPIFLASH_READ                   0x03 /* Normal Read */
79 #define SPIFLASH_MASS_ERASE             0xC7 /* Mass Erase */
80 #define SPIFLASH_READ_SFDP              0x5A /* Read Serial Flash Discoverable Parameters */
81
82 #define SPIFLASH_DEF_PAGESIZE   256  /* default for non-page-oriented devices (FRAMs) */
83
84 #endif /* OPENOCD_FLASH_NOR_SPI_H */