Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface
[fw/openocd] / src / flash / nor / spi.h
1 /***************************************************************************
2  *   Copyright (C) 2018-2019 by Andreas Bolsch                             *
3  *   andreas.bolsch@mni.thm.de                                             *
4  *                                                                         *
5  *   Copyright (C) 2012 by George Harris                                   *
6  *   george@luminairecoffee.com                                            *
7  *                                                                         *
8  *   Copyright (C) 2010 by Antonio Borneo                                  *
9  *   borneo.antonio@gmail.com                                              *
10  *                                                                         *
11  *   This program is free software; you can redistribute it and/or modify  *
12  *   it under the terms of the GNU General Public License as published by  *
13  *   the Free Software Foundation; either version 2 of the License, or     *
14  *   (at your option) any later version.                                   *
15  *                                                                         *
16  *   This program is distributed in the hope that it will be useful,       *
17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
19  *   GNU General Public License for more details.                          *
20  *                                                                         *
21  *   You should have received a copy of the GNU General Public License     *
22  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
23  ***************************************************************************/
24
25 #ifndef OPENOCD_FLASH_NOR_SPI_H
26 #define OPENOCD_FLASH_NOR_SPI_H
27
28 #ifndef __ASSEMBLER__
29
30 /* data structure to maintain flash ids from different vendors */
31 struct flash_device {
32         const char *name;
33         uint8_t read_cmd;
34         uint8_t qread_cmd;
35         uint8_t pprog_cmd;
36         uint8_t erase_cmd;
37         uint8_t chip_erase_cmd;
38         uint32_t device_id;
39         uint32_t pagesize;
40         uint32_t sectorsize;
41         uint32_t size_in_bytes;
42 };
43
44 #define FLASH_ID(n, re, qr, pp, es, ces, id, psize, ssize, size) \
45 {                                       \
46         .name = n,                      \
47         .read_cmd = re,                 \
48         .qread_cmd = qr,                \
49         .pprog_cmd = pp,                \
50         .erase_cmd = es,                \
51         .chip_erase_cmd = ces,          \
52         .device_id = id,                \
53         .pagesize = psize,              \
54         .sectorsize = ssize,            \
55         .size_in_bytes = size,          \
56 }
57
58 #define FRAM_ID(n, re, qr, pp, id, size) \
59 {                                       \
60         .name = n,                      \
61         .read_cmd = re,                 \
62         .qread_cmd = qr,                \
63         .pprog_cmd = pp,                \
64         .erase_cmd = 0x00,              \
65         .chip_erase_cmd = 0x00,         \
66         .device_id = id,                \
67         .pagesize = 0,                  \
68         .sectorsize = 0,                \
69         .size_in_bytes = size,          \
70 }
71
72 extern const struct flash_device flash_devices[];
73
74 #endif
75
76 /* fields in SPI flash status register */
77 #define SPIFLASH_BSY            0
78 #define SPIFLASH_BSY_BIT        (1 << SPIFLASH_BSY)     /* WIP Bit of SPI SR */
79 #define SPIFLASH_WE                     1
80 #define SPIFLASH_WE_BIT         (1 << SPIFLASH_WE)      /* WEL Bit of SPI SR */
81
82 /* SPI Flash Commands */
83 #define SPIFLASH_READ_ID                0x9F /* Read Flash Identification */
84 #define SPIFLASH_READ_MID               0xAF /* Read Flash Identification, multi-io */
85 #define SPIFLASH_READ_STATUS    0x05 /* Read Status Register */
86 #define SPIFLASH_WRITE_ENABLE   0x06 /* Write Enable */
87 #define SPIFLASH_PAGE_PROGRAM   0x02 /* Page Program */
88 #define SPIFLASH_FAST_READ              0x0B /* Fast Read */
89 #define SPIFLASH_READ                   0x03 /* Normal Read */
90 #define SPIFLASH_MASS_ERASE             0xC7 /* Mass Erase */
91 #define SPIFLASH_READ_SFDP              0x5A /* Read Serial Flash Discoverable Parameters */
92
93 #define SPIFLASH_DEF_PAGESIZE   256  /* default for non-page-oriented devices (FRAMs) */
94
95 #endif /* OPENOCD_FLASH_NOR_SPI_H */