1 /***************************************************************************
2 * Copyright (C) 2007 by Pavel Chromy *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
25 #include <target/embeddedice.h>
28 struct arm_jtag *jtag_info;
30 unsigned int bufalign;
33 static int ocl_erase_check(struct flash_bank *bank)
38 /* flash_bank ocl 0 0 0 0 <target#> */
39 FLASH_BANK_COMMAND_HANDLER(ocl_flash_bank_command)
41 struct arm7_9_common *arm7_9;
45 return ERROR_COMMAND_SYNTAX_ERROR;
47 arm7_9 = target_to_arm7_9(bank->target);
48 if (!is_arm7_9(arm7_9))
49 return ERROR_TARGET_INVALID;
51 ocl = bank->driver_priv = malloc(sizeof(struct ocl_priv));
52 ocl->jtag_info = &arm7_9->jtag_info;
59 static int ocl_erase(struct flash_bank *bank, int first, int last)
61 struct ocl_priv *ocl = bank->driver_priv;
63 uint32_t dcc_buffer[3];
65 /* check preconditions */
66 if (bank->num_sectors == 0)
67 return ERROR_FLASH_BANK_NOT_PROBED;
69 if (bank->target->state != TARGET_RUNNING) {
70 LOG_ERROR("target has to be running to communicate with the loader");
71 return ERROR_TARGET_NOT_RUNNING;
74 if ((first == 0) && (last == bank->num_sectors - 1)) {
75 dcc_buffer[0] = OCL_ERASE_ALL;
76 retval = embeddedice_send(ocl->jtag_info, dcc_buffer, 1);
77 if (retval != ERROR_OK)
80 dcc_buffer[0] = OCL_ERASE_BLOCK;
81 dcc_buffer[1] = first;
83 retval = embeddedice_send(ocl->jtag_info, dcc_buffer, 3);
84 if (retval != ERROR_OK)
88 /* wait for response, fixed timeout of 1 s */
89 retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 1000);
90 if (retval != ERROR_OK)
93 /* receive response */
94 retval = embeddedice_receive(ocl->jtag_info, dcc_buffer + 1, 1);
95 if (retval != ERROR_OK)
98 if (dcc_buffer[1] != OCL_CMD_DONE) {
99 if (dcc_buffer[0] == OCL_ERASE_ALL)
100 LOG_ERROR("loader response to OCL_ERASE_ALL 0x%08" PRIx32 "", dcc_buffer[1]);
102 LOG_ERROR("loader response to OCL_ERASE_BLOCK 0x%08" PRIx32 "", dcc_buffer[1]);
103 return ERROR_FLASH_OPERATION_FAILED;
109 static int ocl_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
111 struct ocl_priv *ocl = bank->driver_priv;
113 uint32_t *dcc_buffer;
114 uint32_t *dcc_bufptr;
121 /* check preconditions */
122 if (ocl->buflen == 0 || ocl->bufalign == 0)
123 return ERROR_FLASH_BANK_NOT_PROBED;
125 if (bank->target->state != TARGET_RUNNING) {
126 LOG_ERROR("target has to be running to communicate with the loader");
127 return ERROR_TARGET_NOT_RUNNING;
130 /* allocate buffer for max. ocl buffer + overhead */
131 dcc_buffer = malloc(sizeof(uint32_t)*(ocl->buflen/4 + 3));
134 if (count + (offset % ocl->bufalign) > ocl->buflen)
135 runlen = ocl->buflen - (offset % ocl->bufalign);
139 dcc_buffer[0] = OCL_FLASH_BLOCK | runlen;
140 dcc_buffer[1] = offset;
141 dcc_bufptr = &dcc_buffer[2];
143 *dcc_bufptr = 0xffffffff;
144 byteofs = (offset % ocl->bufalign) % 4;
145 chksum = OCL_CHKS_INIT;
147 /* copy data to DCC buffer in proper byte order and properly aligned */
148 for (i = 0; i < runlen; i++) {
151 *dcc_bufptr &= *(buffer++) | 0xffffff00;
154 *dcc_bufptr &= ((*(buffer++)) << 8) | 0xffff00ff;
157 *dcc_bufptr &= ((*(buffer++)) << 16) | 0xff00ffff;
160 *dcc_bufptr &= ((*(buffer++)) << 24) | 0x00ffffff;
161 chksum ^= *(dcc_bufptr++);
162 *dcc_bufptr = 0xffffffff;
168 /* add the remaining word to checksum */
170 chksum ^= *(dcc_bufptr++);
172 *(dcc_bufptr++) = chksum;
175 retval = embeddedice_send(ocl->jtag_info, dcc_buffer, dcc_bufptr-dcc_buffer);
176 if (retval != ERROR_OK) {
181 /* wait for response, fixed timeout of 1 s */
182 retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 1000);
183 if (retval != ERROR_OK) {
188 /* receive response */
189 retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
190 if (retval != ERROR_OK) {
195 if (dcc_buffer[0] != OCL_CMD_DONE) {
196 LOG_ERROR("loader response to OCL_FLASH_BLOCK 0x%08" PRIx32 "", dcc_buffer[0]);
198 return ERROR_FLASH_OPERATION_FAILED;
209 static int ocl_probe(struct flash_bank *bank)
211 struct ocl_priv *ocl = bank->driver_priv;
213 uint32_t dcc_buffer[1];
217 /* purge pending data in DCC */
218 embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
220 dcc_buffer[0] = OCL_PROBE;
221 retval = embeddedice_send(ocl->jtag_info, dcc_buffer, 1);
222 if (retval != ERROR_OK)
225 /* wait for response, fixed timeout of 1 s */
226 retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 1000);
227 if (retval != ERROR_OK)
230 /* receive response */
231 retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
232 if (retval != ERROR_OK)
235 if (dcc_buffer[0] != OCL_CMD_DONE) {
236 LOG_ERROR("loader response to OCL_PROBE 0x%08" PRIx32 "", dcc_buffer[0]);
237 return ERROR_FLASH_OPERATION_FAILED;
240 /* receive and fill in parameters, detection of loader is important, receive it one by one */
241 retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 0);
242 if (retval != ERROR_OK)
244 retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
245 if (retval != ERROR_OK)
247 bank->base = dcc_buffer[0];
249 retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 0);
250 if (retval != ERROR_OK)
252 retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
253 if (retval != ERROR_OK)
255 bank->size = dcc_buffer[0];
257 retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 0);
258 if (retval != ERROR_OK)
260 retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
261 if (retval != ERROR_OK)
263 bank->num_sectors = dcc_buffer[0];
265 retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 0);
266 if (retval != ERROR_OK)
268 retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
269 if (retval != ERROR_OK)
271 ocl->buflen = dcc_buffer[0] & 0xffff;
272 ocl->bufalign = dcc_buffer[0] >> 16;
274 bank->sectors = realloc(bank->sectors, sizeof(struct flash_sector)*bank->num_sectors);
275 if (bank->num_sectors == 0) {
276 LOG_ERROR("number of sectors shall be non zero value");
277 return ERROR_FLASH_BANK_INVALID;
279 if (bank->size % bank->num_sectors) {
280 LOG_ERROR("bank size not divisible by number of sectors");
281 return ERROR_FLASH_BANK_INVALID;
283 sectsize = bank->size / bank->num_sectors;
284 for (i = 0; i < bank->num_sectors; i++) {
285 bank->sectors[i].offset = i * sectsize;
286 bank->sectors[i].size = sectsize;
287 bank->sectors[i].is_erased = -1;
288 bank->sectors[i].is_protected = -1;
291 if (ocl->bufalign == 0)
294 if (ocl->buflen == 0) {
295 LOG_ERROR("buflen shall be non zero value");
296 return ERROR_FLASH_BANK_INVALID;
299 if ((ocl->bufalign > ocl->buflen) || (ocl->buflen % ocl->bufalign)) {
300 LOG_ERROR("buflen is not multiple of bufalign");
301 return ERROR_FLASH_BANK_INVALID;
304 if (ocl->buflen % 4) {
305 LOG_ERROR("buflen shall be divisible by 4");
306 return ERROR_FLASH_BANK_INVALID;
312 static int ocl_auto_probe(struct flash_bank *bank)
314 struct ocl_priv *ocl = bank->driver_priv;
316 if (ocl->buflen == 0 || ocl->bufalign == 0)
317 return ERROR_FLASH_BANK_NOT_PROBED;
322 struct flash_driver ocl_flash = {
324 .flash_bank_command = ocl_flash_bank_command,
327 .read = default_flash_read,
329 .erase_check = ocl_erase_check,
330 .auto_probe = ocl_auto_probe,
331 .free_driver_priv = default_flash_free_driver_priv,