1 /***************************************************************************
2 * Copyright (C) 2009 by *
3 * Rolf Meeser <rolfm_9dq@yahoo.de> *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
27 #include <helper/binarybuffer.h>
28 #include <target/algorithm.h>
29 #include <target/arm.h>
30 #include <target/image.h>
36 /* Some flash constants */
37 #define FLASH_PAGE_SIZE 512 /* bytes */
38 #define FLASH_ERASE_TIME 100000 /* microseconds */
39 #define FLASH_PROGRAM_TIME 1000 /* microseconds */
41 /* Chip ID / Feature Registers */
42 #define CHIPID 0xE0000000 /* Chip ID */
43 #define FEAT0 0xE0000100 /* Chip feature 0 */
44 #define FEAT1 0xE0000104 /* Chip feature 1 */
45 #define FEAT2 0xE0000108 /* Chip feature 2 (contains flash size indicator) */
46 #define FEAT3 0xE000010C /* Chip feature 3 */
48 #define EXPECTED_CHIPID 0x209CE02B /* Chip ID of all LPC2900 devices */
50 /* Flash/EEPROM Control Registers */
51 #define FCTR 0x20200000 /* Flash control */
52 #define FPTR 0x20200008 /* Flash program-time */
53 #define FTCTR 0x2020000C /* Flash test control */
54 #define FBWST 0x20200010 /* Flash bridge wait-state */
55 #define FCRA 0x2020001C /* Flash clock divider */
56 #define FMSSTART 0x20200020 /* Flash Built-In Selft Test start address */
57 #define FMSSTOP 0x20200024 /* Flash Built-In Selft Test stop address */
58 #define FMS16 0x20200028 /* Flash 16-bit signature */
59 #define FMSW0 0x2020002C /* Flash 128-bit signature Word 0 */
60 #define FMSW1 0x20200030 /* Flash 128-bit signature Word 1 */
61 #define FMSW2 0x20200034 /* Flash 128-bit signature Word 2 */
62 #define FMSW3 0x20200038 /* Flash 128-bit signature Word 3 */
64 #define EECMD 0x20200080 /* EEPROM command */
65 #define EEADDR 0x20200084 /* EEPROM address */
66 #define EEWDATA 0x20200088 /* EEPROM write data */
67 #define EERDATA 0x2020008C /* EEPROM read data */
68 #define EEWSTATE 0x20200090 /* EEPROM wait state */
69 #define EECLKDIV 0x20200094 /* EEPROM clock divider */
70 #define EEPWRDWN 0x20200098 /* EEPROM power-down/start */
71 #define EEMSSTART 0x2020009C /* EEPROM BIST start address */
72 #define EEMSSTOP 0x202000A0 /* EEPROM BIST stop address */
73 #define EEMSSIG 0x202000A4 /* EEPROM 24-bit BIST signature */
75 #define INT_CLR_ENABLE 0x20200FD8 /* Flash/EEPROM interrupt clear enable */
76 #define INT_SET_ENABLE 0x20200FDC /* Flash/EEPROM interrupt set enable */
77 #define INT_STATUS 0x20200FE0 /* Flash/EEPROM interrupt status */
78 #define INT_ENABLE 0x20200FE4 /* Flash/EEPROM interrupt enable */
79 #define INT_CLR_STATUS 0x20200FE8 /* Flash/EEPROM interrupt clear status */
80 #define INT_SET_STATUS 0x20200FEC /* Flash/EEPROM interrupt set status */
82 /* Interrupt sources */
83 #define INTSRC_END_OF_PROG (1 << 28)
84 #define INTSRC_END_OF_BIST (1 << 27)
85 #define INTSRC_END_OF_RDWR (1 << 26)
86 #define INTSRC_END_OF_MISR (1 << 2)
87 #define INTSRC_END_OF_BURN (1 << 1)
88 #define INTSRC_END_OF_ERASE (1 << 0)
92 #define FCTR_FS_LOADREQ (1 << 15)
93 #define FCTR_FS_CACHECLR (1 << 14)
94 #define FCTR_FS_CACHEBYP (1 << 13)
95 #define FCTR_FS_PROGREQ (1 << 12)
96 #define FCTR_FS_RLS (1 << 11)
97 #define FCTR_FS_PDL (1 << 10)
98 #define FCTR_FS_PD (1 << 9)
99 #define FCTR_FS_WPB (1 << 7)
100 #define FCTR_FS_ISS (1 << 6)
101 #define FCTR_FS_RLD (1 << 5)
102 #define FCTR_FS_DCR (1 << 4)
103 #define FCTR_FS_WEB (1 << 2)
104 #define FCTR_FS_WRE (1 << 1)
105 #define FCTR_FS_CS (1 << 0)
107 #define FPTR_EN_T (1 << 15)
109 #define FTCTR_FS_BYPASS_R (1 << 29)
110 #define FTCTR_FS_BYPASS_W (1 << 28)
112 #define FMSSTOP_MISR_START (1 << 17)
114 #define EEMSSTOP_STRTBIST (1 << 31)
117 #define ISS_CUSTOMER_START1 (0x830)
118 #define ISS_CUSTOMER_END1 (0xA00)
119 #define ISS_CUSTOMER_SIZE1 (ISS_CUSTOMER_END1 - ISS_CUSTOMER_START1)
120 #define ISS_CUSTOMER_NWORDS1 (ISS_CUSTOMER_SIZE1 / 4)
121 #define ISS_CUSTOMER_START2 (0xA40)
122 #define ISS_CUSTOMER_END2 (0xC00)
123 #define ISS_CUSTOMER_SIZE2 (ISS_CUSTOMER_END2 - ISS_CUSTOMER_START2)
124 #define ISS_CUSTOMER_NWORDS2 (ISS_CUSTOMER_SIZE2 / 4)
125 #define ISS_CUSTOMER_SIZE (ISS_CUSTOMER_SIZE1 + ISS_CUSTOMER_SIZE2)
130 * Private data for \c lpc2900 flash driver.
132 struct lpc2900_flash_bank
135 * This flag is set when the device has been successfully probed.
140 * Holds the value read from CHIPID register.
141 * The driver will not load if the chipid doesn't match the expected
142 * value of 0x209CE02B of the LPC2900 family. A probe will only be done
143 * if the chipid does not yet contain the expected value.
148 * String holding device name.
149 * This string is set by the probe function to the type number of the
150 * device. It takes the form "LPC29xx".
155 * System clock frequency.
156 * Holds the clock frequency in Hz, as passed by the configuration file
157 * to the <tt>flash bank</tt> command.
159 uint32_t clk_sys_fmc;
162 * Flag to indicate that dangerous operations are possible.
163 * This flag can be set by passing the correct password to the
164 * <tt>lpc2900 password</tt> command. If set, other dangerous commands,
165 * which operate on the index sector, can be executed.
170 * Maximum contiguous block of internal SRAM (bytes).
171 * Autodetected by the driver. Not the total amount of SRAM, only the
172 * the largest \em contiguous block!
174 uint32_t max_ram_block;
179 static uint32_t lpc2900_wait_status(struct flash_bank *bank, uint32_t mask, int timeout);
180 static void lpc2900_setup(struct flash_bank *bank);
181 static uint32_t lpc2900_is_ready(struct flash_bank *bank);
182 static uint32_t lpc2900_read_security_status(struct flash_bank *bank);
183 static uint32_t lpc2900_run_bist128(struct flash_bank *bank,
184 uint32_t addr_from, uint32_t addr_to,
185 uint32_t (*signature)[4] );
186 static uint32_t lpc2900_address2sector(struct flash_bank *bank, uint32_t offset);
187 static uint32_t lpc2900_calc_tr(uint32_t clock_var, uint32_t time_var);
190 /*********************** Helper functions **************************/
194 * Wait for an event in mask to occur in INT_STATUS.
196 * Return when an event occurs, or after a timeout.
198 * @param[in] bank Pointer to the flash bank descriptor
199 * @param[in] mask Mask to be used for INT_STATUS
200 * @param[in] timeout Timeout in ms
202 static uint32_t lpc2900_wait_status( struct flash_bank *bank,
207 struct target *target = bank->target;
214 target_read_u32(target, INT_STATUS, &int_status);
216 while( ((int_status & mask) == 0) && (timeout != 0) );
220 LOG_DEBUG("Timeout!");
221 return ERROR_FLASH_OPERATION_FAILED;
230 * Set up the flash for erase/program operations.
232 * Enable the flash, and set the correct CRA clock of 66 kHz.
234 * @param bank Pointer to the flash bank descriptor
236 static void lpc2900_setup( struct flash_bank *bank )
239 struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
242 /* Power up the flash block */
243 target_write_u32( bank->target, FCTR, FCTR_FS_WEB | FCTR_FS_CS );
246 fcra = (lpc2900_info->clk_sys_fmc / (3 * 66000)) - 1;
247 target_write_u32( bank->target, FCRA, fcra );
253 * Check if device is ready.
255 * Check if device is ready for flash operation:
256 * Must have been successfully probed.
259 static uint32_t lpc2900_is_ready( struct flash_bank *bank )
261 struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
263 if( !lpc2900_info->is_probed )
265 return ERROR_FLASH_BANK_NOT_PROBED;
268 if( bank->target->state != TARGET_HALTED )
270 LOG_ERROR( "Target not halted" );
271 return ERROR_TARGET_NOT_HALTED;
279 * Read the status of sector security from the index sector.
281 * @param bank Pointer to the flash bank descriptor
283 static uint32_t lpc2900_read_security_status( struct flash_bank *bank )
286 if( (status = lpc2900_is_ready( bank )) != ERROR_OK )
291 struct target *target = bank->target;
293 /* Enable ISS access */
294 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS);
296 /* Read the relevant block of memory from the ISS sector */
297 uint32_t iss_secured_field[ 0x230/16 ][ 4 ];
298 target_read_memory(target, bank->base + 0xC00, 4, 0x230/4,
299 (uint8_t *)iss_secured_field);
301 /* Disable ISS access */
302 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
304 /* Check status of each sector. Note that the sector numbering in the LPC2900
305 * is different from the logical sector numbers used in OpenOCD!
306 * Refer to the user manual for details.
308 * All zeros (16x 0x00) are treated as a secured sector (is_protected = 1)
309 * All ones (16x 0xFF) are treated as a non-secured sector (is_protected = 0)
310 * Anything else is undefined (is_protected = -1). This is treated as
311 * a protected sector!
315 for( sector = 0; sector < bank->num_sectors; sector++ )
317 /* Convert logical sector number to physical sector number */
320 index_t = sector + 11;
322 else if( sector <= 7 )
324 index_t = sector + 27;
328 index_t = sector - 8;
331 bank->sectors[sector].is_protected = -1;
334 (iss_secured_field[index_t][0] == 0x00000000) &&
335 (iss_secured_field[index_t][1] == 0x00000000) &&
336 (iss_secured_field[index_t][2] == 0x00000000) &&
337 (iss_secured_field[index_t][3] == 0x00000000) )
339 bank->sectors[sector].is_protected = 1;
343 (iss_secured_field[index_t][0] == 0xFFFFFFFF) &&
344 (iss_secured_field[index_t][1] == 0xFFFFFFFF) &&
345 (iss_secured_field[index_t][2] == 0xFFFFFFFF) &&
346 (iss_secured_field[index_t][3] == 0xFFFFFFFF) )
348 bank->sectors[sector].is_protected = 0;
357 * Use BIST to calculate a 128-bit hash value over a range of flash.
359 * @param bank Pointer to the flash bank descriptor
364 static uint32_t lpc2900_run_bist128(struct flash_bank *bank,
367 uint32_t (*signature)[4] )
369 struct target *target = bank->target;
371 /* Clear END_OF_MISR interrupt status */
372 target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_MISR );
375 target_write_u32( target, FMSSTART, addr_from >> 4);
376 /* End address, and issue start command */
377 target_write_u32( target, FMSSTOP, (addr_to >> 4) | FMSSTOP_MISR_START );
379 /* Poll for end of operation. Calculate a reasonable timeout. */
380 if( lpc2900_wait_status( bank, INTSRC_END_OF_MISR, 1000 ) != ERROR_OK )
382 return ERROR_FLASH_OPERATION_FAILED;
385 /* Return the signature */
386 target_read_memory( target, FMSW0, 4, 4, (uint8_t *)signature );
393 * Return sector number for given address.
395 * Return the (logical) sector number for a given relative address.
396 * No sanity check is done. It assumed that the address is valid.
398 * @param bank Pointer to the flash bank descriptor
399 * @param offset Offset address relative to bank start
401 static uint32_t lpc2900_address2sector( struct flash_bank *bank,
404 uint32_t address = bank->base + offset;
407 /* Run through all sectors of this bank */
409 for( sector = 0; sector < bank->num_sectors; sector++ )
411 /* Return immediately if address is within the current sector */
412 if( address < (bank->sectors[sector].offset + bank->sectors[sector].size) )
418 /* We should never come here. If we do, return an arbitrary sector number. */
426 * Write one page to the index sector.
428 * @param bank Pointer to the flash bank descriptor
429 * @param pagenum Page number (0...7)
430 * @param page Page array (FLASH_PAGE_SIZE bytes)
432 static int lpc2900_write_index_page( struct flash_bank *bank,
434 uint8_t (*page)[FLASH_PAGE_SIZE] )
436 /* Only pages 4...7 are user writable */
437 if ((pagenum < 4) || (pagenum > 7))
439 LOG_ERROR("Refuse to burn index sector page %d", pagenum);
440 return ERROR_COMMAND_ARGUMENT_INVALID;
443 /* Get target, and check if it's halted */
444 struct target *target = bank->target;
445 if( target->state != TARGET_HALTED )
447 LOG_ERROR( "Target not halted" );
448 return ERROR_TARGET_NOT_HALTED;
452 struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
454 /* Enable flash block and set the correct CRA clock of 66 kHz */
455 lpc2900_setup( bank );
457 /* Un-protect the index sector */
458 target_write_u32( target, bank->base, 0 );
459 target_write_u32( target, FCTR,
460 FCTR_FS_LOADREQ | FCTR_FS_WPB | FCTR_FS_ISS |
461 FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS );
463 /* Set latch load mode */
464 target_write_u32( target, FCTR,
465 FCTR_FS_ISS | FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS );
467 /* Write whole page to flash data latches */
468 if( target_write_memory( target,
469 bank->base + pagenum * FLASH_PAGE_SIZE,
470 4, FLASH_PAGE_SIZE / 4, (uint8_t *)page) != ERROR_OK )
472 LOG_ERROR("Index sector write failed @ page %d", pagenum);
473 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
475 return ERROR_FLASH_OPERATION_FAILED;
478 /* Clear END_OF_BURN interrupt status */
479 target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_BURN );
481 /* Set the program/erase time to FLASH_PROGRAM_TIME */
482 target_write_u32(target, FPTR,
483 FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
484 FLASH_PROGRAM_TIME ));
486 /* Trigger flash write */
487 target_write_u32( target, FCTR,
488 FCTR_FS_PROGREQ | FCTR_FS_ISS |
489 FCTR_FS_WPB | FCTR_FS_WRE | FCTR_FS_CS );
491 /* Wait for the end of the write operation. If it's not over after one
492 * second, something went dreadfully wrong... :-(
494 if (lpc2900_wait_status(bank, INTSRC_END_OF_BURN, 1000) != ERROR_OK)
496 LOG_ERROR("Index sector write failed @ page %d", pagenum);
497 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
499 return ERROR_FLASH_OPERATION_FAILED;
502 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
510 * Calculate FPTR.TR register value for desired program/erase time.
512 * @param clock System clock in Hz
513 * @param time Program/erase time in µs
515 static uint32_t lpc2900_calc_tr( uint32_t clock_var, uint32_t time_var )
517 /* ((time[µs]/1e6) * f[Hz]) + 511
518 * FPTR.TR = -------------------------------
522 uint32_t tr_val = (uint32_t)((((time_var / 1e6) * clock_var) + 511.0) / 512.0);
528 /*********************** Private flash commands **************************/
532 * Command to determine the signature of the whole flash.
534 * Uses the Built-In-Self-Test (BIST) to generate a 128-bit hash value
535 * of the flash content.
537 COMMAND_HANDLER(lpc2900_handle_signature_command)
540 uint32_t signature[4];
545 return ERROR_COMMAND_SYNTAX_ERROR;
548 struct flash_bank *bank;
549 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
550 if (ERROR_OK != retval)
553 if( bank->target->state != TARGET_HALTED )
555 LOG_ERROR( "Target not halted" );
556 return ERROR_TARGET_NOT_HALTED;
559 /* Run BIST over whole flash range */
560 if( (status = lpc2900_run_bist128( bank,
562 bank->base + (bank->size - 1),
569 command_print( CMD_CTX, "signature: 0x%8.8" PRIx32
573 signature[3], signature[2], signature[1], signature[0] );
581 * Store customer info in file.
583 * Read customer info from index sector, and store that block of data into
584 * a disk file. The format is binary.
586 COMMAND_HANDLER(lpc2900_handle_read_custom_command)
590 return ERROR_COMMAND_SYNTAX_ERROR;
593 struct flash_bank *bank;
594 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
595 if (ERROR_OK != retval)
598 struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
599 lpc2900_info->risky = 0;
601 /* Get target, and check if it's halted */
602 struct target *target = bank->target;
603 if( target->state != TARGET_HALTED )
605 LOG_ERROR( "Target not halted" );
606 return ERROR_TARGET_NOT_HALTED;
609 /* Storage for customer info. Read in two parts */
610 uint32_t customer[ ISS_CUSTOMER_NWORDS1 + ISS_CUSTOMER_NWORDS2 ];
612 /* Enable access to index sector */
613 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS );
616 target_read_memory( target, bank->base+ISS_CUSTOMER_START1, 4,
617 ISS_CUSTOMER_NWORDS1,
618 (uint8_t *)&customer[0] );
619 target_read_memory( target, bank->base+ISS_CUSTOMER_START2, 4,
620 ISS_CUSTOMER_NWORDS2,
621 (uint8_t *)&customer[ISS_CUSTOMER_NWORDS1] );
623 /* Deactivate access to index sector */
624 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
626 /* Try and open the file */
627 struct fileio fileio;
628 const char *filename = CMD_ARGV[1];
629 int ret = fileio_open( &fileio, filename, FILEIO_WRITE, FILEIO_BINARY );
630 if( ret != ERROR_OK )
632 LOG_WARNING( "Could not open file %s", filename );
637 ret = fileio_write( &fileio, sizeof(customer),
638 (const uint8_t *)customer, &nwritten );
639 if( ret != ERROR_OK )
641 LOG_ERROR( "Write operation to file %s failed", filename );
642 fileio_close( &fileio );
646 fileio_close( &fileio );
655 * Enter password to enable potentially dangerous options.
657 COMMAND_HANDLER(lpc2900_handle_password_command)
661 return ERROR_COMMAND_SYNTAX_ERROR;
664 struct flash_bank *bank;
665 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
666 if (ERROR_OK != retval)
669 struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
671 #define ISS_PASSWORD "I_know_what_I_am_doing"
673 lpc2900_info->risky = !strcmp( CMD_ARGV[1], ISS_PASSWORD );
675 if( !lpc2900_info->risky )
677 command_print(CMD_CTX, "Wrong password (use '%s')", ISS_PASSWORD);
678 return ERROR_COMMAND_ARGUMENT_INVALID;
681 command_print(CMD_CTX,
682 "Potentially dangerous operation allowed in next command!");
690 * Write customer info from file to the index sector.
692 COMMAND_HANDLER(lpc2900_handle_write_custom_command)
696 return ERROR_COMMAND_SYNTAX_ERROR;
699 struct flash_bank *bank;
700 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
701 if (ERROR_OK != retval)
704 struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
706 /* Check if command execution is allowed. */
707 if( !lpc2900_info->risky )
709 command_print( CMD_CTX, "Command execution not allowed!" );
710 return ERROR_COMMAND_ARGUMENT_INVALID;
712 lpc2900_info->risky = 0;
714 /* Get target, and check if it's halted */
715 struct target *target = bank->target;
716 if (target->state != TARGET_HALTED)
718 LOG_ERROR("Target not halted");
719 return ERROR_TARGET_NOT_HALTED;
722 /* The image will always start at offset 0 */
724 image.base_address_set = 1;
725 image.base_address = 0;
726 image.start_address_set = 0;
728 const char *filename = CMD_ARGV[1];
729 const char *type = (CMD_ARGC >= 3) ? CMD_ARGV[2] : NULL;
730 retval = image_open(&image, filename, type);
731 if (retval != ERROR_OK)
736 /* Do a sanity check: The image must be exactly the size of the customer
737 programmable area. Any other size is rejected. */
738 if( image.num_sections != 1 )
740 LOG_ERROR("Only one section allowed in image file.");
741 return ERROR_COMMAND_SYNTAX_ERROR;
743 if( (image.sections[0].base_address != 0) ||
744 (image.sections[0].size != ISS_CUSTOMER_SIZE) )
746 LOG_ERROR("Incorrect image file size. Expected %d, "
748 ISS_CUSTOMER_SIZE, image.sections[0].size);
749 return ERROR_COMMAND_SYNTAX_ERROR;
752 /* Well boys, I reckon this is it... */
754 /* Customer info is split into two blocks in pages 4 and 5. */
755 uint8_t page[FLASH_PAGE_SIZE];
758 uint32_t offset = ISS_CUSTOMER_START1 % FLASH_PAGE_SIZE;
759 memset( page, 0xff, FLASH_PAGE_SIZE );
761 retval = image_read_section( &image, 0, 0,
762 ISS_CUSTOMER_SIZE1, &page[offset], &size_read);
763 if( retval != ERROR_OK )
765 LOG_ERROR("couldn't read from file '%s'", filename);
769 if( (retval = lpc2900_write_index_page( bank, 4, &page )) != ERROR_OK )
776 offset = ISS_CUSTOMER_START2 % FLASH_PAGE_SIZE;
777 memset( page, 0xff, FLASH_PAGE_SIZE );
778 retval = image_read_section( &image, 0, ISS_CUSTOMER_SIZE1,
779 ISS_CUSTOMER_SIZE2, &page[offset], &size_read);
780 if( retval != ERROR_OK )
782 LOG_ERROR("couldn't read from file '%s'", filename);
786 if( (retval = lpc2900_write_index_page( bank, 5, &page )) != ERROR_OK )
800 * Activate 'sector security' for a range of sectors.
802 COMMAND_HANDLER(lpc2900_handle_secure_sector_command)
806 return ERROR_COMMAND_SYNTAX_ERROR;
809 /* Get the bank descriptor */
810 struct flash_bank *bank;
811 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
812 if (ERROR_OK != retval)
815 struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
817 /* Check if command execution is allowed. */
818 if( !lpc2900_info->risky )
820 command_print( CMD_CTX, "Command execution not allowed! "
821 "(use 'password' command first)");
822 return ERROR_COMMAND_ARGUMENT_INVALID;
824 lpc2900_info->risky = 0;
826 /* Read sector range, and do a sanity check. */
828 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], first);
829 COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], last);
830 if( (first >= bank->num_sectors) ||
831 (last >= bank->num_sectors) ||
834 command_print( CMD_CTX, "Illegal sector range" );
835 return ERROR_COMMAND_ARGUMENT_INVALID;
838 uint8_t page[FLASH_PAGE_SIZE];
841 /* Sectors in page 6 */
842 if( (first <= 4) || (last >= 8) )
844 memset( &page, 0xff, FLASH_PAGE_SIZE );
845 for( sector = first; sector <= last; sector++ )
849 memset( &page[0xB0 + 16*sector], 0, 16 );
851 else if( sector >= 8 )
853 memset( &page[0x00 + 16*(sector - 8)], 0, 16 );
857 if( (retval = lpc2900_write_index_page( bank, 6, &page )) != ERROR_OK )
859 LOG_ERROR("failed to update index sector page 6");
864 /* Sectors in page 7 */
865 if( (first <= 7) && (last >= 5) )
867 memset( &page, 0xff, FLASH_PAGE_SIZE );
868 for( sector = first; sector <= last; sector++ )
870 if( (sector >= 5) && (sector <= 7) )
872 memset( &page[0x00 + 16*(sector - 5)], 0, 16 );
876 if( (retval = lpc2900_write_index_page( bank, 7, &page )) != ERROR_OK )
878 LOG_ERROR("failed to update index sector page 7");
883 command_print( CMD_CTX,
884 "Sectors security will become effective after next power cycle");
886 /* Update the sector security status */
887 if ( lpc2900_read_security_status(bank) != ERROR_OK )
889 LOG_ERROR( "Cannot determine sector security status" );
890 return ERROR_FLASH_OPERATION_FAILED;
899 * Activate JTAG protection.
901 COMMAND_HANDLER(lpc2900_handle_secure_jtag_command)
905 return ERROR_COMMAND_SYNTAX_ERROR;
908 /* Get the bank descriptor */
909 struct flash_bank *bank;
910 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
911 if (ERROR_OK != retval)
914 struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
916 /* Check if command execution is allowed. */
917 if( !lpc2900_info->risky )
919 command_print( CMD_CTX, "Command execution not allowed! "
920 "(use 'password' command first)");
921 return ERROR_COMMAND_ARGUMENT_INVALID;
923 lpc2900_info->risky = 0;
926 uint8_t page[FLASH_PAGE_SIZE];
927 memset( &page, 0xff, FLASH_PAGE_SIZE );
930 /* Insert "soft" protection word */
931 page[0x30 + 15] = 0x7F;
932 page[0x30 + 11] = 0x7F;
933 page[0x30 + 7] = 0x7F;
934 page[0x30 + 3] = 0x7F;
936 /* Write to page 5 */
937 if( (retval = lpc2900_write_index_page( bank, 5, &page ))
940 LOG_ERROR("failed to update index sector page 5");
944 LOG_INFO("JTAG security set. Good bye!");
951 /*********************** Flash interface functions **************************/
953 static const struct command_registration lpc2900_exec_command_handlers[] = {
957 .handler = lpc2900_handle_signature_command,
958 .mode = COMMAND_EXEC,
959 .help = "Calculate and display signature of flash bank.",
962 .name = "read_custom",
963 .handler = lpc2900_handle_read_custom_command,
964 .mode = COMMAND_EXEC,
965 .usage = "bank_id filename",
966 .help = "Copies 912 bytes of customer information "
967 "from index sector into file.",
971 .handler = lpc2900_handle_password_command,
972 .mode = COMMAND_EXEC,
973 .usage = "bank_id password",
974 .help = "Enter fixed password to enable 'dangerous' options.",
977 .name = "write_custom",
978 .handler = lpc2900_handle_write_custom_command,
979 .mode = COMMAND_EXEC,
980 .usage = "bank_id filename ('bin'|'ihex'|'elf'|'s19')",
981 .help = "Copies 912 bytes of customer info from file "
985 .name = "secure_sector",
986 .handler = lpc2900_handle_secure_sector_command,
987 .mode = COMMAND_EXEC,
988 .usage = "bank_id first_sector last_sector",
989 .help = "Activate sector security for a range of sectors. "
990 "It will be effective after a power cycle.",
993 .name = "secure_jtag",
994 .handler = lpc2900_handle_secure_jtag_command,
995 .mode = COMMAND_EXEC,
997 .help = "Disable the JTAG port. "
998 "It will be effective after a power cycle.",
1000 COMMAND_REGISTRATION_DONE
1002 static const struct command_registration lpc2900_command_handlers[] = {
1005 .mode = COMMAND_ANY,
1006 .help = "LPC2900 flash command group",
1007 .chain = lpc2900_exec_command_handlers,
1009 COMMAND_REGISTRATION_DONE
1012 /// Evaluate flash bank command.
1013 FLASH_BANK_COMMAND_HANDLER(lpc2900_flash_bank_command)
1015 struct lpc2900_flash_bank *lpc2900_info;
1019 return ERROR_COMMAND_SYNTAX_ERROR;
1022 lpc2900_info = malloc(sizeof(struct lpc2900_flash_bank));
1023 bank->driver_priv = lpc2900_info;
1026 * Reject it if we can't meet the requirements for program time
1027 * (if clock too slow), or for erase time (clock too fast).
1029 uint32_t clk_sys_fmc;
1030 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[6], clk_sys_fmc);
1031 lpc2900_info->clk_sys_fmc = clk_sys_fmc * 1000;
1033 uint32_t clock_limit;
1034 /* Check program time limit */
1035 clock_limit = 512000000l / FLASH_PROGRAM_TIME;
1036 if (lpc2900_info->clk_sys_fmc < clock_limit)
1038 LOG_WARNING("flash clock must be at least %" PRIu32 " kHz",
1039 (clock_limit / 1000));
1040 return ERROR_FLASH_BANK_INVALID;
1043 /* Check erase time limit */
1044 clock_limit = (uint32_t)((32767.0 * 512.0 * 1e6) / FLASH_ERASE_TIME);
1045 if (lpc2900_info->clk_sys_fmc > clock_limit)
1047 LOG_WARNING("flash clock must be a maximum of %" PRIu32" kHz",
1048 (clock_limit / 1000));
1049 return ERROR_FLASH_BANK_INVALID;
1052 /* Chip ID will be obtained by probing the device later */
1053 lpc2900_info->chipid = 0;
1054 lpc2900_info->is_probed = false;
1063 * @param bank Pointer to the flash bank descriptor
1064 * @param first First sector to be erased
1065 * @param last Last sector (including) to be erased
1067 static int lpc2900_erase(struct flash_bank *bank, int first, int last)
1071 int last_unsecured_sector;
1072 struct target *target = bank->target;
1073 struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
1076 status = lpc2900_is_ready(bank);
1077 if (status != ERROR_OK)
1082 /* Sanity check on sector range */
1083 if ((first < 0) || (last < first) || (last >= bank->num_sectors))
1085 LOG_INFO("Bad sector range");
1086 return ERROR_FLASH_SECTOR_INVALID;
1089 /* Update the info about secured sectors */
1090 lpc2900_read_security_status( bank );
1092 /* The selected sector range might include secured sectors. An attempt
1093 * to erase such a sector will cause the erase to fail also for unsecured
1094 * sectors. It is necessary to determine the last unsecured sector now,
1095 * because we have to treat the last relevant sector in the list in
1098 last_unsecured_sector = -1;
1099 for (sector = first; sector <= last; sector++)
1101 if ( !bank->sectors[sector].is_protected )
1103 last_unsecured_sector = sector;
1107 /* Exit now, in case of the rare constellation where all sectors in range
1108 * are secured. This is regarded a success, since erasing/programming of
1109 * secured sectors shall be handled transparently.
1111 if ( last_unsecured_sector == -1 )
1116 /* Enable flash block and set the correct CRA clock of 66 kHz */
1117 lpc2900_setup(bank);
1119 /* Clear END_OF_ERASE interrupt status */
1120 target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_ERASE);
1122 /* Set the program/erase timer to FLASH_ERASE_TIME */
1123 target_write_u32(target, FPTR,
1124 FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
1125 FLASH_ERASE_TIME ));
1127 /* Sectors are marked for erasure, then erased all together */
1128 for (sector = first; sector <= last_unsecured_sector; sector++)
1130 /* Only mark sectors that aren't secured. Any attempt to erase a group
1131 * of sectors will fail if any single one of them is secured!
1133 if ( !bank->sectors[sector].is_protected )
1135 /* Unprotect the sector */
1136 target_write_u32(target, bank->sectors[sector].offset, 0);
1137 target_write_u32(target, FCTR,
1138 FCTR_FS_LOADREQ | FCTR_FS_WPB |
1139 FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
1141 /* Mark the sector for erasure. The last sector in the list
1142 triggers the erasure. */
1143 target_write_u32(target, bank->sectors[sector].offset, 0);
1144 if ( sector == last_unsecured_sector )
1146 target_write_u32(target, FCTR,
1147 FCTR_FS_PROGREQ | FCTR_FS_WPB | FCTR_FS_CS);
1151 target_write_u32(target, FCTR,
1152 FCTR_FS_LOADREQ | FCTR_FS_WPB |
1153 FCTR_FS_WEB | FCTR_FS_CS);
1158 /* Wait for the end of the erase operation. If it's not over after two seconds,
1159 * something went dreadfully wrong... :-(
1161 if( lpc2900_wait_status(bank, INTSRC_END_OF_ERASE, 2000) != ERROR_OK )
1163 return ERROR_FLASH_OPERATION_FAILED;
1166 /* Normal flash operating mode */
1167 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
1174 static int lpc2900_protect(struct flash_bank *bank, int set, int first, int last)
1176 /* This command is not supported.
1177 * "Protection" in LPC2900 terms is handled transparently. Sectors will
1178 * automatically be unprotected as needed.
1179 * Instead we use the concept of sector security. A secured sector is shown
1180 * as "protected" in OpenOCD. Sector security is a permanent feature, and
1181 * cannot be disabled once activated.
1189 * Write data to flash.
1191 * @param bank Pointer to the flash bank descriptor
1192 * @param buffer Buffer with data
1193 * @param offset Start address (relative to bank start)
1194 * @param count Number of bytes to be programmed
1196 static int lpc2900_write(struct flash_bank *bank, uint8_t *buffer,
1197 uint32_t offset, uint32_t count)
1199 uint8_t page[FLASH_PAGE_SIZE];
1202 struct target *target = bank->target;
1203 struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
1207 static const uint32_t write_target_code[] = {
1208 /* Set auto latch mode: FCTR=CS|WRE|WEB */
1209 0xe3a0a007, /* loop mov r10, #0x007 */
1210 0xe583a000, /* str r10,[r3,#0] */
1212 /* Load complete page into latches */
1213 0xe3a06020, /* mov r6,#(512/16) */
1214 0xe8b00f00, /* next ldmia r0!,{r8-r11} */
1215 0xe8a10f00, /* stmia r1!,{r8-r11} */
1216 0xe2566001, /* subs r6,#1 */
1217 0x1afffffb, /* bne next */
1219 /* Clear END_OF_BURN interrupt status */
1220 0xe3a0a002, /* mov r10,#(1 << 1) */
1221 0xe583afe8, /* str r10,[r3,#0xfe8] */
1223 /* Set the erase time to FLASH_PROGRAM_TIME */
1224 0xe5834008, /* str r4,[r3,#8] */
1226 /* Trigger flash write
1227 FCTR = CS | WRE | WPB | PROGREQ */
1228 0xe3a0a083, /* mov r10,#0x83 */
1229 0xe38aaa01, /* orr r10,#0x1000 */
1230 0xe583a000, /* str r10,[r3,#0] */
1232 /* Wait for end of burn */
1233 0xe593afe0, /* wait ldr r10,[r3,#0xfe0] */
1234 0xe21aa002, /* ands r10,#(1 << 1) */
1235 0x0afffffc, /* beq wait */
1238 0xe2522001, /* subs r2,#1 */
1239 0x1affffed, /* bne loop */
1241 0xeafffffe /* done b done */
1245 status = lpc2900_is_ready(bank);
1246 if (status != ERROR_OK)
1251 /* Enable flash block and set the correct CRA clock of 66 kHz */
1252 lpc2900_setup(bank);
1254 /* Update the info about secured sectors */
1255 lpc2900_read_security_status( bank );
1257 /* Unprotect all involved sectors */
1258 for (sector = 0; sector < bank->num_sectors; sector++)
1260 /* Start address in or before this sector? */
1261 /* End address in or behind this sector? */
1262 if ( ((bank->base + offset) <
1263 (bank->sectors[sector].offset + bank->sectors[sector].size)) &&
1264 ((bank->base + (offset + count - 1)) >= bank->sectors[sector].offset) )
1266 /* This sector is involved and needs to be unprotected.
1267 * Don't do it for secured sectors.
1269 if ( !bank->sectors[sector].is_protected )
1271 target_write_u32(target, bank->sectors[sector].offset, 0);
1272 target_write_u32(target, FCTR,
1273 FCTR_FS_LOADREQ | FCTR_FS_WPB |
1274 FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
1279 /* Set the program/erase time to FLASH_PROGRAM_TIME */
1280 uint32_t prog_time = FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
1281 FLASH_PROGRAM_TIME );
1283 /* If there is a working area of reasonable size, use it to program via
1284 a target algorithm. If not, fall back to host programming. */
1286 /* We need some room for target code. */
1287 uint32_t target_code_size = sizeof(write_target_code);
1289 /* Try working area allocation. Start with a large buffer, and try with
1290 reduced size if that fails. */
1291 struct working_area *warea;
1292 uint32_t buffer_size = lpc2900_info->max_ram_block - 1 * KiB;
1293 while( (retval = target_alloc_working_area_try(target,
1294 buffer_size + target_code_size,
1295 &warea)) != ERROR_OK )
1297 /* Try a smaller buffer now, and stop if it's too small. */
1298 buffer_size -= 1 * KiB;
1299 if (buffer_size < 2 * KiB)
1301 LOG_INFO( "no (large enough) working area"
1302 ", falling back to host mode" );
1310 struct reg_param reg_params[5];
1311 struct arm_algorithm armv4_5_info;
1313 /* We can use target mode. Download the algorithm. */
1314 retval = target_write_buffer( target,
1315 (warea->address)+buffer_size,
1317 (uint8_t *)write_target_code);
1318 if (retval != ERROR_OK)
1320 LOG_ERROR("Unable to write block write code to target");
1321 target_free_all_working_areas(target);
1322 return ERROR_FLASH_OPERATION_FAILED;
1325 init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
1326 init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
1327 init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
1328 init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
1329 init_reg_param(®_params[4], "r4", 32, PARAM_OUT);
1331 /* Write to flash in large blocks */
1332 while ( count != 0 )
1334 uint32_t this_npages;
1335 uint8_t *this_buffer;
1336 int start_sector = lpc2900_address2sector( bank, offset );
1338 /* First page / last page / rest */
1339 if( offset % FLASH_PAGE_SIZE )
1341 /* Block doesn't start on page boundary.
1342 Burn first partial page separately. */
1343 memset( &page, 0xff, sizeof(page) );
1344 memcpy( &page[offset % FLASH_PAGE_SIZE],
1346 FLASH_PAGE_SIZE - (offset % FLASH_PAGE_SIZE) );
1348 this_buffer = &page[0];
1349 count = count + (offset % FLASH_PAGE_SIZE);
1350 offset = offset - (offset % FLASH_PAGE_SIZE);
1352 else if( count < FLASH_PAGE_SIZE )
1354 /* Download last incomplete page separately. */
1355 memset( &page, 0xff, sizeof(page) );
1356 memcpy( &page, buffer, count );
1358 this_buffer = &page[0];
1359 count = FLASH_PAGE_SIZE;
1363 /* Download as many full pages as possible */
1364 this_npages = (count < buffer_size) ?
1365 count / FLASH_PAGE_SIZE :
1366 buffer_size / FLASH_PAGE_SIZE;
1367 this_buffer = buffer;
1369 /* Make sure we stop at the next secured sector */
1370 sector = start_sector + 1;
1371 while( sector < bank->num_sectors )
1374 if( bank->sectors[sector].is_protected )
1376 /* Is that next sector within the current block? */
1377 if( (bank->sectors[sector].offset - bank->base) <
1378 (offset + (this_npages * FLASH_PAGE_SIZE)) )
1380 /* Yes! Split the block */
1382 (bank->sectors[sector].offset - bank->base - offset)
1392 /* Skip the current sector if it is secured */
1393 if (bank->sectors[start_sector].is_protected)
1395 LOG_DEBUG("Skip secured sector %d",
1398 /* Stop if this is the last sector */
1399 if (start_sector == bank->num_sectors - 1)
1405 uint32_t nskip = bank->sectors[start_sector].size -
1406 (offset % bank->sectors[start_sector].size);
1409 count = (count >= nskip) ? (count - nskip) : 0;
1413 /* Execute buffer download */
1414 if ((retval = target_write_buffer(target,
1416 this_npages * FLASH_PAGE_SIZE,
1417 this_buffer)) != ERROR_OK)
1419 LOG_ERROR("Unable to write data to target");
1420 target_free_all_working_areas(target);
1421 return ERROR_FLASH_OPERATION_FAILED;
1424 /* Prepare registers */
1425 buf_set_u32(reg_params[0].value, 0, 32, warea->address);
1426 buf_set_u32(reg_params[1].value, 0, 32, offset);
1427 buf_set_u32(reg_params[2].value, 0, 32, this_npages);
1428 buf_set_u32(reg_params[3].value, 0, 32, FCTR);
1429 buf_set_u32(reg_params[4].value, 0, 32, FPTR_EN_T | prog_time);
1431 /* Execute algorithm, assume breakpoint for last instruction */
1432 armv4_5_info.common_magic = ARM_COMMON_MAGIC;
1433 armv4_5_info.core_mode = ARM_MODE_SVC;
1434 armv4_5_info.core_state = ARM_STATE_ARM;
1436 retval = target_run_algorithm(target, 0, NULL, 5, reg_params,
1437 (warea->address) + buffer_size,
1438 (warea->address) + buffer_size + target_code_size - 4,
1439 10000, /* 10s should be enough for max. 16 KiB of data */
1442 if (retval != ERROR_OK)
1444 LOG_ERROR("Execution of flash algorithm failed.");
1445 target_free_all_working_areas(target);
1446 retval = ERROR_FLASH_OPERATION_FAILED;
1450 count -= this_npages * FLASH_PAGE_SIZE;
1451 buffer += this_npages * FLASH_PAGE_SIZE;
1452 offset += this_npages * FLASH_PAGE_SIZE;
1455 /* Free all resources */
1456 destroy_reg_param(®_params[0]);
1457 destroy_reg_param(®_params[1]);
1458 destroy_reg_param(®_params[2]);
1459 destroy_reg_param(®_params[3]);
1460 destroy_reg_param(®_params[4]);
1461 target_free_all_working_areas(target);
1465 /* Write to flash memory page-wise */
1466 while ( count != 0 )
1468 /* How many bytes do we copy this time? */
1469 num_bytes = (count >= FLASH_PAGE_SIZE) ?
1470 FLASH_PAGE_SIZE - (offset % FLASH_PAGE_SIZE) :
1473 /* Don't do anything with it if the page is in a secured sector. */
1474 if ( !bank->sectors[lpc2900_address2sector(bank, offset)].is_protected )
1476 /* Set latch load mode */
1477 target_write_u32(target, FCTR,
1478 FCTR_FS_CS | FCTR_FS_WRE | FCTR_FS_WEB);
1480 /* Always clear the buffer (a little overhead, but who cares) */
1481 memset(page, 0xFF, FLASH_PAGE_SIZE);
1483 /* Copy them to the buffer */
1484 memcpy( &page[offset % FLASH_PAGE_SIZE],
1485 &buffer[offset % FLASH_PAGE_SIZE],
1488 /* Write whole page to flash data latches */
1489 if (target_write_memory(
1491 bank->base + (offset - (offset % FLASH_PAGE_SIZE)),
1492 4, FLASH_PAGE_SIZE / 4, page) != ERROR_OK)
1494 LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
1495 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
1497 return ERROR_FLASH_OPERATION_FAILED;
1500 /* Clear END_OF_BURN interrupt status */
1501 target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_BURN);
1503 /* Set the programming time */
1504 target_write_u32(target, FPTR, FPTR_EN_T | prog_time);
1506 /* Trigger flash write */
1507 target_write_u32(target, FCTR,
1508 FCTR_FS_CS | FCTR_FS_WRE | FCTR_FS_WPB | FCTR_FS_PROGREQ);
1510 /* Wait for the end of the write operation. If it's not over
1511 * after one second, something went dreadfully wrong... :-(
1513 if (lpc2900_wait_status(bank, INTSRC_END_OF_BURN, 1000) != ERROR_OK)
1515 LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
1516 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
1518 return ERROR_FLASH_OPERATION_FAILED;
1522 /* Update pointers and counters */
1523 offset += num_bytes;
1524 buffer += num_bytes;
1531 /* Normal flash operating mode */
1532 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
1539 * Try and identify the device.
1541 * Determine type number and its memory layout.
1543 * @param bank Pointer to the flash bank descriptor
1545 static int lpc2900_probe(struct flash_bank *bank)
1547 struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
1548 struct target *target = bank->target;
1553 if (target->state != TARGET_HALTED)
1555 LOG_ERROR("Target not halted");
1556 return ERROR_TARGET_NOT_HALTED;
1559 /* We want to do this only once. */
1560 if (lpc2900_info->is_probed)
1565 /* Probing starts with reading the CHIPID register. We will continue only
1566 * if this identifies as an LPC2900 device.
1568 target_read_u32(target, CHIPID, &lpc2900_info->chipid);
1570 if (lpc2900_info->chipid != EXPECTED_CHIPID)
1572 LOG_WARNING("Device is not an LPC29xx");
1573 return ERROR_FLASH_OPERATION_FAILED;
1576 /* It's an LPC29xx device. Now read the feature register FEAT0...FEAT3. */
1577 uint32_t feat0, feat1, feat2, feat3;
1578 target_read_u32(target, FEAT0, &feat0);
1579 target_read_u32(target, FEAT1, &feat1);
1580 target_read_u32(target, FEAT2, &feat2);
1581 target_read_u32(target, FEAT3, &feat3);
1584 bank->base = 0x20000000;
1586 /* Determine flash layout from FEAT2 register */
1587 uint32_t num_64k_sectors = (feat2 >> 16) & 0xFF;
1588 uint32_t num_8k_sectors = (feat2 >> 0) & 0xFF;
1589 bank->num_sectors = num_64k_sectors + num_8k_sectors;
1590 bank->size = KiB * (64 * num_64k_sectors + 8 * num_8k_sectors);
1592 /* Determine maximum contiguous RAM block */
1593 lpc2900_info->max_ram_block = 16 * KiB;
1594 if( (feat1 & 0x30) == 0x30 )
1596 lpc2900_info->max_ram_block = 32 * KiB;
1597 if( (feat1 & 0x0C) == 0x0C )
1599 lpc2900_info->max_ram_block = 48 * KiB;
1603 /* Determine package code and ITCM size */
1604 uint32_t package_code = feat0 & 0x0F;
1605 uint32_t itcm_code = (feat1 >> 16) & 0x1F;
1607 /* Determine the exact type number. */
1609 if ( (package_code == 4) && (itcm_code == 5) )
1611 /* Old LPC2917 or LPC2919 (non-/01 devices) */
1612 lpc2900_info->target_name = (bank->size == 768*KiB) ? "LPC2919" : "LPC2917";
1616 if ( package_code == 2 )
1618 /* 100-pin package */
1619 if ( bank->size == 128*KiB )
1621 lpc2900_info->target_name = "LPC2921";
1623 else if ( bank->size == 256*KiB )
1625 lpc2900_info->target_name = "LPC2923";
1627 else if ( bank->size == 512*KiB )
1629 lpc2900_info->target_name = "LPC2925";
1636 else if ( package_code == 4 )
1638 /* 144-pin package */
1639 if ( (bank->size == 256*KiB) && (feat3 == 0xFFFFFFE9) )
1641 lpc2900_info->target_name = "LPC2926";
1643 else if ( (bank->size == 512*KiB) && (feat3 == 0xFFFFFCF0) )
1645 lpc2900_info->target_name = "LPC2917/01";
1647 else if ( (bank->size == 512*KiB) && (feat3 == 0xFFFFFFF1) )
1649 lpc2900_info->target_name = "LPC2927";
1651 else if ( (bank->size == 768*KiB) && (feat3 == 0xFFFFFCF8) )
1653 lpc2900_info->target_name = "LPC2919/01";
1655 else if ( (bank->size == 768*KiB) && (feat3 == 0xFFFFFFF9) )
1657 lpc2900_info->target_name = "LPC2929";
1664 else if ( package_code == 5 )
1666 /* 208-pin package */
1667 lpc2900_info->target_name = (bank->size == 0) ? "LPC2930" : "LPC2939";
1677 LOG_WARNING("Unknown LPC29xx derivative"
1679 "%08" PRIx32 ":%08" PRIx32 ":%08" PRIx32 ":%08" PRIx32 ")",
1680 feat0, feat1, feat2, feat3
1682 return ERROR_FLASH_OPERATION_FAILED;
1685 /* Show detected device */
1686 LOG_INFO("Flash bank %d"
1687 ": Device %s, %" PRIu32
1688 " KiB in %d sectors",
1690 lpc2900_info->target_name, bank->size / KiB,
1693 /* Flashless devices cannot be handled */
1694 if ( bank->num_sectors == 0 )
1696 LOG_WARNING("Flashless device cannot be handled");
1697 return ERROR_FLASH_OPERATION_FAILED;
1701 * These are logical sector numbers. When doing real flash operations,
1702 * the logical flash number are translated into the physical flash numbers
1705 bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
1708 for (i = 0; i < bank->num_sectors; i++)
1710 bank->sectors[i].offset = offset;
1711 bank->sectors[i].is_erased = -1;
1712 bank->sectors[i].is_protected = -1;
1716 bank->sectors[i].size = 8 * KiB;
1720 bank->sectors[i].size = 64 * KiB;
1724 /* We shouldn't come here. But there might be a new part out there
1725 * that has more than 19 sectors. Politely ask for a fix then.
1727 bank->sectors[i].size = 0;
1728 LOG_ERROR("Never heard about sector %d", i);
1731 offset += bank->sectors[i].size;
1734 lpc2900_info->is_probed = true;
1736 /* Read sector security status */
1737 if ( lpc2900_read_security_status(bank) != ERROR_OK )
1739 LOG_ERROR("Cannot determine sector security status");
1740 return ERROR_FLASH_OPERATION_FAILED;
1748 * Run a blank check for each sector.
1750 * For speed reasons, the device isn't read word by word.
1751 * A hash value is calculated by the hardware ("BIST") for each sector.
1752 * This value is then compared against the known hash of an empty sector.
1754 * @param bank Pointer to the flash bank descriptor
1756 static int lpc2900_erase_check(struct flash_bank *bank)
1758 uint32_t status = lpc2900_is_ready(bank);
1759 if (status != ERROR_OK)
1761 LOG_INFO("Processor not halted/not probed");
1765 /* Use the BIST (Built-In Selft Test) to generate a signature of each flash
1766 * sector. Compare against the expected signature of an empty sector.
1769 for ( sector = 0; sector < bank->num_sectors; sector++ )
1771 uint32_t signature[4];
1772 if ( (status = lpc2900_run_bist128( bank,
1773 bank->sectors[sector].offset,
1774 bank->sectors[sector].offset +
1775 (bank->sectors[sector].size - 1),
1776 &signature)) != ERROR_OK )
1781 /* The expected signatures for an empty sector are different
1782 * for 8 KiB and 64 KiB sectors.
1784 if ( bank->sectors[sector].size == 8*KiB )
1786 bank->sectors[sector].is_erased =
1787 (signature[3] == 0x01ABAAAA) &&
1788 (signature[2] == 0xAAAAAAAA) &&
1789 (signature[1] == 0xAAAAAAAA) &&
1790 (signature[0] == 0xAAA00AAA);
1792 if ( bank->sectors[sector].size == 64*KiB )
1794 bank->sectors[sector].is_erased =
1795 (signature[3] == 0x11801222) &&
1796 (signature[2] == 0xB88844FF) &&
1797 (signature[1] == 0x11A22008) &&
1798 (signature[0] == 0x2B1BFE44);
1807 * Get protection (sector security) status.
1809 * Determine the status of "sector security" for each sector.
1810 * A secured sector is one that can never be erased/programmed again.
1812 * @param bank Pointer to the flash bank descriptor
1814 static int lpc2900_protect_check(struct flash_bank *bank)
1816 return lpc2900_read_security_status(bank);
1821 * Print info about the driver (not the device).
1823 * @param bank Pointer to the flash bank descriptor
1824 * @param buf Buffer to take the string
1825 * @param buf_size Maximum number of characters that the buffer can take
1827 static int lpc2900_info(struct flash_bank *bank, char *buf, int buf_size)
1829 snprintf(buf, buf_size, "lpc2900 flash driver");
1835 struct flash_driver lpc2900_flash =
1838 .commands = lpc2900_command_handlers,
1839 .flash_bank_command = lpc2900_flash_bank_command,
1840 .erase = lpc2900_erase,
1841 .protect = lpc2900_protect,
1842 .write = lpc2900_write,
1843 .read = default_flash_read,
1844 .probe = lpc2900_probe,
1845 .auto_probe = lpc2900_probe,
1846 .erase_check = lpc2900_erase_check,
1847 .protect_check = lpc2900_protect_check,
1848 .info = lpc2900_info