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   1 /***************************************************************************
   2  *   Copyright (C) 2011 by Mathias Kuester                                 *
   3  *   kesmtp@freenet.de                                                     *
   4  *                                                                         *
   5  *   Copyright (C) 2011 sleep(5) ltd                                       *
   6  *   tomas@sleepfive.com                                                   *
   7  *                                                                         *
   8  *   Copyright (C) 2012 by Christopher D. Kilgour                          *
   9  *   techie at whiterocker.com                                             *
  10  *                                                                         *
  11  *   Copyright (C) 2013 Nemui Trinomius                                    *
  12  *   nemuisan_kawausogasuki@live.jp                                        *
  13  *                                                                         *
  14  *   Copyright (C) 2015 Tomas Vanek                                        *
  15  *   vanekt@fbl.cz                                                         *
  16  *                                                                         *
  17  *   This program is free software; you can redistribute it and/or modify  *
  18  *   it under the terms of the GNU General Public License as published by  *
  19  *   the Free Software Foundation; either version 2 of the License, or     *
  20  *   (at your option) any later version.                                   *
  21  *                                                                         *
  22  *   This program is distributed in the hope that it will be useful,       *
  23  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  24  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  25  *   GNU General Public License for more details.                          *
  26  *                                                                         *
  27  *   You should have received a copy of the GNU General Public License     *
  28  *   along with this program; if not, write to the                         *
  29  *   Free Software Foundation, Inc.,                                       *
  30  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  31  ***************************************************************************/
  32
  33 #ifdef HAVE_CONFIG_H
  34 #include "config.h"
  35 #endif
  36
  37 #include "jtag/interface.h"
  38 #include "imp.h"
  39 #include <helper/binarybuffer.h>
  40 #include <target/target_type.h>
  41 #include <target/algorithm.h>
  42 #include <target/armv7m.h>
  43 #include <target/cortex_m.h>
  44
  45 /*
  46  * Implementation Notes
  47  *
  48  * The persistent memories in the Kinetis chip families K10 through
  49  * K70 are all manipulated with the Flash Memory Module.  Some
  50  * variants call this module the FTFE, others call it the FTFL.  To
  51  * indicate that both are considered here, we use FTFX.
  52  *
  53  * Within the module, according to the chip variant, the persistent
  54  * memory is divided into what Freescale terms Program Flash, FlexNVM,
  55  * and FlexRAM.  All chip variants have Program Flash.  Some chip
  56  * variants also have FlexNVM and FlexRAM, which always appear
  57  * together.
  58  *
  59  * A given Kinetis chip may have 1, 2 or 4 blocks of flash.  Here we map
  60  * each block to a separate bank.  Each block size varies by chip and
  61  * may be determined by the read-only SIM_FCFG1 register.  The sector
  62  * size within each bank/block varies by chip, and may be 1, 2 or 4k.
  63  * The sector size may be different for flash and FlexNVM.
  64  *
  65  * The first half of the flash (1 or 2 blocks) is always Program Flash
  66  * and always starts at address 0x00000000.  The "PFLSH" flag, bit 23
  67  * of the read-only SIM_FCFG2 register, determines whether the second
  68  * half of the flash is also Program Flash or FlexNVM+FlexRAM.  When
  69  * PFLSH is set, the second from the first half.  When PFLSH is clear,
  70  * the second half of flash is FlexNVM and always starts at address
  71  * 0x10000000.  FlexRAM, which is also present when PFLSH is clear,
  72  * always starts at address 0x14000000.
  73  *
  74  * The Flash Memory Module provides a register set where flash
  75  * commands are loaded to perform flash operations like erase and
  76  * program.  Different commands are available depending on whether
  77  * Program Flash or FlexNVM/FlexRAM is being manipulated.  Although
  78  * the commands used are quite consistent between flash blocks, the
  79  * parameters they accept differ according to the flash sector size.
  80  *
  81  */
  82
  83 /* Addressess */
  84 #define FLEXRAM         0x14000000
  85
  86 #define FMC_PFB01CR     0x4001f004
  87 #define FTFx_FSTAT      0x40020000
  88 #define FTFx_FCNFG      0x40020001
  89 #define FTFx_FCCOB3     0x40020004
  90 #define FTFx_FPROT3     0x40020010
  91 #define FTFx_FDPROT     0x40020017
  92 #define SIM_SDID        0x40048024
  93 #define SIM_SOPT1       0x40047000
  94 #define SIM_FCFG1       0x4004804c
  95 #define SIM_FCFG2       0x40048050
  96 #define WDOG_STCTRH     0x40052000
  97 #define SMC_PMCTRL      0x4007E001
  98 #define SMC_PMSTAT      0x4007E003
  99
 100 /* Values */
 101 #define PM_STAT_RUN             0x01
 102 #define PM_STAT_VLPR            0x04
 103 #define PM_CTRL_RUNM_RUN        0x00
 104
 105 /* Commands */
 106 #define FTFx_CMD_BLOCKSTAT  0x00
 107 #define FTFx_CMD_SECTSTAT   0x01
 108 #define FTFx_CMD_LWORDPROG  0x06
 109 #define FTFx_CMD_SECTERASE  0x09
 110 #define FTFx_CMD_SECTWRITE  0x0b
 111 #define FTFx_CMD_MASSERASE  0x44
 112 #define FTFx_CMD_PGMPART    0x80
 113 #define FTFx_CMD_SETFLEXRAM 0x81
 114
 115 /* The older Kinetis K series uses the following SDID layout :
 116  * Bit 31-16 : 0
 117  * Bit 15-12 : REVID
 118  * Bit 11-7  : DIEID
 119  * Bit 6-4   : FAMID
 120  * Bit 3-0   : PINID
 121  *
 122  * The newer Kinetis series uses the following SDID layout :
 123  * Bit 31-28 : FAMID
 124  * Bit 27-24 : SUBFAMID
 125  * Bit 23-20 : SERIESID
 126  * Bit 19-16 : SRAMSIZE
 127  * Bit 15-12 : REVID
 128  * Bit 6-4   : Reserved (0)
 129  * Bit 3-0   : PINID
 130  *
 131  * We assume that if bits 31-16 are 0 then it's an older
 132  * K-series MCU.
 133  */
 134
 135 #define KINETIS_SOPT1_RAMSIZE_MASK  0x0000F000
 136 #define KINETIS_SOPT1_RAMSIZE_K24FN1M 0x0000B000
 137
 138 #define KINETIS_SDID_K_SERIES_MASK  0x0000FFFF
 139
 140 #define KINETIS_SDID_DIEID_MASK 0x00000F80
 141
 142 #define KINETIS_SDID_DIEID_K22FN128     0x00000680 /* smaller pflash with FTFA */
 143 #define KINETIS_SDID_DIEID_K22FN256     0x00000A80
 144 #define KINETIS_SDID_DIEID_K22FN512     0x00000E80
 145 #define KINETIS_SDID_DIEID_K24FN256     0x00000700
 146
 147 #define KINETIS_SDID_DIEID_K24FN1M      0x00000300 /* Detect Errata 7534 */
 148
 149 /* We can't rely solely on the FAMID field to determine the MCU
 150  * type since some FAMID values identify multiple MCUs with
 151  * different flash sector sizes (K20 and K22 for instance).
 152  * Therefore we combine it with the DIEID bits which may possibly
 153  * break if Freescale bumps the DIEID for a particular MCU. */
 154 #define KINETIS_K_SDID_TYPE_MASK 0x00000FF0
 155 #define KINETIS_K_SDID_K10_M50   0x00000000
 156 #define KINETIS_K_SDID_K10_M72   0x00000080
 157 #define KINETIS_K_SDID_K10_M100  0x00000100
 158 #define KINETIS_K_SDID_K10_M120  0x00000180
 159 #define KINETIS_K_SDID_K11               0x00000220
 160 #define KINETIS_K_SDID_K12               0x00000200
 161 #define KINETIS_K_SDID_K20_M50   0x00000010
 162 #define KINETIS_K_SDID_K20_M72   0x00000090
 163 #define KINETIS_K_SDID_K20_M100  0x00000110
 164 #define KINETIS_K_SDID_K20_M120  0x00000190
 165 #define KINETIS_K_SDID_K21_M50   0x00000230
 166 #define KINETIS_K_SDID_K21_M120  0x00000330
 167 #define KINETIS_K_SDID_K22_M50   0x00000210
 168 #define KINETIS_K_SDID_K22_M120  0x00000310
 169 #define KINETIS_K_SDID_K30_M72   0x000000A0
 170 #define KINETIS_K_SDID_K30_M100  0x00000120
 171 #define KINETIS_K_SDID_K40_M72   0x000000B0
 172 #define KINETIS_K_SDID_K40_M100  0x00000130
 173 #define KINETIS_K_SDID_K50_M72   0x000000E0
 174 #define KINETIS_K_SDID_K51_M72   0x000000F0
 175 #define KINETIS_K_SDID_K53               0x00000170
 176 #define KINETIS_K_SDID_K60_M100  0x00000140
 177 #define KINETIS_K_SDID_K60_M150  0x000001C0
 178 #define KINETIS_K_SDID_K70_M150  0x000001D0
 179
 180 #define KINETIS_SDID_SERIESID_MASK 0x00F00000
 181 #define KINETIS_SDID_SERIESID_K   0x00000000
 182 #define KINETIS_SDID_SERIESID_KL   0x00100000
 183 #define KINETIS_SDID_SERIESID_KW   0x00500000
 184 #define KINETIS_SDID_SERIESID_KV   0x00600000
 185
 186 #define KINETIS_SDID_SUBFAMID_MASK  0x0F000000
 187 #define KINETIS_SDID_SUBFAMID_KX0   0x00000000
 188 #define KINETIS_SDID_SUBFAMID_KX1   0x01000000
 189 #define KINETIS_SDID_SUBFAMID_KX2   0x02000000
 190 #define KINETIS_SDID_SUBFAMID_KX3   0x03000000
 191 #define KINETIS_SDID_SUBFAMID_KX4   0x04000000
 192 #define KINETIS_SDID_SUBFAMID_KX5   0x05000000
 193 #define KINETIS_SDID_SUBFAMID_KX6   0x06000000
 194
 195 #define KINETIS_SDID_FAMILYID_MASK  0xF0000000
 196 #define KINETIS_SDID_FAMILYID_K0X   0x00000000
 197 #define KINETIS_SDID_FAMILYID_K1X   0x10000000
 198 #define KINETIS_SDID_FAMILYID_K2X   0x20000000
 199 #define KINETIS_SDID_FAMILYID_K3X   0x30000000
 200 #define KINETIS_SDID_FAMILYID_K4X   0x40000000
 201 #define KINETIS_SDID_FAMILYID_K6X   0x60000000
 202 #define KINETIS_SDID_FAMILYID_K7X   0x70000000
 203
 204 struct kinetis_flash_bank {
 205         bool probed;
 206         uint32_t sector_size;
 207         uint32_t max_flash_prog_size;
 208         uint32_t protection_size;
 209         uint32_t prog_base;             /* base address for FTFx operations */
 210                                         /* same as bank->base for pflash, differs for FlexNVM */
 211         uint32_t protection_block;      /* number of first protection block in this bank */
 212
 213         uint32_t sim_sdid;
 214         uint32_t sim_fcfg1;
 215         uint32_t sim_fcfg2;
 216
 217         enum {
 218                 FC_AUTO = 0,
 219                 FC_PFLASH,
 220                 FC_FLEX_NVM,
 221                 FC_FLEX_RAM,
 222         } flash_class;
 223
 224         enum {
 225                 FS_PROGRAM_SECTOR = 1,
 226                 FS_PROGRAM_LONGWORD = 2,
 227                 FS_PROGRAM_PHRASE = 4, /* Unsupported */
 228                 FS_INVALIDATE_CACHE = 8,
 229         } flash_support;
 230 };
 231
 232 #define MDM_REG_STAT            0x00
 233 #define MDM_REG_CTRL            0x04
 234 #define MDM_REG_ID              0xfc
 235
 236 #define MDM_STAT_FMEACK         (1<<0)
 237 #define MDM_STAT_FREADY         (1<<1)
 238 #define MDM_STAT_SYSSEC         (1<<2)
 239 #define MDM_STAT_SYSRES         (1<<3)
 240 #define MDM_STAT_FMEEN          (1<<5)
 241 #define MDM_STAT_BACKDOOREN     (1<<6)
 242 #define MDM_STAT_LPEN           (1<<7)
 243 #define MDM_STAT_VLPEN          (1<<8)
 244 #define MDM_STAT_LLSMODEXIT     (1<<9)
 245 #define MDM_STAT_VLLSXMODEXIT   (1<<10)
 246 #define MDM_STAT_CORE_HALTED    (1<<16)
 247 #define MDM_STAT_CORE_SLEEPDEEP (1<<17)
 248 #define MDM_STAT_CORESLEEPING   (1<<18)
 249
 250 #define MEM_CTRL_FMEIP          (1<<0)
 251 #define MEM_CTRL_DBG_DIS        (1<<1)
 252 #define MEM_CTRL_DBG_REQ        (1<<2)
 253 #define MEM_CTRL_SYS_RES_REQ    (1<<3)
 254 #define MEM_CTRL_CORE_HOLD_RES  (1<<4)
 255 #define MEM_CTRL_VLLSX_DBG_REQ  (1<<5)
 256 #define MEM_CTRL_VLLSX_DBG_ACK  (1<<6)
 257 #define MEM_CTRL_VLLSX_STAT_ACK (1<<7)
 258
 259 #define MDM_ACCESS_TIMEOUT      3000 /* iterations */
 260
 261 static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
 262 {
 263         int retval;
 264         LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
 265
 266         retval = dap_queue_ap_write(dap_ap(dap, 1), reg, value);
 267         if (retval != ERROR_OK) {
 268                 LOG_DEBUG("MDM: failed to queue a write request");
 269                 return retval;
 270         }
 271
 272         retval = dap_run(dap);
 273         if (retval != ERROR_OK) {
 274                 LOG_DEBUG("MDM: dap_run failed");
 275                 return retval;
 276         }
 277
 278
 279         return ERROR_OK;
 280 }
 281
 282 static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
 283 {
 284         int retval;
 285
 286         retval = dap_queue_ap_read(dap_ap(dap, 1), reg, result);
 287         if (retval != ERROR_OK) {
 288                 LOG_DEBUG("MDM: failed to queue a read request");
 289                 return retval;
 290         }
 291
 292         retval = dap_run(dap);
 293         if (retval != ERROR_OK) {
 294                 LOG_DEBUG("MDM: dap_run failed");
 295                 return retval;
 296         }
 297
 298         LOG_DEBUG("MDM_REG[0x%02x]: %08" PRIX32, reg, *result);
 299         return ERROR_OK;
 300 }
 301
 302 static int kinetis_mdm_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value)
 303 {
 304         uint32_t val;
 305         int retval;
 306         int timeout = MDM_ACCESS_TIMEOUT;
 307
 308         do {
 309                 retval = kinetis_mdm_read_register(dap, reg, &val);
 310                 if (retval != ERROR_OK || (val & mask) == value)
 311                         return retval;
 312
 313                 alive_sleep(1);
 314         } while (timeout--);
 315
 316         LOG_DEBUG("MDM: polling timed out");
 317         return ERROR_FAIL;
 318 }
 319
 320 /*
 321  * This function implements the procedure to mass erase the flash via
 322  * SWD/JTAG on Kinetis K and L series of devices as it is described in
 323  * AN4835 "Production Flash Programming Best Practices for Kinetis K-
 324  * and L-series MCUs" Section 4.2.1
 325  */
 326 COMMAND_HANDLER(kinetis_mdm_mass_erase)
 327 {
 328         struct target *target = get_current_target(CMD_CTX);
 329         struct cortex_m_common *cortex_m = target_to_cm(target);
 330         struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
 331
 332         if (!dap) {
 333                 LOG_ERROR("Cannot perform mass erase with a high-level adapter");
 334                 return ERROR_FAIL;
 335         }
 336
 337         int retval;
 338
 339         /*
 340          * ... Power on the processor, or if power has already been
 341          * applied, assert the RESET pin to reset the processor. For
 342          * devices that do not have a RESET pin, write the System
 343          * Reset Request bit in the MDM-AP control register after
 344          * establishing communication...
 345          */
 346
 347         /* assert SRST */
 348         if (jtag_get_reset_config() & RESET_HAS_SRST)
 349                 adapter_assert_reset();
 350         else
 351                 LOG_WARNING("Attempting mass erase without hardware reset. This is not reliable; "
 352                             "it's recommended you connect SRST and use ``reset_config srst_only''.");
 353
 354         retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL, MEM_CTRL_SYS_RES_REQ);
 355         if (retval != ERROR_OK)
 356                 return retval;
 357
 358         /*
 359          * ... Read the MDM-AP status register until the Flash Ready bit sets...
 360          */
 361         retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
 362                                            MDM_STAT_FREADY | MDM_STAT_SYSRES,
 363                                            MDM_STAT_FREADY);
 364         if (retval != ERROR_OK) {
 365                 LOG_ERROR("MDM : flash ready timeout");
 366                 return retval;
 367         }
 368
 369         /*
 370          * ... Write the MDM-AP control register to set the Flash Mass
 371          * Erase in Progress bit. This will start the mass erase
 372          * process...
 373          */
 374         retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL,
 375                                             MEM_CTRL_SYS_RES_REQ | MEM_CTRL_FMEIP);
 376         if (retval != ERROR_OK)
 377                 return retval;
 378
 379         /* As a sanity check make sure that device started mass erase procedure */
 380         retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
 381                                            MDM_STAT_FMEACK, MDM_STAT_FMEACK);
 382         if (retval != ERROR_OK)
 383                 return retval;
 384
 385         /*
 386          * ... Read the MDM-AP control register until the Flash Mass
 387          * Erase in Progress bit clears...
 388          */
 389         retval = kinetis_mdm_poll_register(dap, MDM_REG_CTRL,
 390                                            MEM_CTRL_FMEIP,
 391                                            0);
 392         if (retval != ERROR_OK)
 393                 return retval;
 394
 395         /*
 396          * ... Negate the RESET signal or clear the System Reset Request
 397          * bit in the MDM-AP control register...
 398          */
 399         retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL, 0);
 400         if (retval != ERROR_OK)
 401                 return retval;
 402
 403         if (jtag_get_reset_config() & RESET_HAS_SRST) {
 404                 /* halt MCU otherwise it loops in hard fault - WDOG reset cycle */
 405                 target->reset_halt = true;
 406                 target->type->assert_reset(target);
 407                 target->type->deassert_reset(target);
 408         }
 409
 410         return ERROR_OK;
 411 }
 412
 413 static const uint32_t kinetis_known_mdm_ids[] = {
 414         0x001C0000,     /* Kinetis-K Series */
 415         0x001C0020,     /* Kinetis-L/M/V/E Series */
 416 };
 417
 418 /*
 419  * This function implements the procedure to connect to
 420  * SWD/JTAG on Kinetis K and L series of devices as it is described in
 421  * AN4835 "Production Flash Programming Best Practices for Kinetis K-
 422  * and L-series MCUs" Section 4.1.1
 423  */
 424 COMMAND_HANDLER(kinetis_check_flash_security_status)
 425 {
 426         struct target *target = get_current_target(CMD_CTX);
 427         struct cortex_m_common *cortex_m = target_to_cm(target);
 428         struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
 429
 430         if (!dap) {
 431                 LOG_WARNING("Cannot check flash security status with a high-level adapter");
 432                 return ERROR_OK;
 433         }
 434
 435         uint32_t val;
 436         int retval;
 437
 438         /*
 439          * ... The MDM-AP ID register can be read to verify that the
 440          * connection is working correctly...
 441          */
 442         retval = kinetis_mdm_read_register(dap, MDM_REG_ID, &val);
 443         if (retval != ERROR_OK) {
 444                 LOG_ERROR("MDM: failed to read ID register");
 445                 goto fail;
 446         }
 447
 448         bool found = false;
 449         for (size_t i = 0; i < ARRAY_SIZE(kinetis_known_mdm_ids); i++) {
 450                 if (val == kinetis_known_mdm_ids[i]) {
 451                         found = true;
 452                         break;
 453                 }
 454         }
 455
 456         if (!found)
 457                 LOG_WARNING("MDM: unknown ID %08" PRIX32, val);
 458
 459         /*
 460          * ... Read the MDM-AP status register until the Flash Ready bit sets...
 461          */
 462         retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
 463                                            MDM_STAT_FREADY,
 464                                            MDM_STAT_FREADY);
 465         if (retval != ERROR_OK) {
 466                 LOG_ERROR("MDM: flash ready timeout");
 467                 goto fail;
 468         }
 469
 470         /*
 471          * ... Read the System Security bit to determine if security is enabled.
 472          * If System Security = 0, then proceed. If System Security = 1, then
 473          * communication with the internals of the processor, including the
 474          * flash, will not be possible without issuing a mass erase command or
 475          * unsecuring the part through other means (backdoor key unlock)...
 476          */
 477         retval = kinetis_mdm_read_register(dap, MDM_REG_STAT, &val);
 478         if (retval != ERROR_OK) {
 479                 LOG_ERROR("MDM: failed to read MDM_REG_STAT");
 480                 goto fail;
 481         }
 482
 483         if ((val & (MDM_STAT_SYSSEC | MDM_STAT_CORE_HALTED)) == MDM_STAT_SYSSEC) {
 484                 LOG_WARNING("MDM: Secured MCU state detected however it may be a false alarm");
 485                 LOG_WARNING("MDM: Halting target to detect secured state reliably");
 486
 487                 retval = target_halt(target);
 488                 if (retval == ERROR_OK)
 489                         retval = target_wait_state(target, TARGET_HALTED, 100);
 490
 491                 if (retval != ERROR_OK) {
 492                         LOG_WARNING("MDM: Target not halted, trying reset halt");
 493                         target->reset_halt = true;
 494                         target->type->assert_reset(target);
 495                         target->type->deassert_reset(target);
 496                 }
 497
 498                 /* re-read status */
 499                 retval = kinetis_mdm_read_register(dap, MDM_REG_STAT, &val);
 500                 if (retval != ERROR_OK) {
 501                         LOG_ERROR("MDM: failed to read MDM_REG_STAT");
 502                         goto fail;
 503                 }
 504         }
 505
 506         if (val & MDM_STAT_SYSSEC) {
 507                 jtag_poll_set_enabled(false);
 508
 509                 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
 510                 LOG_WARNING("****                                                          ****");
 511                 LOG_WARNING("**** Your Kinetis MCU is in secured state, which means that,  ****");
 512                 LOG_WARNING("**** with exception for very basic communication, JTAG/SWD    ****");
 513                 LOG_WARNING("**** interface will NOT work. In order to restore its         ****");
 514                 LOG_WARNING("**** functionality please issue 'kinetis mdm mass_erase'      ****");
 515                 LOG_WARNING("**** command, power cycle the MCU and restart OpenOCD.        ****");
 516                 LOG_WARNING("****                                                          ****");
 517                 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
 518         } else {
 519                 LOG_INFO("MDM: Chip is unsecured. Continuing.");
 520                 jtag_poll_set_enabled(true);
 521         }
 522
 523         return ERROR_OK;
 524
 525 fail:
 526         LOG_ERROR("MDM: Failed to check security status of the MCU. Cannot proceed further");
 527         jtag_poll_set_enabled(false);
 528         return retval;
 529 }
 530
 531 FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
 532 {
 533         struct kinetis_flash_bank *bank_info;
 534
 535         if (CMD_ARGC < 6)
 536                 return ERROR_COMMAND_SYNTAX_ERROR;
 537
 538         LOG_INFO("add flash_bank kinetis %s", bank->name);
 539
 540         bank_info = malloc(sizeof(struct kinetis_flash_bank));
 541
 542         memset(bank_info, 0, sizeof(struct kinetis_flash_bank));
 543
 544         bank->driver_priv = bank_info;
 545
 546         return ERROR_OK;
 547 }
 548
 549 /* Disable the watchdog on Kinetis devices */
 550 int kinetis_disable_wdog(struct target *target, uint32_t sim_sdid)
 551 {
 552         struct working_area *wdog_algorithm;
 553         struct armv7m_algorithm armv7m_info;
 554         uint16_t wdog;
 555         int retval;
 556
 557         static const uint8_t kinetis_unlock_wdog_code[] = {
 558                 /* WDOG_UNLOCK = 0xC520 */
 559                 0x4f, 0xf4, 0x00, 0x53,    /* mov.w   r3, #8192     ; 0x2000  */
 560                 0xc4, 0xf2, 0x05, 0x03,    /* movt    r3, #16389    ; 0x4005  */
 561                 0x4c, 0xf2, 0x20, 0x52,   /* movw    r2, #50464    ; 0xc520  */
 562                 0xda, 0x81,               /* strh    r2, [r3, #14]  */
 563
 564                 /* WDOG_UNLOCK = 0xD928 */
 565                 0x4f, 0xf4, 0x00, 0x53,   /* mov.w   r3, #8192     ; 0x2000  */
 566                 0xc4, 0xf2, 0x05, 0x03,   /* movt    r3, #16389    ; 0x4005  */
 567                 0x4d, 0xf6, 0x28, 0x12,   /* movw    r2, #55592    ; 0xd928  */
 568                 0xda, 0x81,               /* strh    r2, [r3, #14]  */
 569
 570                 /* WDOG_SCR = 0x1d2 */
 571                 0x4f, 0xf4, 0x00, 0x53,   /* mov.w   r3, #8192     ; 0x2000  */
 572                 0xc4, 0xf2, 0x05, 0x03,   /* movt    r3, #16389    ; 0x4005  */
 573                 0x4f, 0xf4, 0xe9, 0x72,   /* mov.w   r2, #466      ; 0x1d2  */
 574                 0x1a, 0x80,               /* strh    r2, [r3, #0]  */
 575
 576                 /* END */
 577                 0x00, 0xBE,               /* bkpt #0 */
 578         };
 579
 580         /* Decide whether the connected device needs watchdog disabling.
 581          * Disable for all Kx devices, i.e., return if it is a KLx */
 582
 583         if ((sim_sdid & KINETIS_SDID_SERIESID_MASK) == KINETIS_SDID_SERIESID_KL)
 584                 return ERROR_OK;
 585
 586         /* The connected device requires watchdog disabling. */
 587         retval = target_read_u16(target, WDOG_STCTRH, &wdog);
 588         if (retval != ERROR_OK)
 589                 return retval;
 590
 591         if ((wdog & 0x1) == 0) {
 592                 /* watchdog already disabled */
 593                 return ERROR_OK;
 594         }
 595         LOG_INFO("Disabling Kinetis watchdog (initial WDOG_STCTRLH = 0x%x)", wdog);
 596
 597         if (target->state != TARGET_HALTED) {
 598                 LOG_ERROR("Target not halted");
 599                 return ERROR_TARGET_NOT_HALTED;
 600         }
 601
 602         retval = target_alloc_working_area(target, sizeof(kinetis_unlock_wdog_code), &wdog_algorithm);
 603         if (retval != ERROR_OK)
 604                 return retval;
 605
 606         retval = target_write_buffer(target, wdog_algorithm->address,
 607                         sizeof(kinetis_unlock_wdog_code), (uint8_t *)kinetis_unlock_wdog_code);
 608         if (retval != ERROR_OK) {
 609                 target_free_working_area(target, wdog_algorithm);
 610                 return retval;
 611         }
 612
 613         armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
 614         armv7m_info.core_mode = ARM_MODE_THREAD;
 615
 616         retval = target_run_algorithm(target, 0, NULL, 0, NULL, wdog_algorithm->address,
 617                         wdog_algorithm->address + (sizeof(kinetis_unlock_wdog_code) - 2),
 618                         10000, &armv7m_info);
 619
 620         if (retval != ERROR_OK)
 621                 LOG_ERROR("error executing kinetis wdog unlock algorithm");
 622
 623         retval = target_read_u16(target, WDOG_STCTRH, &wdog);
 624         if (retval != ERROR_OK)
 625                 return retval;
 626         LOG_INFO("WDOG_STCTRLH = 0x%x", wdog);
 627
 628         target_free_working_area(target, wdog_algorithm);
 629
 630         return retval;
 631 }
 632
 633 COMMAND_HANDLER(kinetis_disable_wdog_handler)
 634 {
 635         int result;
 636         uint32_t sim_sdid;
 637         struct target *target = get_current_target(CMD_CTX);
 638
 639         if (CMD_ARGC > 0)
 640                 return ERROR_COMMAND_SYNTAX_ERROR;
 641
 642         result = target_read_u32(target, SIM_SDID, &sim_sdid);
 643         if (result != ERROR_OK) {
 644                 LOG_ERROR("Failed to read SIMSDID");
 645                 return result;
 646         }
 647
 648         result = kinetis_disable_wdog(target, sim_sdid);
 649         return result;
 650 }
 651
 652
 653 /* Kinetis Program-LongWord Microcodes */
 654 static const uint8_t kinetis_flash_write_code[] = {
 655         /* Params:
 656          * r0 - workarea buffer
 657         * r1 - target address
 658         * r2 - wordcount
 659         * Clobbered:
 660         * r4 - tmp
 661         * r5 - tmp
 662         * r6 - tmp
 663         * r7 - tmp
 664         */
 665
 666                                                         /* .L1: */
 667                                                 /* for(register uint32_t i=0;i<wcount;i++){ */
 668         0x04, 0x1C,                                     /* mov    r4, r0          */
 669         0x00, 0x23,                                     /* mov    r3, #0          */
 670                                                         /* .L2: */
 671         0x0E, 0x1A,                                     /* sub    r6, r1, r0      */
 672         0xA6, 0x19,                                     /* add    r6, r4, r6      */
 673         0x93, 0x42,                                     /* cmp    r3, r2          */
 674         0x16, 0xD0,                                     /* beq    .L9             */
 675                                                         /* .L5: */
 676                                                 /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
 677         0x0B, 0x4D,                                     /* ldr    r5, .L10        */
 678         0x2F, 0x78,                                     /* ldrb   r7, [r5]        */
 679         0x7F, 0xB2,                                     /* sxtb   r7, r7          */
 680         0x00, 0x2F,                                     /* cmp    r7, #0          */
 681         0xFA, 0xDA,                                     /* bge    .L5             */
 682                                                 /* FTFx_FSTAT = FTFA_FSTAT_ACCERR_MASK|FTFA_FSTAT_FPVIOL_MASK|FTFA_FSTAT_RDCO */
 683         0x70, 0x27,                                     /* mov    r7, #112        */
 684         0x2F, 0x70,                                     /* strb   r7, [r5]        */
 685                                                 /* FTFx_FCCOB3 = faddr; */
 686         0x09, 0x4F,                                     /* ldr    r7, .L10+4      */
 687         0x3E, 0x60,                                     /* str    r6, [r7]        */
 688         0x06, 0x27,                                     /* mov    r7, #6          */
 689                                                 /* FTFx_FCCOB0 = 0x06;  */
 690         0x08, 0x4E,                                     /* ldr    r6, .L10+8      */
 691         0x37, 0x70,                                     /* strb   r7, [r6]        */
 692                                                 /* FTFx_FCCOB7 = *pLW;  */
 693         0x80, 0xCC,                                     /* ldmia  r4!, {r7}       */
 694         0x08, 0x4E,                                     /* ldr    r6, .L10+12     */
 695         0x37, 0x60,                                     /* str    r7, [r6]        */
 696                                                 /* FTFx_FSTAT = FTFA_FSTAT_CCIF_MASK; */
 697         0x80, 0x27,                                     /* mov    r7, #128        */
 698         0x2F, 0x70,                                     /* strb   r7, [r5]        */
 699                                                         /* .L4: */
 700                                                 /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
 701         0x2E, 0x78,                                     /* ldrb    r6, [r5]       */
 702         0x77, 0xB2,                                     /* sxtb    r7, r6         */
 703         0x00, 0x2F,                                     /* cmp     r7, #0         */
 704         0xFB, 0xDA,                                     /* bge     .L4            */
 705         0x01, 0x33,                                     /* add     r3, r3, #1     */
 706         0xE4, 0xE7,                                     /* b       .L2            */
 707                                                         /* .L9: */
 708         0x00, 0xBE,                                     /* bkpt #0                */
 709                                                         /* .L10: */
 710         0x00, 0x00, 0x02, 0x40,         /* .word    1073872896    */
 711         0x04, 0x00, 0x02, 0x40,         /* .word    1073872900    */
 712         0x07, 0x00, 0x02, 0x40,         /* .word    1073872903    */
 713         0x08, 0x00, 0x02, 0x40,         /* .word    1073872904    */
 714 };
 715
 716 /* Program LongWord Block Write */
 717 static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer,
 718                 uint32_t offset, uint32_t wcount)
 719 {
 720         struct target *target = bank->target;
 721         uint32_t buffer_size = 2048;            /* Default minimum value */
 722         struct working_area *write_algorithm;
 723         struct working_area *source;
 724         struct kinetis_flash_bank *kinfo = bank->driver_priv;
 725         uint32_t address = kinfo->prog_base + offset;
 726         struct reg_param reg_params[3];
 727         struct armv7m_algorithm armv7m_info;
 728         int retval = ERROR_OK;
 729
 730         /* Params:
 731          * r0 - workarea buffer
 732          * r1 - target address
 733          * r2 - wordcount
 734          * Clobbered:
 735          * r4 - tmp
 736          * r5 - tmp
 737          * r6 - tmp
 738          * r7 - tmp
 739          */
 740
 741         /* Increase buffer_size if needed */
 742         if (buffer_size < (target->working_area_size/2))
 743                 buffer_size = (target->working_area_size/2);
 744
 745         LOG_INFO("Kinetis: FLASH Write ...");
 746
 747         /* check code alignment */
 748         if (offset & 0x1) {
 749                 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
 750                 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 751         }
 752
 753         /* allocate working area with flash programming code */
 754         if (target_alloc_working_area(target, sizeof(kinetis_flash_write_code),
 755                         &write_algorithm) != ERROR_OK) {
 756                 LOG_WARNING("no working area available, can't do block memory writes");
 757                 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 758         }
 759
 760         retval = target_write_buffer(target, write_algorithm->address,
 761                 sizeof(kinetis_flash_write_code), kinetis_flash_write_code);
 762         if (retval != ERROR_OK)
 763                 return retval;
 764
 765         /* memory buffer */
 766         while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
 767                 buffer_size /= 4;
 768                 if (buffer_size <= 256) {
 769                         /* free working area, write algorithm already allocated */
 770                         target_free_working_area(target, write_algorithm);
 771
 772                         LOG_WARNING("No large enough working area available, can't do block memory writes");
 773                         return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 774                 }
 775         }
 776
 777         armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
 778         armv7m_info.core_mode = ARM_MODE_THREAD;
 779
 780         init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT); /* *pLW (*buffer) */
 781         init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* faddr */
 782         init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT); /* number of words to program */
 783
 784         /* write code buffer and use Flash programming code within kinetis       */
 785         /* Set breakpoint to 0 with time-out of 1000 ms                          */
 786         while (wcount > 0) {
 787                 uint32_t thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount;
 788
 789                 retval = target_write_buffer(target, source->address, thisrun_count * 4, buffer);
 790                 if (retval != ERROR_OK)
 791                         break;
 792
 793                 buf_set_u32(reg_params[0].value, 0, 32, source->address);
 794                 buf_set_u32(reg_params[1].value, 0, 32, address);
 795                 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
 796
 797                 retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 798                                 write_algorithm->address, 0, 100000, &armv7m_info);
 799                 if (retval != ERROR_OK) {
 800                         LOG_ERROR("Error executing kinetis Flash programming algorithm");
 801                         retval = ERROR_FLASH_OPERATION_FAILED;
 802                         break;
 803                 }
 804
 805                 buffer += thisrun_count * 4;
 806                 address += thisrun_count * 4;
 807                 wcount -= thisrun_count;
 808         }
 809
 810         target_free_working_area(target, source);
 811         target_free_working_area(target, write_algorithm);
 812
 813         destroy_reg_param(&reg_params[0]);
 814         destroy_reg_param(&reg_params[1]);
 815         destroy_reg_param(&reg_params[2]);
 816
 817         return retval;
 818 }
 819
 820 static int kinetis_protect(struct flash_bank *bank, int set, int first, int last)
 821 {
 822         LOG_WARNING("kinetis_protect not supported yet");
 823         /* FIXME: TODO */
 824
 825         if (bank->target->state != TARGET_HALTED) {
 826                 LOG_ERROR("Target not halted");
 827                 return ERROR_TARGET_NOT_HALTED;
 828         }
 829
 830         return ERROR_FLASH_BANK_INVALID;
 831 }
 832
 833 static int kinetis_protect_check(struct flash_bank *bank)
 834 {
 835         struct kinetis_flash_bank *kinfo = bank->driver_priv;
 836         int result;
 837         int i, b;
 838         uint32_t fprot, psec;
 839
 840         if (bank->target->state != TARGET_HALTED) {
 841                 LOG_ERROR("Target not halted");
 842                 return ERROR_TARGET_NOT_HALTED;
 843         }
 844
 845         if (kinfo->flash_class == FC_PFLASH) {
 846                 uint8_t buffer[4];
 847
 848                 /* read protection register */
 849                 result = target_read_memory(bank->target, FTFx_FPROT3, 1, 4, buffer);
 850
 851                 if (result != ERROR_OK)
 852                         return result;
 853
 854                 fprot = target_buffer_get_u32(bank->target, buffer);
 855                 /* Every bit protects 1/32 of the full flash (not necessarily just this bank) */
 856
 857         } else if (kinfo->flash_class == FC_FLEX_NVM) {
 858                 uint8_t fdprot;
 859
 860                 /* read protection register */
 861                 result = target_read_memory(bank->target, FTFx_FDPROT, 1, 1, &fdprot);
 862
 863                 if (result != ERROR_OK)
 864                         return result;
 865
 866                 fprot = fdprot;
 867
 868         } else {
 869                 LOG_ERROR("Protection checks for FlexRAM not supported");
 870                 return ERROR_FLASH_BANK_INVALID;
 871         }
 872
 873         b = kinfo->protection_block;
 874         for (psec = 0, i = 0; i < bank->num_sectors; i++) {
 875                 if ((fprot >> b) & 1)
 876                         bank->sectors[i].is_protected = 0;
 877                 else
 878                         bank->sectors[i].is_protected = 1;
 879
 880                 psec += bank->sectors[i].size;
 881
 882                 if (psec >= kinfo->protection_size) {
 883                         psec = 0;
 884                         b++;
 885                 }
 886         }
 887
 888         return ERROR_OK;
 889 }
 890
 891 static int kinetis_ftfx_command(struct target *target, uint8_t fcmd, uint32_t faddr,
 892                                 uint8_t fccob4, uint8_t fccob5, uint8_t fccob6, uint8_t fccob7,
 893                                 uint8_t fccob8, uint8_t fccob9, uint8_t fccoba, uint8_t fccobb,
 894                                 uint8_t *ftfx_fstat)
 895 {
 896         uint8_t command[12] = {faddr & 0xff, (faddr >> 8) & 0xff, (faddr >> 16) & 0xff, fcmd,
 897                         fccob7, fccob6, fccob5, fccob4,
 898                         fccobb, fccoba, fccob9, fccob8};
 899         int result, i;
 900         uint8_t buffer;
 901
 902         /* wait for done */
 903         for (i = 0; i < 50; i++) {
 904                 result =
 905                         target_read_memory(target, FTFx_FSTAT, 1, 1, &buffer);
 906
 907                 if (result != ERROR_OK)
 908                         return result;
 909
 910                 if (buffer & 0x80)
 911                         break;
 912
 913                 buffer = 0x00;
 914         }
 915
 916         if (buffer != 0x80) {
 917                 /* reset error flags */
 918                 buffer = 0x30;
 919                 result =
 920                         target_write_memory(target, FTFx_FSTAT, 1, 1, &buffer);
 921                 if (result != ERROR_OK)
 922                         return result;
 923         }
 924
 925         result = target_write_memory(target, FTFx_FCCOB3, 4, 3, command);
 926
 927         if (result != ERROR_OK)
 928                 return result;
 929
 930         /* start command */
 931         buffer = 0x80;
 932         result = target_write_memory(target, FTFx_FSTAT, 1, 1, &buffer);
 933         if (result != ERROR_OK)
 934                 return result;
 935
 936         /* wait for done */
 937         for (i = 0; i < 240; i++) { /* Need longtime for "Mass Erase" Command Nemui Changed */
 938                 result =
 939                         target_read_memory(target, FTFx_FSTAT, 1, 1, ftfx_fstat);
 940
 941                 if (result != ERROR_OK)
 942                         return result;
 943
 944                 if (*ftfx_fstat & 0x80)
 945                         break;
 946         }
 947
 948         if ((*ftfx_fstat & 0xf0) != 0x80) {
 949                 LOG_ERROR
 950                         ("ftfx command failed FSTAT: %02X FCCOB: %02X%02X%02X%02X %02X%02X%02X%02X %02X%02X%02X%02X",
 951                          *ftfx_fstat, command[3], command[2], command[1], command[0],
 952                          command[7], command[6], command[5], command[4],
 953                          command[11], command[10], command[9], command[8]);
 954                 return ERROR_FLASH_OPERATION_FAILED;
 955         }
 956
 957         return ERROR_OK;
 958 }
 959
 960
 961 static int kinetis_check_run_mode(struct target *target)
 962 {
 963         int result, i;
 964         uint8_t pmctrl, pmstat;
 965
 966         if (target->state != TARGET_HALTED) {
 967                 LOG_ERROR("Target not halted");
 968                 return ERROR_TARGET_NOT_HALTED;
 969         }
 970
 971         result = target_read_u8(target, SMC_PMSTAT, &pmstat);
 972         if (result != ERROR_OK)
 973                 return result;
 974
 975         if (pmstat == PM_STAT_RUN)
 976                 return ERROR_OK;
 977
 978         if (pmstat == PM_STAT_VLPR) {
 979                 /* It is safe to switch from VLPR to RUN mode without changing clock */
 980                 LOG_INFO("Switching from VLPR to RUN mode.");
 981                 pmctrl = PM_CTRL_RUNM_RUN;
 982                 result = target_write_u8(target, SMC_PMCTRL, pmctrl);
 983                 if (result != ERROR_OK)
 984                         return result;
 985
 986                 for (i = 100; i; i--) {
 987                         result = target_read_u8(target, SMC_PMSTAT, &pmstat);
 988                         if (result != ERROR_OK)
 989                                 return result;
 990
 991                         if (pmstat == PM_STAT_RUN)
 992                                 return ERROR_OK;
 993                 }
 994         }
 995
 996         LOG_ERROR("Flash operation not possible in current run mode: SMC_PMSTAT: 0x%x", pmstat);
 997         LOG_ERROR("Issue a 'reset init' command.");
 998         return ERROR_TARGET_NOT_HALTED;
 999 }
1000
1001
1002 static void kinetis_invalidate_flash_cache(struct flash_bank *bank)
1003 {
1004         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1005         uint8_t pfb01cr_byte2 = 0xf0;
1006
1007         if (!(kinfo->flash_support & FS_INVALIDATE_CACHE))
1008                 return;
1009
1010         target_write_memory(bank->target, FMC_PFB01CR + 2, 1, 1, &pfb01cr_byte2);
1011         return;
1012 }
1013
1014
1015 static int kinetis_erase(struct flash_bank *bank, int first, int last)
1016 {
1017         int result, i;
1018         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1019
1020         result = kinetis_check_run_mode(bank->target);
1021         if (result != ERROR_OK)
1022                 return result;
1023
1024         if ((first > bank->num_sectors) || (last > bank->num_sectors))
1025                 return ERROR_FLASH_OPERATION_FAILED;
1026
1027         /*
1028          * FIXME: TODO: use the 'Erase Flash Block' command if the
1029          * requested erase is PFlash or NVM and encompasses the entire
1030          * block.  Should be quicker.
1031          */
1032         for (i = first; i <= last; i++) {
1033                 uint8_t ftfx_fstat;
1034                 /* set command and sector address */
1035                 result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTERASE, kinfo->prog_base + bank->sectors[i].offset,
1036                                 0, 0, 0, 0,  0, 0, 0, 0,  &ftfx_fstat);
1037
1038                 if (result != ERROR_OK) {
1039                         LOG_WARNING("erase sector %d failed", i);
1040                         return ERROR_FLASH_OPERATION_FAILED;
1041                 }
1042
1043                 bank->sectors[i].is_erased = 1;
1044         }
1045
1046         kinetis_invalidate_flash_cache(bank);
1047
1048         if (first == 0) {
1049                 LOG_WARNING
1050                         ("flash configuration field erased, please reset the device");
1051         }
1052
1053         return ERROR_OK;
1054 }
1055
1056 static int kinetis_make_ram_ready(struct target *target)
1057 {
1058         int result;
1059         uint8_t ftfx_fstat;
1060         uint8_t ftfx_fcnfg;
1061
1062         /* check if ram ready */
1063         result = target_read_memory(target, FTFx_FCNFG, 1, 1, &ftfx_fcnfg);
1064         if (result != ERROR_OK)
1065                 return result;
1066
1067         if (ftfx_fcnfg & (1 << 1))
1068                 return ERROR_OK;        /* ram ready */
1069
1070         /* make flex ram available */
1071         result = kinetis_ftfx_command(target, FTFx_CMD_SETFLEXRAM, 0x00ff0000,
1072                                  0, 0, 0, 0,  0, 0, 0, 0,  &ftfx_fstat);
1073         if (result != ERROR_OK)
1074                 return ERROR_FLASH_OPERATION_FAILED;
1075
1076         /* check again */
1077         result = target_read_memory(target, FTFx_FCNFG, 1, 1, &ftfx_fcnfg);
1078         if (result != ERROR_OK)
1079                 return result;
1080
1081         if (ftfx_fcnfg & (1 << 1))
1082                 return ERROR_OK;        /* ram ready */
1083
1084         return ERROR_FLASH_OPERATION_FAILED;
1085 }
1086
1087 static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer,
1088                          uint32_t offset, uint32_t count)
1089 {
1090         unsigned int i, result, fallback = 0;
1091         uint32_t wc;
1092         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1093         uint8_t *new_buffer = NULL;
1094
1095         result = kinetis_check_run_mode(bank->target);
1096         if (result != ERROR_OK)
1097                 return result;
1098
1099         if (!(kinfo->flash_support & FS_PROGRAM_SECTOR)) {
1100                 /* fallback to longword write */
1101                 fallback = 1;
1102                 LOG_WARNING("This device supports Program Longword execution only.");
1103         } else {
1104                 result = kinetis_make_ram_ready(bank->target);
1105                 if (result != ERROR_OK) {
1106                         fallback = 1;
1107                         LOG_WARNING("FlexRAM not ready, fallback to slow longword write.");
1108                 }
1109         }
1110
1111         LOG_DEBUG("flash write @08%" PRIX32, offset);
1112
1113
1114         /* program section command */
1115         if (fallback == 0) {
1116                 /*
1117                  * Kinetis uses different terms for the granularity of
1118                  * sector writes, e.g. "phrase" or "128 bits".  We use
1119                  * the generic term "chunk". The largest possible
1120                  * Kinetis "chunk" is 16 bytes (128 bits).
1121                  */
1122                 unsigned prog_section_chunk_bytes = kinfo->sector_size >> 8;
1123                 unsigned prog_size_bytes = kinfo->max_flash_prog_size;
1124                 for (i = 0; i < count; i += prog_size_bytes) {
1125                         uint8_t residual_buffer[16];
1126                         uint8_t ftfx_fstat;
1127                         uint32_t section_count = prog_size_bytes / prog_section_chunk_bytes;
1128                         uint32_t residual_wc = 0;
1129
1130                         /*
1131                          * Assume the word count covers an entire
1132                          * sector.
1133                          */
1134                         wc = prog_size_bytes / 4;
1135
1136                         /*
1137                          * If bytes to be programmed are less than the
1138                          * full sector, then determine the number of
1139                          * full-words to program, and put together the
1140                          * residual buffer so that a full "section"
1141                          * may always be programmed.
1142                          */
1143                         if ((count - i) < prog_size_bytes) {
1144                                 /* number of bytes to program beyond full section */
1145                                 unsigned residual_bc = (count-i) % prog_section_chunk_bytes;
1146
1147                                 /* number of complete words to copy directly from buffer */
1148                                 wc = (count - i - residual_bc) / 4;
1149
1150                                 /* number of total sections to write, including residual */
1151                                 section_count = DIV_ROUND_UP((count-i), prog_section_chunk_bytes);
1152
1153                                 /* any residual bytes delivers a whole residual section */
1154                                 residual_wc = (residual_bc ? prog_section_chunk_bytes : 0)/4;
1155
1156                                 /* clear residual buffer then populate residual bytes */
1157                                 (void) memset(residual_buffer, 0xff, prog_section_chunk_bytes);
1158                                 (void) memcpy(residual_buffer, &buffer[i+4*wc], residual_bc);
1159                         }
1160
1161                         LOG_DEBUG("write section @ %08" PRIX32 " with length %" PRIu32 " bytes",
1162                                   offset + i, (uint32_t)wc*4);
1163
1164                         /* write data to flexram as whole-words */
1165                         result = target_write_memory(bank->target, FLEXRAM, 4, wc,
1166                                         buffer + i);
1167
1168                         if (result != ERROR_OK) {
1169                                 LOG_ERROR("target_write_memory failed");
1170                                 return result;
1171                         }
1172
1173                         /* write the residual words to the flexram */
1174                         if (residual_wc) {
1175                                 result = target_write_memory(bank->target,
1176                                                 FLEXRAM+4*wc,
1177                                                 4, residual_wc,
1178                                                 residual_buffer);
1179
1180                                 if (result != ERROR_OK) {
1181                                         LOG_ERROR("target_write_memory failed");
1182                                         return result;
1183                                 }
1184                         }
1185
1186                         /* execute section-write command */
1187                         result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTWRITE, kinfo->prog_base + offset + i,
1188                                         section_count>>8, section_count, 0, 0,
1189                                         0, 0, 0, 0,  &ftfx_fstat);
1190
1191                         if (result != ERROR_OK)
1192                                 return ERROR_FLASH_OPERATION_FAILED;
1193                 }
1194         }
1195         /* program longword command, not supported in "SF3" devices */
1196         else if (kinfo->flash_support & FS_PROGRAM_LONGWORD) {
1197                 if (count & 0x3) {
1198                         uint32_t old_count = count;
1199                         count = (old_count | 3) + 1;
1200                         new_buffer = malloc(count);
1201                         if (new_buffer == NULL) {
1202                                 LOG_ERROR("odd number of bytes to write and no memory "
1203                                         "for padding buffer");
1204                                 return ERROR_FAIL;
1205                         }
1206                         LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " "
1207                                 "and padding with 0xff", old_count, count);
1208                         memset(new_buffer, 0xff, count);
1209                         buffer = memcpy(new_buffer, buffer, old_count);
1210                 }
1211
1212                 uint32_t words_remaining = count / 4;
1213
1214                 kinetis_disable_wdog(bank->target, kinfo->sim_sdid);
1215
1216                 /* try using a block write */
1217                 int retval = kinetis_write_block(bank, buffer, offset, words_remaining);
1218
1219                 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
1220                         /* if block write failed (no sufficient working area),
1221                          * we use normal (slow) single word accesses */
1222                         LOG_WARNING("couldn't use block writes, falling back to single "
1223                                 "memory accesses");
1224
1225                         for (i = 0; i < count; i += 4) {
1226                                 uint8_t ftfx_fstat;
1227
1228                                 LOG_DEBUG("write longword @ %08" PRIX32, (uint32_t)(offset + i));
1229
1230                                 uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff};
1231                                 memcpy(padding, buffer + i, MIN(4, count-i));
1232
1233                                 result = kinetis_ftfx_command(bank->target, FTFx_CMD_LWORDPROG, kinfo->prog_base + offset + i,
1234                                                 padding[3], padding[2], padding[1], padding[0],
1235                                                 0, 0, 0, 0,  &ftfx_fstat);
1236
1237                                 if (result != ERROR_OK)
1238                                         return ERROR_FLASH_OPERATION_FAILED;
1239                         }
1240                 }
1241         } else {
1242                 LOG_ERROR("Flash write strategy not implemented");
1243                 return ERROR_FLASH_OPERATION_FAILED;
1244         }
1245
1246         kinetis_invalidate_flash_cache(bank);
1247         return ERROR_OK;
1248 }
1249
1250 static int kinetis_read_part_info(struct flash_bank *bank)
1251 {
1252         int result, i;
1253         uint32_t offset = 0;
1254         uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg1_depart;
1255         uint8_t fcfg2_maxaddr0, fcfg2_pflsh, fcfg2_maxaddr1;
1256         uint32_t nvm_size = 0, pf_size = 0, df_size = 0, ee_size = 0;
1257         unsigned num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0, first_nvm_bank = 0,
1258                         pflash_sector_size_bytes = 0, nvm_sector_size_bytes = 0;
1259         struct target *target = bank->target;
1260         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1261
1262         kinfo->probed = false;
1263
1264         result = target_read_u32(target, SIM_SDID, &kinfo->sim_sdid);
1265         if (result != ERROR_OK)
1266                 return result;
1267
1268         if ((kinfo->sim_sdid & (~KINETIS_SDID_K_SERIES_MASK)) == 0) {
1269                 /* older K-series MCU */
1270                 uint32_t mcu_type = kinfo->sim_sdid & KINETIS_K_SDID_TYPE_MASK;
1271
1272                 switch (mcu_type) {
1273                 case KINETIS_K_SDID_K10_M50:
1274                 case KINETIS_K_SDID_K20_M50:
1275                         /* 1kB sectors */
1276                         pflash_sector_size_bytes = 1<<10;
1277                         nvm_sector_size_bytes = 1<<10;
1278                         num_blocks = 2;
1279                         kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
1280                         break;
1281                 case KINETIS_K_SDID_K10_M72:
1282                 case KINETIS_K_SDID_K20_M72:
1283                 case KINETIS_K_SDID_K30_M72:
1284                 case KINETIS_K_SDID_K30_M100:
1285                 case KINETIS_K_SDID_K40_M72:
1286                 case KINETIS_K_SDID_K40_M100:
1287                 case KINETIS_K_SDID_K50_M72:
1288                         /* 2kB sectors, 1kB FlexNVM sectors */
1289                         pflash_sector_size_bytes = 2<<10;
1290                         nvm_sector_size_bytes = 1<<10;
1291                         num_blocks = 2;
1292                         kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
1293                         kinfo->max_flash_prog_size = 1<<10;
1294                         break;
1295                 case KINETIS_K_SDID_K10_M100:
1296                 case KINETIS_K_SDID_K20_M100:
1297                 case KINETIS_K_SDID_K11:
1298                 case KINETIS_K_SDID_K12:
1299                 case KINETIS_K_SDID_K21_M50:
1300                 case KINETIS_K_SDID_K22_M50:
1301                 case KINETIS_K_SDID_K51_M72:
1302                 case KINETIS_K_SDID_K53:
1303                 case KINETIS_K_SDID_K60_M100:
1304                         /* 2kB sectors */
1305                         pflash_sector_size_bytes = 2<<10;
1306                         nvm_sector_size_bytes = 2<<10;
1307                         num_blocks = 2;
1308                         kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
1309                         break;
1310                 case KINETIS_K_SDID_K21_M120:
1311                 case KINETIS_K_SDID_K22_M120:
1312                         /* 4kB sectors (MK21FN1M0, MK21FX512, MK22FN1M0, MK22FX512) */
1313                         pflash_sector_size_bytes = 4<<10;
1314                         kinfo->max_flash_prog_size = 1<<10;
1315                         nvm_sector_size_bytes = 4<<10;
1316                         num_blocks = 2;
1317                         kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
1318                         break;
1319                 case KINETIS_K_SDID_K10_M120:
1320                 case KINETIS_K_SDID_K20_M120:
1321                 case KINETIS_K_SDID_K60_M150:
1322                 case KINETIS_K_SDID_K70_M150:
1323                         /* 4kB sectors */
1324                         pflash_sector_size_bytes = 4<<10;
1325                         nvm_sector_size_bytes = 4<<10;
1326                         num_blocks = 4;
1327                         kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
1328                         break;
1329                 default:
1330                         LOG_ERROR("Unsupported K-family FAMID");
1331                 }
1332         } else {
1333                 /* Newer K-series or KL series MCU */
1334                 switch (kinfo->sim_sdid & KINETIS_SDID_SERIESID_MASK) {
1335                 case KINETIS_SDID_SERIESID_K:
1336                         switch (kinfo->sim_sdid & (KINETIS_SDID_FAMILYID_MASK | KINETIS_SDID_SUBFAMID_MASK)) {
1337                         case KINETIS_SDID_FAMILYID_K0X | KINETIS_SDID_SUBFAMID_KX2:
1338                                 /* K02FN64, K02FN128: FTFA, 2kB sectors */
1339                                 pflash_sector_size_bytes = 2<<10;
1340                                 num_blocks = 1;
1341                                 kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_INVALIDATE_CACHE;
1342                                 break;
1343
1344                         case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX2: {
1345                                 /* MK24FN1M reports as K22, this should detect it (according to errata note 1N83J) */
1346                                 uint32_t sopt1;
1347                                 result = target_read_u32(target, SIM_SOPT1, &sopt1);
1348                                 if (result != ERROR_OK)
1349                                         return result;
1350
1351                                 if (((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K24FN1M) &&
1352                                                 ((sopt1 & KINETIS_SOPT1_RAMSIZE_MASK) == KINETIS_SOPT1_RAMSIZE_K24FN1M)) {
1353                                         /* MK24FN1M */
1354                                         pflash_sector_size_bytes = 4<<10;
1355                                         num_blocks = 2;
1356                                         kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
1357                                         kinfo->max_flash_prog_size = 1<<10;
1358                                         break;
1359                                 }
1360                                 if ((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN128
1361                                         || (kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN256
1362                                         || (kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN512) {
1363                                         /* K22 with new-style SDID - smaller pflash with FTFA, 2kB sectors */
1364                                         pflash_sector_size_bytes = 2<<10;
1365                                         /* autodetect 1 or 2 blocks */
1366                                         kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_INVALIDATE_CACHE;
1367                                         break;
1368                                 }
1369                                 LOG_ERROR("Unsupported Kinetis K22 DIEID");
1370                                 break;
1371                         }
1372                         case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX4:
1373                                 pflash_sector_size_bytes = 4<<10;
1374                                 if ((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K24FN256) {
1375                                         /* K24FN256 - smaller pflash with FTFA */
1376                                         num_blocks = 1;
1377                                         kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_INVALIDATE_CACHE;
1378                                         break;
1379                                 }
1380                                 /* K24FN1M without errata 7534 */
1381                                 num_blocks = 2;
1382                                 kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
1383                                 kinfo->max_flash_prog_size = 1<<10;
1384                                 break;
1385
1386                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX3:
1387                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX1:     /* errata 7534 - should be K63 */
1388                                 /* K63FN1M0 */
1389                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX4:
1390                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX2:     /* errata 7534 - should be K64 */
1391                                 /* K64FN1M0, K64FX512 */
1392                                 pflash_sector_size_bytes = 4<<10;
1393                                 nvm_sector_size_bytes = 4<<10;
1394                                 kinfo->max_flash_prog_size = 1<<10;
1395                                 num_blocks = 2;
1396                                 kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
1397                                 break;
1398
1399                         case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX6:
1400                                 /* K26FN2M0 */
1401                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX6:
1402                                 /* K66FN2M0, K66FX1M0 */
1403                                 pflash_sector_size_bytes = 4<<10;
1404                                 nvm_sector_size_bytes = 4<<10;
1405                                 kinfo->max_flash_prog_size = 1<<10;
1406                                 num_blocks = 4;
1407                                 kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
1408                                 break;
1409                         default:
1410                                 LOG_ERROR("Unsupported Kinetis FAMILYID SUBFAMID");
1411                         }
1412                         break;
1413                 case KINETIS_SDID_SERIESID_KL:
1414                         /* KL-series */
1415                         pflash_sector_size_bytes = 1<<10;
1416                         nvm_sector_size_bytes = 1<<10;
1417                         /* autodetect 1 or 2 blocks */
1418                         kinfo->flash_support = FS_PROGRAM_LONGWORD;
1419                         break;
1420                 default:
1421                         LOG_ERROR("Unsupported K-series");
1422                 }
1423         }
1424
1425         if (pflash_sector_size_bytes == 0) {
1426                 LOG_ERROR("MCU is unsupported, SDID 0x%08" PRIx32, kinfo->sim_sdid);
1427                 return ERROR_FLASH_OPER_UNSUPPORTED;
1428         }
1429
1430         result = target_read_u32(target, SIM_FCFG1, &kinfo->sim_fcfg1);
1431         if (result != ERROR_OK)
1432                 return result;
1433
1434         result = target_read_u32(target, SIM_FCFG2, &kinfo->sim_fcfg2);
1435         if (result != ERROR_OK)
1436                 return result;
1437
1438         LOG_DEBUG("SDID: 0x%08" PRIX32 " FCFG1: 0x%08" PRIX32 " FCFG2: 0x%08" PRIX32, kinfo->sim_sdid,
1439                         kinfo->sim_fcfg1, kinfo->sim_fcfg2);
1440
1441         fcfg1_nvmsize = (uint8_t)((kinfo->sim_fcfg1 >> 28) & 0x0f);
1442         fcfg1_pfsize = (uint8_t)((kinfo->sim_fcfg1 >> 24) & 0x0f);
1443         fcfg1_eesize = (uint8_t)((kinfo->sim_fcfg1 >> 16) & 0x0f);
1444         fcfg1_depart = (uint8_t)((kinfo->sim_fcfg1 >> 8) & 0x0f);
1445
1446         fcfg2_pflsh = (uint8_t)((kinfo->sim_fcfg2 >> 23) & 0x01);
1447         fcfg2_maxaddr0 = (uint8_t)((kinfo->sim_fcfg2 >> 24) & 0x7f);
1448         fcfg2_maxaddr1 = (uint8_t)((kinfo->sim_fcfg2 >> 16) & 0x7f);
1449
1450         if (num_blocks == 0)
1451                 num_blocks = fcfg2_maxaddr1 ? 2 : 1;
1452         else if (fcfg2_maxaddr1 == 0 && num_blocks >= 2) {
1453                 num_blocks = 1;
1454                 LOG_WARNING("MAXADDR1 is zero, number of flash banks adjusted to 1");
1455         } else if (fcfg2_maxaddr1 != 0 && num_blocks == 1) {
1456                 num_blocks = 2;
1457                 LOG_WARNING("MAXADDR1 is non zero, number of flash banks adjusted to 2");
1458         }
1459
1460         /* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */
1461         if (!fcfg2_pflsh) {
1462                 switch (fcfg1_nvmsize) {
1463                 case 0x03:
1464                 case 0x05:
1465                 case 0x07:
1466                 case 0x09:
1467                 case 0x0b:
1468                         nvm_size = 1 << (14 + (fcfg1_nvmsize >> 1));
1469                         break;
1470                 case 0x0f:
1471                         if (pflash_sector_size_bytes >= 4<<10)
1472                                 nvm_size = 512<<10;
1473                         else
1474                                 /* K20_100 */
1475                                 nvm_size = 256<<10;
1476                         break;
1477                 default:
1478                         nvm_size = 0;
1479                         break;
1480                 }
1481
1482                 switch (fcfg1_eesize) {
1483                 case 0x00:
1484                 case 0x01:
1485                 case 0x02:
1486                 case 0x03:
1487                 case 0x04:
1488                 case 0x05:
1489                 case 0x06:
1490                 case 0x07:
1491                 case 0x08:
1492                 case 0x09:
1493                         ee_size = (16 << (10 - fcfg1_eesize));
1494                         break;
1495                 default:
1496                         ee_size = 0;
1497                         break;
1498                 }
1499
1500                 switch (fcfg1_depart) {
1501                 case 0x01:
1502                 case 0x02:
1503                 case 0x03:
1504                 case 0x04:
1505                 case 0x05:
1506                 case 0x06:
1507                         df_size = nvm_size - (4096 << fcfg1_depart);
1508                         break;
1509                 case 0x08:
1510                         df_size = 0;
1511                         break;
1512                 case 0x09:
1513                 case 0x0a:
1514                 case 0x0b:
1515                 case 0x0c:
1516                 case 0x0d:
1517                         df_size = 4096 << (fcfg1_depart & 0x7);
1518                         break;
1519                 default:
1520                         df_size = nvm_size;
1521                         break;
1522                 }
1523         }
1524
1525         switch (fcfg1_pfsize) {
1526         case 0x03:
1527         case 0x05:
1528         case 0x07:
1529         case 0x09:
1530         case 0x0b:
1531         case 0x0d:
1532                 pf_size = 1 << (14 + (fcfg1_pfsize >> 1));
1533                 break;
1534         case 0x0f:
1535                 /* a peculiar case: Freescale states different sizes for 0xf
1536                  * K02P64M100SFARM      128 KB ... duplicate of code 0x7
1537                  * K22P121M120SF8RM     256 KB ... duplicate of code 0x9
1538                  * K22P121M120SF7RM     512 KB ... duplicate of code 0xb
1539                  * K22P100M120SF5RM     1024 KB ... duplicate of code 0xd
1540                  * K26P169M180SF5RM     2048 KB ... the only unique value
1541                  * fcfg2_maxaddr0 seems to be the only clue to pf_size
1542                  * Checking fcfg2_maxaddr0 later in this routine is pointless then
1543                  */
1544                 if (fcfg2_pflsh)
1545                         pf_size = ((uint32_t)fcfg2_maxaddr0 << 13) * num_blocks;
1546                 else
1547                         pf_size = ((uint32_t)fcfg2_maxaddr0 << 13) * num_blocks / 2;
1548                 if (pf_size != 2048<<10)
1549                         LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %u KB", pf_size>>10);
1550
1551                 break;
1552         default:
1553                 pf_size = 0;
1554                 break;
1555         }
1556
1557         LOG_DEBUG("FlexNVM: %" PRIu32 " PFlash: %" PRIu32 " FlexRAM: %" PRIu32 " PFLSH: %d",
1558                   nvm_size, pf_size, ee_size, fcfg2_pflsh);
1559
1560         num_pflash_blocks = num_blocks / (2 - fcfg2_pflsh);
1561         first_nvm_bank = num_pflash_blocks;
1562         num_nvm_blocks = num_blocks - num_pflash_blocks;
1563
1564         LOG_DEBUG("%d blocks total: %d PFlash, %d FlexNVM",
1565                         num_blocks, num_pflash_blocks, num_nvm_blocks);
1566
1567         LOG_INFO("Probing flash info for bank %d", bank->bank_number);
1568
1569         if ((unsigned)bank->bank_number < num_pflash_blocks) {
1570                 /* pflash, banks start at address zero */
1571                 kinfo->flash_class = FC_PFLASH;
1572                 bank->size = (pf_size / num_pflash_blocks);
1573                 bank->base = 0x00000000 + bank->size * bank->bank_number;
1574                 kinfo->prog_base = bank->base;
1575                 kinfo->sector_size = pflash_sector_size_bytes;
1576                 kinfo->protection_size = pf_size / 32;
1577                 kinfo->protection_block = (32 / num_pflash_blocks) * bank->bank_number;
1578
1579         } else if ((unsigned)bank->bank_number < num_blocks) {
1580                 /* nvm, banks start at address 0x10000000 */
1581                 unsigned nvm_ord = bank->bank_number - first_nvm_bank;
1582                 uint32_t limit;
1583
1584                 kinfo->flash_class = FC_FLEX_NVM;
1585                 bank->size = (nvm_size / num_nvm_blocks);
1586                 bank->base = 0x10000000 + bank->size * nvm_ord;
1587                 kinfo->prog_base = 0x00800000 + bank->size * nvm_ord;
1588                 kinfo->sector_size = nvm_sector_size_bytes;
1589                 if (df_size == 0) {
1590                         kinfo->protection_size = 0;
1591                 } else {
1592                         for (i = df_size; ~i & 1; i >>= 1)
1593                                 ;
1594                         if (i == 1)
1595                                 kinfo->protection_size = df_size / 8;   /* data flash size = 2^^n */
1596                         else
1597                                 kinfo->protection_size = nvm_size / 8;  /* TODO: verify on SF1, not documented in RM */
1598                 }
1599                 kinfo->protection_block = (8 / num_nvm_blocks) * nvm_ord;
1600
1601                 /* EEPROM backup part of FlexNVM is not accessible, use df_size as a limit */
1602                 if (df_size > bank->size * nvm_ord)
1603                         limit = df_size - bank->size * nvm_ord;
1604                 else
1605                         limit = 0;
1606
1607                 if (bank->size > limit) {
1608                         bank->size = limit;
1609                         LOG_DEBUG("FlexNVM bank %d limited to 0x%08" PRIx32 " due to active EEPROM backup",
1610                                 bank->bank_number, limit);
1611                 }
1612
1613         } else if ((unsigned)bank->bank_number == num_blocks) {
1614                 LOG_ERROR("FlexRAM support not yet implemented");
1615                 return ERROR_FLASH_OPER_UNSUPPORTED;
1616         } else {
1617                 LOG_ERROR("Cannot determine parameters for bank %d, only %d banks on device",
1618                                 bank->bank_number, num_blocks);
1619                 return ERROR_FLASH_BANK_INVALID;
1620         }
1621
1622         if (bank->bank_number == 0 && ((uint32_t)fcfg2_maxaddr0 << 13) != bank->size)
1623                 LOG_WARNING("MAXADDR0 0x%02" PRIx8 " check failed,"
1624                                 " please report to OpenOCD mailing list", fcfg2_maxaddr0);
1625         if (fcfg2_pflsh) {
1626                 if (bank->bank_number == 1 && ((uint32_t)fcfg2_maxaddr1 << 13) != bank->size)
1627                         LOG_WARNING("MAXADDR1 0x%02" PRIx8 " check failed,"
1628                                 " please report to OpenOCD mailing list", fcfg2_maxaddr1);
1629         } else {
1630                 if ((unsigned)bank->bank_number == first_nvm_bank
1631                                 && ((uint32_t)fcfg2_maxaddr1 << 13) != df_size)
1632                         LOG_WARNING("FlexNVM MAXADDR1 0x%02" PRIx8 " check failed,"
1633                                 " please report to OpenOCD mailing list", fcfg2_maxaddr1);
1634         }
1635
1636         if (bank->sectors) {
1637                 free(bank->sectors);
1638                 bank->sectors = NULL;
1639         }
1640
1641         if (kinfo->sector_size == 0) {
1642                 LOG_ERROR("Unknown sector size for bank %d", bank->bank_number);
1643                 return ERROR_FLASH_BANK_INVALID;
1644         }
1645
1646         if (kinfo->flash_support & FS_PROGRAM_SECTOR
1647                          && kinfo->max_flash_prog_size == 0) {
1648                 kinfo->max_flash_prog_size = kinfo->sector_size;
1649                 /* Program section size is equal to sector size by default */
1650         }
1651
1652         bank->num_sectors = bank->size / kinfo->sector_size;
1653
1654         if (bank->num_sectors > 0) {
1655                 /* FlexNVM bank can be used for EEPROM backup therefore zero sized */
1656                 bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
1657
1658                 for (i = 0; i < bank->num_sectors; i++) {
1659                         bank->sectors[i].offset = offset;
1660                         bank->sectors[i].size = kinfo->sector_size;
1661                         offset += kinfo->sector_size;
1662                         bank->sectors[i].is_erased = -1;
1663                         bank->sectors[i].is_protected = 1;
1664                 }
1665         }
1666
1667         kinfo->probed = true;
1668
1669         return ERROR_OK;
1670 }
1671
1672 static int kinetis_probe(struct flash_bank *bank)
1673 {
1674         if (bank->target->state != TARGET_HALTED) {
1675                 LOG_WARNING("Cannot communicate... target not halted.");
1676                 return ERROR_TARGET_NOT_HALTED;
1677         }
1678
1679         return kinetis_read_part_info(bank);
1680 }
1681
1682 static int kinetis_auto_probe(struct flash_bank *bank)
1683 {
1684         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1685
1686         if (kinfo && kinfo->probed)
1687                 return ERROR_OK;
1688
1689         return kinetis_probe(bank);
1690 }
1691
1692 static int kinetis_info(struct flash_bank *bank, char *buf, int buf_size)
1693 {
1694         const char *bank_class_names[] = {
1695                 "(ANY)", "PFlash", "FlexNVM", "FlexRAM"
1696         };
1697
1698         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1699
1700         (void) snprintf(buf, buf_size,
1701                         "%s driver for %s flash bank %s at 0x%8.8" PRIx32 "",
1702                         bank->driver->name, bank_class_names[kinfo->flash_class],
1703                         bank->name, bank->base);
1704
1705         return ERROR_OK;
1706 }
1707
1708 static int kinetis_blank_check(struct flash_bank *bank)
1709 {
1710         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1711         int result;
1712
1713         /* suprisingly blank check does not work in VLPR and HSRUN modes */
1714         result = kinetis_check_run_mode(bank->target);
1715         if (result != ERROR_OK)
1716                 return result;
1717
1718         if (kinfo->flash_class == FC_PFLASH || kinfo->flash_class == FC_FLEX_NVM) {
1719                 bool block_dirty = false;
1720                 uint8_t ftfx_fstat;
1721
1722                 if (kinfo->flash_class == FC_FLEX_NVM) {
1723                         uint8_t fcfg1_depart = (uint8_t)((kinfo->sim_fcfg1 >> 8) & 0x0f);
1724                         /* block operation cannot be used on FlexNVM when EEPROM backup partition is set */
1725                         if (fcfg1_depart != 0xf && fcfg1_depart != 0)
1726                                 block_dirty = true;
1727                 }
1728
1729                 if (!block_dirty) {
1730                         /* check if whole bank is blank */
1731                         result = kinetis_ftfx_command(bank->target, FTFx_CMD_BLOCKSTAT, kinfo->prog_base,
1732                                                          0, 0, 0, 0,  0, 0, 0, 0, &ftfx_fstat);
1733
1734                         if (result != ERROR_OK || (ftfx_fstat & 0x01))
1735                                 block_dirty = true;
1736                 }
1737
1738                 if (block_dirty) {
1739                         /* the whole bank is not erased, check sector-by-sector */
1740                         int i;
1741                         for (i = 0; i < bank->num_sectors; i++) {
1742                                 /* normal margin */
1743                                 result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTSTAT,
1744                                                 kinfo->prog_base + bank->sectors[i].offset,
1745                                                 1, 0, 0, 0,  0, 0, 0, 0, &ftfx_fstat);
1746
1747                                 if (result == ERROR_OK) {
1748                                         bank->sectors[i].is_erased = !(ftfx_fstat & 0x01);
1749                                 } else {
1750                                         LOG_DEBUG("Ignoring errored PFlash sector blank-check");
1751                                         bank->sectors[i].is_erased = -1;
1752                                 }
1753                         }
1754                 } else {
1755                         /* the whole bank is erased, update all sectors */
1756                         int i;
1757                         for (i = 0; i < bank->num_sectors; i++)
1758                                 bank->sectors[i].is_erased = 1;
1759                 }
1760         } else {
1761                 LOG_WARNING("kinetis_blank_check not supported yet for FlexRAM");
1762                 return ERROR_FLASH_OPERATION_FAILED;
1763         }
1764
1765         return ERROR_OK;
1766 }
1767
1768
1769 COMMAND_HANDLER(kinetis_nvm_partition)
1770 {
1771         int result, i;
1772         unsigned long par, log2 = 0, ee1 = 0, ee2 = 0;
1773         enum { SHOW_INFO, DF_SIZE, EEBKP_SIZE } sz_type = SHOW_INFO;
1774         bool enable;
1775         uint8_t ftfx_fstat;
1776         uint8_t load_flex_ram = 1;
1777         uint8_t ee_size_code = 0x3f;
1778         uint8_t flex_nvm_partition_code = 0;
1779         uint8_t ee_split = 3;
1780         struct target *target = get_current_target(CMD_CTX);
1781         struct flash_bank *bank;
1782         struct kinetis_flash_bank *kinfo;
1783         uint32_t sim_fcfg1;
1784
1785         if (CMD_ARGC >= 2) {
1786                 if (strcmp(CMD_ARGV[0], "dataflash") == 0)
1787                         sz_type = DF_SIZE;
1788                 else if (strcmp(CMD_ARGV[0], "eebkp") == 0)
1789                         sz_type = EEBKP_SIZE;
1790
1791                 par = strtoul(CMD_ARGV[1], NULL, 10);
1792                 while (par >> (log2 + 3))
1793                         log2++;
1794         }
1795         switch (sz_type) {
1796         case SHOW_INFO:
1797                 result = target_read_u32(target, SIM_FCFG1, &sim_fcfg1);
1798                 if (result != ERROR_OK)
1799                         return result;
1800
1801                 flex_nvm_partition_code = (uint8_t)((sim_fcfg1 >> 8) & 0x0f);
1802                 switch (flex_nvm_partition_code) {
1803                 case 0:
1804                         command_print(CMD_CTX, "No EEPROM backup, data flash only");
1805                         break;
1806                 case 1:
1807                 case 2:
1808                 case 3:
1809                 case 4:
1810                 case 5:
1811                 case 6:
1812                         command_print(CMD_CTX, "EEPROM backup %d KB", 4 << flex_nvm_partition_code);
1813                         break;
1814                 case 8:
1815                         command_print(CMD_CTX, "No data flash, EEPROM backup only");
1816                         break;
1817                 case 0x9:
1818                 case 0xA:
1819                 case 0xB:
1820                 case 0xC:
1821                 case 0xD:
1822                 case 0xE:
1823                         command_print(CMD_CTX, "data flash %d KB", 4 << (flex_nvm_partition_code & 7));
1824                         break;
1825                 case 0xf:
1826                         command_print(CMD_CTX, "No EEPROM backup, data flash only (DEPART not set)");
1827                         break;
1828                 default:
1829                         command_print(CMD_CTX, "Unsupported EEPROM backup size code 0x%02" PRIx8, flex_nvm_partition_code);
1830                 }
1831                 return ERROR_OK;
1832
1833         case DF_SIZE:
1834                 flex_nvm_partition_code = 0x8 | log2;
1835                 break;
1836
1837         case EEBKP_SIZE:
1838                 flex_nvm_partition_code = log2;
1839                 break;
1840         }
1841
1842         if (CMD_ARGC == 3)
1843                 ee1 = ee2 = strtoul(CMD_ARGV[2], NULL, 10) / 2;
1844         else if (CMD_ARGC >= 4) {
1845                 ee1 = strtoul(CMD_ARGV[2], NULL, 10);
1846                 ee2 = strtoul(CMD_ARGV[3], NULL, 10);
1847         }
1848
1849         enable = ee1 + ee2 > 0;
1850         if (enable) {
1851                 for (log2 = 2; ; log2++) {
1852                         if (ee1 + ee2 == (16u << 10) >> log2)
1853                                 break;
1854                         if (ee1 + ee2 > (16u << 10) >> log2 || log2 >= 9) {
1855                                 LOG_ERROR("Unsupported EEPROM size");
1856                                 return ERROR_FLASH_OPERATION_FAILED;
1857                         }
1858                 }
1859
1860                 if (ee1 * 3 == ee2)
1861                         ee_split = 1;
1862                 else if (ee1 * 7 == ee2)
1863                         ee_split = 0;
1864                 else if (ee1 != ee2) {
1865                         LOG_ERROR("Unsupported EEPROM sizes ratio");
1866                         return ERROR_FLASH_OPERATION_FAILED;
1867                 }
1868
1869                 ee_size_code = log2 | ee_split << 4;
1870         }
1871
1872         if (CMD_ARGC >= 5)
1873                 COMMAND_PARSE_ON_OFF(CMD_ARGV[4], enable);
1874         if (enable)
1875                 load_flex_ram = 0;
1876
1877         LOG_INFO("DEPART 0x%" PRIx8 ", EEPROM size code 0x%" PRIx8,
1878                  flex_nvm_partition_code, ee_size_code);
1879
1880         result = kinetis_check_run_mode(target);
1881         if (result != ERROR_OK)
1882                 return result;
1883
1884         result = kinetis_ftfx_command(target, FTFx_CMD_PGMPART, load_flex_ram,
1885                                       ee_size_code, flex_nvm_partition_code, 0, 0,
1886                                       0, 0, 0, 0,  &ftfx_fstat);
1887         if (result != ERROR_OK)
1888                 return result;
1889
1890         command_print(CMD_CTX, "FlexNVM partition set. Please reset MCU.");
1891
1892         for (i = 1; i < 4; i++) {
1893                 bank = get_flash_bank_by_num_noprobe(i);
1894                 if (bank == NULL)
1895                         break;
1896
1897                 kinfo = bank->driver_priv;
1898                 if (kinfo && kinfo->flash_class == FC_FLEX_NVM)
1899                         kinfo->probed = false;  /* re-probe before next use */
1900         }
1901
1902         command_print(CMD_CTX, "FlexNVM banks will be re-probed to set new data flash size.");
1903         return ERROR_OK;
1904 }
1905
1906
1907 static const struct command_registration kinetis_securtiy_command_handlers[] = {
1908         {
1909                 .name = "check_security",
1910                 .mode = COMMAND_EXEC,
1911                 .help = "",
1912                 .usage = "",
1913                 .handler = kinetis_check_flash_security_status,
1914         },
1915         {
1916                 .name = "mass_erase",
1917                 .mode = COMMAND_EXEC,
1918                 .help = "",
1919                 .usage = "",
1920                 .handler = kinetis_mdm_mass_erase,
1921         },
1922         COMMAND_REGISTRATION_DONE
1923 };
1924
1925 static const struct command_registration kinetis_exec_command_handlers[] = {
1926         {
1927                 .name = "mdm",
1928                 .mode = COMMAND_ANY,
1929                 .help = "",
1930                 .usage = "",
1931                 .chain = kinetis_securtiy_command_handlers,
1932         },
1933         {
1934                 .name = "disable_wdog",
1935                 .mode = COMMAND_EXEC,
1936                 .help = "Disable the watchdog timer",
1937                 .usage = "",
1938                 .handler = kinetis_disable_wdog_handler,
1939         },
1940         {
1941                 .name = "nvm_partition",
1942                 .mode = COMMAND_EXEC,
1943                 .help = "Show/set data flash or EEPROM backup size in kilobytes,"
1944                         " set two EEPROM sizes in bytes and FlexRAM loading during reset",
1945                 .usage = "('info'|'dataflash' size|'eebkp' size) [eesize1 eesize2] ['on'|'off']",
1946                 .handler = kinetis_nvm_partition,
1947         },
1948         COMMAND_REGISTRATION_DONE
1949 };
1950
1951 static const struct command_registration kinetis_command_handler[] = {
1952         {
1953                 .name = "kinetis",
1954                 .mode = COMMAND_ANY,
1955                 .help = "kinetis flash controller commands",
1956                 .usage = "",
1957                 .chain = kinetis_exec_command_handlers,
1958         },
1959         COMMAND_REGISTRATION_DONE
1960 };
1961
1962
1963
1964 struct flash_driver kinetis_flash = {
1965         .name = "kinetis",
1966         .commands = kinetis_command_handler,
1967         .flash_bank_command = kinetis_flash_bank_command,
1968         .erase = kinetis_erase,
1969         .protect = kinetis_protect,
1970         .write = kinetis_write,
1971         .read = default_flash_read,
1972         .probe = kinetis_probe,
1973         .auto_probe = kinetis_auto_probe,
1974         .erase_check = kinetis_blank_check,
1975         .protect_check = kinetis_protect_check,
1976         .info = kinetis_info,
1977 };