1 /***************************************************************************
2 * Copyright (C) 2011 by Mathias Kuester *
5 * Copyright (C) 2011 sleep(5) ltd *
6 * tomas@sleepfive.com *
8 * Copyright (C) 2012 by Christopher D. Kilgour *
9 * techie at whiterocker.com *
11 * Copyright (C) 2013 Nemui Trinomius *
12 * nemuisan_kawausogasuki@live.jp *
14 * This program is free software; you can redistribute it and/or modify *
15 * it under the terms of the GNU General Public License as published by *
16 * the Free Software Foundation; either version 2 of the License, or *
17 * (at your option) any later version. *
19 * This program is distributed in the hope that it will be useful, *
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
22 * GNU General Public License for more details. *
24 * You should have received a copy of the GNU General Public License *
25 * along with this program; if not, write to the *
26 * Free Software Foundation, Inc., *
27 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
28 ***************************************************************************/
34 #include "jtag/interface.h"
36 #include <helper/binarybuffer.h>
37 #include <target/algorithm.h>
38 #include <target/armv7m.h>
39 #include <target/cortex_m.h>
42 * Implementation Notes
44 * The persistent memories in the Kinetis chip families K10 through
45 * K70 are all manipulated with the Flash Memory Module. Some
46 * variants call this module the FTFE, others call it the FTFL. To
47 * indicate that both are considered here, we use FTFX.
49 * Within the module, according to the chip variant, the persistent
50 * memory is divided into what Freescale terms Program Flash, FlexNVM,
51 * and FlexRAM. All chip variants have Program Flash. Some chip
52 * variants also have FlexNVM and FlexRAM, which always appear
55 * A given Kinetis chip may have 1, 2 or 4 blocks of flash. Here we map
56 * each block to a separate bank. Each block size varies by chip and
57 * may be determined by the read-only SIM_FCFG1 register. The sector
58 * size within each bank/block varies by chip, and may be 1, 2 or 4k.
59 * The sector size may be different for flash and FlexNVM.
61 * The first half of the flash (1 or 2 blocks) is always Program Flash
62 * and always starts at address 0x00000000. The "PFLSH" flag, bit 23
63 * of the read-only SIM_FCFG2 register, determines whether the second
64 * half of the flash is also Program Flash or FlexNVM+FlexRAM. When
65 * PFLSH is set, the second from the first half. When PFLSH is clear,
66 * the second half of flash is FlexNVM and always starts at address
67 * 0x10000000. FlexRAM, which is also present when PFLSH is clear,
68 * always starts at address 0x14000000.
70 * The Flash Memory Module provides a register set where flash
71 * commands are loaded to perform flash operations like erase and
72 * program. Different commands are available depending on whether
73 * Program Flash or FlexNVM/FlexRAM is being manipulated. Although
74 * the commands used are quite consistent between flash blocks, the
75 * parameters they accept differ according to the flash sector size.
80 #define FLEXRAM 0x14000000
81 #define FTFx_FSTAT 0x40020000
82 #define FTFx_FCNFG 0x40020001
83 #define FTFx_FCCOB3 0x40020004
84 #define FTFx_FPROT3 0x40020010
85 #define SIM_SDID 0x40048024
86 #define SIM_SOPT1 0x40047000
87 #define SIM_FCFG1 0x4004804c
88 #define SIM_FCFG2 0x40048050
91 #define FTFx_CMD_BLOCKSTAT 0x00
92 #define FTFx_CMD_SECTSTAT 0x01
93 #define FTFx_CMD_LWORDPROG 0x06
94 #define FTFx_CMD_SECTERASE 0x09
95 #define FTFx_CMD_SECTWRITE 0x0b
96 #define FTFx_CMD_SETFLEXRAM 0x81
97 #define FTFx_CMD_MASSERASE 0x44
99 /* The older Kinetis K series uses the following SDID layout :
106 * The newer Kinetis series uses the following SDID layout :
108 * Bit 27-24 : SUBFAMID
109 * Bit 23-20 : SERIESID
110 * Bit 19-16 : SRAMSIZE
112 * Bit 6-4 : Reserved (0)
115 * We assume that if bits 31-16 are 0 then it's an older
119 #define KINETIS_SOPT1_RAMSIZE_MASK 0x0000F000
120 #define KINETIS_SOPT1_RAMSIZE_K24FN1M 0x0000B000
122 #define KINETIS_SDID_K_SERIES_MASK 0x0000FFFF
124 #define KINETIS_SDID_DIEID_MASK 0x00000F80
125 #define KINETIS_SDID_DIEID_K_A 0x00000100
126 #define KINETIS_SDID_DIEID_K_B 0x00000200
127 #define KINETIS_SDID_DIEID_KL 0x00000000
128 #define KINETIS_SDID_DIEID_K24FN1M 0x00000300 /* Detect Errata 7534 */
130 /* We can't rely solely on the FAMID field to determine the MCU
131 * type since some FAMID values identify multiple MCUs with
132 * different flash sector sizes (K20 and K22 for instance).
133 * Therefore we combine it with the DIEID bits which may possibly
134 * break if Freescale bumps the DIEID for a particular MCU. */
135 #define KINETIS_K_SDID_TYPE_MASK 0x00000FF0
136 #define KINETIS_K_SDID_K10_M50 0x00000000
137 #define KINETIS_K_SDID_K10_M72 0x00000080
138 #define KINETIS_K_SDID_K10_M100 0x00000100
139 #define KINETIS_K_SDID_K10_M120 0x00000180
140 #define KINETIS_K_SDID_K11 0x00000220
141 #define KINETIS_K_SDID_K12 0x00000200
142 #define KINETIS_K_SDID_K20_M50 0x00000010
143 #define KINETIS_K_SDID_K20_M72 0x00000090
144 #define KINETIS_K_SDID_K20_M100 0x00000110
145 #define KINETIS_K_SDID_K20_M120 0x00000190
146 #define KINETIS_K_SDID_K21_M50 0x00000230
147 #define KINETIS_K_SDID_K21_M120 0x00000330
148 #define KINETIS_K_SDID_K22_M50 0x00000210
149 #define KINETIS_K_SDID_K22_M120 0x00000310
150 #define KINETIS_K_SDID_K30_M72 0x000000A0
151 #define KINETIS_K_SDID_K30_M100 0x00000120
152 #define KINETIS_K_SDID_K40_M72 0x000000B0
153 #define KINETIS_K_SDID_K40_M100 0x00000130
154 #define KINETIS_K_SDID_K50_M72 0x000000E0
155 #define KINETIS_K_SDID_K51_M72 0x000000F0
156 #define KINETIS_K_SDID_K53 0x00000170
157 #define KINETIS_K_SDID_K60_M100 0x00000140
158 #define KINETIS_K_SDID_K60_M150 0x000001C0
159 #define KINETIS_K_SDID_K70_M150 0x000001D0
161 #define KINETIS_SDID_SERIESID_MASK 0x00F00000
162 #define KINETIS_SDID_SERIESID_K 0x00000000
163 #define KINETIS_SDID_SERIESID_KL 0x00100000
164 #define KINETIS_SDID_SERIESID_KW 0x00500000
165 #define KINETIS_SDID_SERIESID_KV 0x00600000
167 #define KINETIS_SDID_SUBFAMID_MASK 0x0F000000
168 #define KINETIS_SDID_SUBFAMID_KX0 0x00000000
169 #define KINETIS_SDID_SUBFAMID_KX1 0x01000000
170 #define KINETIS_SDID_SUBFAMID_KX2 0x02000000
171 #define KINETIS_SDID_SUBFAMID_KX3 0x03000000
172 #define KINETIS_SDID_SUBFAMID_KX4 0x04000000
173 #define KINETIS_SDID_SUBFAMID_KX5 0x05000000
174 #define KINETIS_SDID_SUBFAMID_KX6 0x06000000
176 #define KINETIS_SDID_FAMILYID_MASK 0xF0000000
177 #define KINETIS_SDID_FAMILYID_K0X 0x00000000
178 #define KINETIS_SDID_FAMILYID_K1X 0x10000000
179 #define KINETIS_SDID_FAMILYID_K2X 0x20000000
180 #define KINETIS_SDID_FAMILYID_K3X 0x30000000
181 #define KINETIS_SDID_FAMILYID_K4X 0x40000000
182 #define KINETIS_SDID_FAMILYID_K6X 0x60000000
183 #define KINETIS_SDID_FAMILYID_K7X 0x70000000
185 struct kinetis_flash_bank {
186 unsigned bank_ordinal;
187 uint32_t sector_size;
188 uint32_t max_flash_prog_size;
189 uint32_t protection_size;
203 FS_PROGRAM_SECTOR = 1,
204 FS_PROGRAM_LONGWORD = 2,
205 FS_PROGRAM_PHRASE = 4, /* Unsupported */
209 #define MDM_REG_STAT 0x00
210 #define MDM_REG_CTRL 0x04
211 #define MDM_REG_ID 0xfc
213 #define MDM_STAT_FMEACK (1<<0)
214 #define MDM_STAT_FREADY (1<<1)
215 #define MDM_STAT_SYSSEC (1<<2)
216 #define MDM_STAT_SYSRES (1<<3)
217 #define MDM_STAT_FMEEN (1<<5)
218 #define MDM_STAT_BACKDOOREN (1<<6)
219 #define MDM_STAT_LPEN (1<<7)
220 #define MDM_STAT_VLPEN (1<<8)
221 #define MDM_STAT_LLSMODEXIT (1<<9)
222 #define MDM_STAT_VLLSXMODEXIT (1<<10)
223 #define MDM_STAT_CORE_HALTED (1<<16)
224 #define MDM_STAT_CORE_SLEEPDEEP (1<<17)
225 #define MDM_STAT_CORESLEEPING (1<<18)
227 #define MEM_CTRL_FMEIP (1<<0)
228 #define MEM_CTRL_DBG_DIS (1<<1)
229 #define MEM_CTRL_DBG_REQ (1<<2)
230 #define MEM_CTRL_SYS_RES_REQ (1<<3)
231 #define MEM_CTRL_CORE_HOLD_RES (1<<4)
232 #define MEM_CTRL_VLLSX_DBG_REQ (1<<5)
233 #define MEM_CTRL_VLLSX_DBG_ACK (1<<6)
234 #define MEM_CTRL_VLLSX_STAT_ACK (1<<7)
236 #define MDM_ACCESS_TIMEOUT 3000 /* iterations */
238 static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
241 LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
243 retval = dap_queue_ap_write(dap, reg, value);
244 if (retval != ERROR_OK) {
245 LOG_DEBUG("MDM: failed to queue a write request");
249 retval = dap_run(dap);
250 if (retval != ERROR_OK) {
251 LOG_DEBUG("MDM: dap_run failed");
259 static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
262 retval = dap_queue_ap_read(dap, reg, result);
263 if (retval != ERROR_OK) {
264 LOG_DEBUG("MDM: failed to queue a read request");
268 retval = dap_run(dap);
269 if (retval != ERROR_OK) {
270 LOG_DEBUG("MDM: dap_run failed");
274 LOG_DEBUG("MDM_REG[0x%02x]: %08" PRIX32, reg, *result);
278 static int kinetis_mdm_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value)
282 int timeout = MDM_ACCESS_TIMEOUT;
285 retval = kinetis_mdm_read_register(dap, reg, &val);
286 if (retval != ERROR_OK || (val & mask) == value)
292 LOG_DEBUG("MDM: polling timed out");
297 * This function implements the procedure to mass erase the flash via
298 * SWD/JTAG on Kinetis K and L series of devices as it is described in
299 * AN4835 "Production Flash Programming Best Practices for Kinetis K-
300 * and L-series MCUs" Section 4.2.1
302 COMMAND_HANDLER(kinetis_mdm_mass_erase)
304 struct target *target = get_current_target(CMD_CTX);
305 struct cortex_m_common *cortex_m = target_to_cm(target);
306 struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
309 LOG_ERROR("Cannot perform mass erase with a high-level adapter");
314 const uint8_t original_ap = dap->ap_current;
317 * ... Power on the processor, or if power has already been
318 * applied, assert the RESET pin to reset the processor. For
319 * devices that do not have a RESET pin, write the System
320 * Reset Request bit in the MDM-AP control register after
321 * establishing communication...
325 if (jtag_get_reset_config() & RESET_HAS_SRST)
326 adapter_assert_reset();
328 LOG_WARNING("Attempting mass erase without hardware reset. This is not reliable; "
329 "it's recommended you connect SRST and use ``reset_config srst_only''.");
331 dap_ap_select(dap, 1);
333 retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL, MEM_CTRL_SYS_RES_REQ);
334 if (retval != ERROR_OK)
338 * ... Read the MDM-AP status register until the Flash Ready bit sets...
340 retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
341 MDM_STAT_FREADY | MDM_STAT_SYSRES,
343 if (retval != ERROR_OK) {
344 LOG_ERROR("MDM : flash ready timeout");
349 * ... Write the MDM-AP control register to set the Flash Mass
350 * Erase in Progress bit. This will start the mass erase
353 retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL,
354 MEM_CTRL_SYS_RES_REQ | MEM_CTRL_FMEIP);
355 if (retval != ERROR_OK)
358 /* As a sanity check make sure that device started mass erase procedure */
359 retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
360 MDM_STAT_FMEACK, MDM_STAT_FMEACK);
361 if (retval != ERROR_OK)
365 * ... Read the MDM-AP control register until the Flash Mass
366 * Erase in Progress bit clears...
368 retval = kinetis_mdm_poll_register(dap, MDM_REG_CTRL,
371 if (retval != ERROR_OK)
375 * ... Negate the RESET signal or clear the System Reset Request
376 * bit in the MDM-AP control register...
378 retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL, 0);
379 if (retval != ERROR_OK)
382 if (jtag_get_reset_config() & RESET_HAS_SRST)
383 adapter_deassert_reset();
385 dap_ap_select(dap, original_ap);
389 static const uint32_t kinetis_known_mdm_ids[] = {
390 0x001C0000, /* Kinetis-K Series */
391 0x001C0020, /* Kinetis-L/M/V/E Series */
395 * This function implements the procedure to connect to
396 * SWD/JTAG on Kinetis K and L series of devices as it is described in
397 * AN4835 "Production Flash Programming Best Practices for Kinetis K-
398 * and L-series MCUs" Section 4.1.1
400 COMMAND_HANDLER(kinetis_check_flash_security_status)
402 struct target *target = get_current_target(CMD_CTX);
403 struct cortex_m_common *cortex_m = target_to_cm(target);
404 struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
407 LOG_WARNING("Cannot check flash security status with a high-level adapter");
413 const uint8_t origninal_ap = dap->ap_current;
415 dap_ap_select(dap, 1);
419 * ... The MDM-AP ID register can be read to verify that the
420 * connection is working correctly...
422 retval = kinetis_mdm_read_register(dap, MDM_REG_ID, &val);
423 if (retval != ERROR_OK) {
424 LOG_ERROR("MDM: failed to read ID register");
429 for (size_t i = 0; i < ARRAY_SIZE(kinetis_known_mdm_ids); i++) {
430 if (val == kinetis_known_mdm_ids[i]) {
437 LOG_WARNING("MDM: unknown ID %08" PRIX32, val);
440 * ... Read the MDM-AP status register until the Flash Ready bit sets...
442 retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
445 if (retval != ERROR_OK) {
446 LOG_ERROR("MDM: flash ready timeout");
451 * ... Read the System Security bit to determine if security is enabled.
452 * If System Security = 0, then proceed. If System Security = 1, then
453 * communication with the internals of the processor, including the
454 * flash, will not be possible without issuing a mass erase command or
455 * unsecuring the part through other means (backdoor key unlock)...
457 retval = kinetis_mdm_read_register(dap, MDM_REG_STAT, &val);
458 if (retval != ERROR_OK) {
459 LOG_ERROR("MDM: failed to read MDM_REG_STAT");
463 if (val & MDM_STAT_SYSSEC) {
464 jtag_poll_set_enabled(false);
466 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
467 LOG_WARNING("**** ****");
468 LOG_WARNING("**** Your Kinetis MCU is in secured state, which means that, ****");
469 LOG_WARNING("**** with exception for very basic communication, JTAG/SWD ****");
470 LOG_WARNING("**** interface will NOT work. In order to restore its ****");
471 LOG_WARNING("**** functionality please issue 'kinetis mdm mass_erase' ****");
472 LOG_WARNING("**** command, power cycle the MCU and restart OpenOCD. ****");
473 LOG_WARNING("**** ****");
474 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
476 LOG_INFO("MDM: Chip is unsecured. Continuing.");
477 jtag_poll_set_enabled(true);
480 dap_ap_select(dap, origninal_ap);
485 LOG_ERROR("MDM: Failed to check security status of the MCU. Cannot proceed further");
486 jtag_poll_set_enabled(false);
490 FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
492 struct kinetis_flash_bank *bank_info;
495 return ERROR_COMMAND_SYNTAX_ERROR;
497 LOG_INFO("add flash_bank kinetis %s", bank->name);
499 bank_info = malloc(sizeof(struct kinetis_flash_bank));
501 memset(bank_info, 0, sizeof(struct kinetis_flash_bank));
503 bank->driver_priv = bank_info;
508 /* Kinetis Program-LongWord Microcodes */
509 static const uint8_t kinetis_flash_write_code[] = {
511 * r0 - workarea buffer
512 * r1 - target address
522 /* for(register uint32_t i=0;i<wcount;i++){ */
523 0x04, 0x1C, /* mov r4, r0 */
524 0x00, 0x23, /* mov r3, #0 */
526 0x0E, 0x1A, /* sub r6, r1, r0 */
527 0xA6, 0x19, /* add r6, r4, r6 */
528 0x93, 0x42, /* cmp r3, r2 */
529 0x16, 0xD0, /* beq .L9 */
531 /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
532 0x0B, 0x4D, /* ldr r5, .L10 */
533 0x2F, 0x78, /* ldrb r7, [r5] */
534 0x7F, 0xB2, /* sxtb r7, r7 */
535 0x00, 0x2F, /* cmp r7, #0 */
536 0xFA, 0xDA, /* bge .L5 */
537 /* FTFx_FSTAT = FTFA_FSTAT_ACCERR_MASK|FTFA_FSTAT_FPVIOL_MASK|FTFA_FSTAT_RDCO */
538 0x70, 0x27, /* mov r7, #112 */
539 0x2F, 0x70, /* strb r7, [r5] */
540 /* FTFx_FCCOB3 = faddr; */
541 0x09, 0x4F, /* ldr r7, .L10+4 */
542 0x3E, 0x60, /* str r6, [r7] */
543 0x06, 0x27, /* mov r7, #6 */
544 /* FTFx_FCCOB0 = 0x06; */
545 0x08, 0x4E, /* ldr r6, .L10+8 */
546 0x37, 0x70, /* strb r7, [r6] */
547 /* FTFx_FCCOB7 = *pLW; */
548 0x80, 0xCC, /* ldmia r4!, {r7} */
549 0x08, 0x4E, /* ldr r6, .L10+12 */
550 0x37, 0x60, /* str r7, [r6] */
551 /* FTFx_FSTAT = FTFA_FSTAT_CCIF_MASK; */
552 0x80, 0x27, /* mov r7, #128 */
553 0x2F, 0x70, /* strb r7, [r5] */
555 /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
556 0x2E, 0x78, /* ldrb r6, [r5] */
557 0x77, 0xB2, /* sxtb r7, r6 */
558 0x00, 0x2F, /* cmp r7, #0 */
559 0xFB, 0xDA, /* bge .L4 */
560 0x01, 0x33, /* add r3, r3, #1 */
561 0xE4, 0xE7, /* b .L2 */
563 0x00, 0xBE, /* bkpt #0 */
565 0x00, 0x00, 0x02, 0x40, /* .word 1073872896 */
566 0x04, 0x00, 0x02, 0x40, /* .word 1073872900 */
567 0x07, 0x00, 0x02, 0x40, /* .word 1073872903 */
568 0x08, 0x00, 0x02, 0x40, /* .word 1073872904 */
571 /* Program LongWord Block Write */
572 static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer,
573 uint32_t offset, uint32_t wcount)
575 struct target *target = bank->target;
576 uint32_t buffer_size = 2048; /* Default minimum value */
577 struct working_area *write_algorithm;
578 struct working_area *source;
579 uint32_t address = bank->base + offset;
580 struct reg_param reg_params[3];
581 struct armv7m_algorithm armv7m_info;
582 int retval = ERROR_OK;
585 * r0 - workarea buffer
586 * r1 - target address
595 /* Increase buffer_size if needed */
596 if (buffer_size < (target->working_area_size/2))
597 buffer_size = (target->working_area_size/2);
599 LOG_INFO("Kinetis: FLASH Write ...");
601 /* check code alignment */
603 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
604 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
607 /* allocate working area with flash programming code */
608 if (target_alloc_working_area(target, sizeof(kinetis_flash_write_code),
609 &write_algorithm) != ERROR_OK) {
610 LOG_WARNING("no working area available, can't do block memory writes");
611 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
614 retval = target_write_buffer(target, write_algorithm->address,
615 sizeof(kinetis_flash_write_code), kinetis_flash_write_code);
616 if (retval != ERROR_OK)
620 while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
622 if (buffer_size <= 256) {
623 /* free working area, write algorithm already allocated */
624 target_free_working_area(target, write_algorithm);
626 LOG_WARNING("No large enough working area available, can't do block memory writes");
627 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
631 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
632 armv7m_info.core_mode = ARM_MODE_THREAD;
634 init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* *pLW (*buffer) */
635 init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* faddr */
636 init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* number of words to program */
638 /* write code buffer and use Flash programming code within kinetis */
639 /* Set breakpoint to 0 with time-out of 1000 ms */
641 uint32_t thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount;
643 retval = target_write_buffer(target, source->address, thisrun_count * 4, buffer);
644 if (retval != ERROR_OK)
647 buf_set_u32(reg_params[0].value, 0, 32, source->address);
648 buf_set_u32(reg_params[1].value, 0, 32, address);
649 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
651 retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
652 write_algorithm->address, 0, 100000, &armv7m_info);
653 if (retval != ERROR_OK) {
654 LOG_ERROR("Error executing kinetis Flash programming algorithm");
655 retval = ERROR_FLASH_OPERATION_FAILED;
659 buffer += thisrun_count * 4;
660 address += thisrun_count * 4;
661 wcount -= thisrun_count;
664 target_free_working_area(target, source);
665 target_free_working_area(target, write_algorithm);
667 destroy_reg_param(®_params[0]);
668 destroy_reg_param(®_params[1]);
669 destroy_reg_param(®_params[2]);
674 static int kinetis_protect(struct flash_bank *bank, int set, int first, int last)
676 LOG_WARNING("kinetis_protect not supported yet");
679 if (bank->target->state != TARGET_HALTED) {
680 LOG_ERROR("Target not halted");
681 return ERROR_TARGET_NOT_HALTED;
684 return ERROR_FLASH_BANK_INVALID;
687 static int kinetis_protect_check(struct flash_bank *bank)
689 struct kinetis_flash_bank *kinfo = bank->driver_priv;
691 if (bank->target->state != TARGET_HALTED) {
692 LOG_ERROR("Target not halted");
693 return ERROR_TARGET_NOT_HALTED;
696 if (kinfo->flash_class == FC_PFLASH) {
699 uint32_t fprot, psec;
702 /* read protection register */
703 result = target_read_memory(bank->target, FTFx_FPROT3, 1, 4, buffer);
705 if (result != ERROR_OK)
708 fprot = target_buffer_get_u32(bank->target, buffer);
711 * Every bit protects 1/32 of the full flash (not necessarily
712 * just this bank), but we enforce the bank ordinals for
713 * PFlash to start at zero.
715 b = kinfo->bank_ordinal * (bank->size / kinfo->protection_size);
716 for (psec = 0, i = 0; i < bank->num_sectors; i++) {
717 if ((fprot >> b) & 1)
718 bank->sectors[i].is_protected = 0;
720 bank->sectors[i].is_protected = 1;
722 psec += bank->sectors[i].size;
724 if (psec >= kinfo->protection_size) {
730 LOG_ERROR("Protection checks for FlexNVM not yet supported");
731 return ERROR_FLASH_BANK_INVALID;
737 static int kinetis_ftfx_command(struct flash_bank *bank, uint8_t fcmd, uint32_t faddr,
738 uint8_t fccob4, uint8_t fccob5, uint8_t fccob6, uint8_t fccob7,
739 uint8_t fccob8, uint8_t fccob9, uint8_t fccoba, uint8_t fccobb,
742 uint8_t command[12] = {faddr & 0xff, (faddr >> 8) & 0xff, (faddr >> 16) & 0xff, fcmd,
743 fccob7, fccob6, fccob5, fccob4,
744 fccobb, fccoba, fccob9, fccob8};
749 for (i = 0; i < 50; i++) {
751 target_read_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
753 if (result != ERROR_OK)
762 if (buffer != 0x80) {
763 /* reset error flags */
766 target_write_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
767 if (result != ERROR_OK)
771 result = target_write_memory(bank->target, FTFx_FCCOB3, 4, 3, command);
773 if (result != ERROR_OK)
778 result = target_write_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
779 if (result != ERROR_OK)
783 for (i = 0; i < 240; i++) { /* Need longtime for "Mass Erase" Command Nemui Changed */
785 target_read_memory(bank->target, FTFx_FSTAT, 1, 1, ftfx_fstat);
787 if (result != ERROR_OK)
790 if (*ftfx_fstat & 0x80)
794 if ((*ftfx_fstat & 0xf0) != 0x80) {
796 ("ftfx command failed FSTAT: %02X FCCOB: %02X%02X%02X%02X %02X%02X%02X%02X %02X%02X%02X%02X",
797 *ftfx_fstat, command[3], command[2], command[1], command[0],
798 command[7], command[6], command[5], command[4],
799 command[11], command[10], command[9], command[8]);
800 return ERROR_FLASH_OPERATION_FAILED;
806 COMMAND_HANDLER(kinetis_securing_test)
810 struct target *target = get_current_target(CMD_CTX);
811 struct flash_bank *bank = NULL;
813 result = get_flash_bank_by_addr(target, 0x00000000, true, &bank);
814 if (result != ERROR_OK)
817 assert(bank != NULL);
819 if (target->state != TARGET_HALTED) {
820 LOG_ERROR("Target not halted");
821 return ERROR_TARGET_NOT_HALTED;
824 return kinetis_ftfx_command(bank, FTFx_CMD_SECTERASE, bank->base + 0x00000400,
825 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
828 static int kinetis_erase(struct flash_bank *bank, int first, int last)
832 if (bank->target->state != TARGET_HALTED) {
833 LOG_ERROR("Target not halted");
834 return ERROR_TARGET_NOT_HALTED;
837 if ((first > bank->num_sectors) || (last > bank->num_sectors))
838 return ERROR_FLASH_OPERATION_FAILED;
841 * FIXME: TODO: use the 'Erase Flash Block' command if the
842 * requested erase is PFlash or NVM and encompasses the entire
843 * block. Should be quicker.
845 for (i = first; i <= last; i++) {
847 /* set command and sector address */
848 result = kinetis_ftfx_command(bank, FTFx_CMD_SECTERASE, bank->base + bank->sectors[i].offset,
849 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
851 if (result != ERROR_OK) {
852 LOG_WARNING("erase sector %d failed", i);
853 return ERROR_FLASH_OPERATION_FAILED;
856 bank->sectors[i].is_erased = 1;
861 ("flash configuration field erased, please reset the device");
867 static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer,
868 uint32_t offset, uint32_t count)
870 unsigned int i, result, fallback = 0;
873 struct kinetis_flash_bank *kinfo = bank->driver_priv;
874 uint8_t *new_buffer = NULL;
876 if (bank->target->state != TARGET_HALTED) {
877 LOG_ERROR("Target not halted");
878 return ERROR_TARGET_NOT_HALTED;
881 if (!(kinfo->flash_support & FS_PROGRAM_SECTOR)) {
882 /* fallback to longword write */
884 LOG_WARNING("This device supports Program Longword execution only.");
885 LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset);
887 } else if (kinfo->flash_class == FC_FLEX_NVM) {
890 LOG_DEBUG("flash write into FlexNVM @%08" PRIX32, offset);
892 /* make flex ram available */
893 result = kinetis_ftfx_command(bank, FTFx_CMD_SETFLEXRAM, 0x00ff0000, 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
895 if (result != ERROR_OK)
896 return ERROR_FLASH_OPERATION_FAILED;
898 /* check if ram ready */
899 result = target_read_memory(bank->target, FTFx_FCNFG, 1, 1, buf);
901 if (result != ERROR_OK)
904 if (!(buf[0] & (1 << 1))) {
905 /* fallback to longword write */
908 LOG_WARNING("ram not ready, fallback to slow longword write (FCNFG: %02X)", buf[0]);
911 LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset);
915 /* program section command */
918 * Kinetis uses different terms for the granularity of
919 * sector writes, e.g. "phrase" or "128 bits". We use
920 * the generic term "chunk". The largest possible
921 * Kinetis "chunk" is 16 bytes (128 bits).
923 unsigned prog_section_chunk_bytes = kinfo->sector_size >> 8;
924 unsigned prog_size_bytes = kinfo->max_flash_prog_size;
925 for (i = 0; i < count; i += prog_size_bytes) {
926 uint8_t residual_buffer[16];
928 uint32_t section_count = prog_size_bytes / prog_section_chunk_bytes;
929 uint32_t residual_wc = 0;
932 * Assume the word count covers an entire
935 wc = prog_size_bytes / 4;
938 * If bytes to be programmed are less than the
939 * full sector, then determine the number of
940 * full-words to program, and put together the
941 * residual buffer so that a full "section"
942 * may always be programmed.
944 if ((count - i) < prog_size_bytes) {
945 /* number of bytes to program beyond full section */
946 unsigned residual_bc = (count-i) % prog_section_chunk_bytes;
948 /* number of complete words to copy directly from buffer */
949 wc = (count - i) / 4;
951 /* number of total sections to write, including residual */
952 section_count = DIV_ROUND_UP((count-i), prog_section_chunk_bytes);
954 /* any residual bytes delivers a whole residual section */
955 residual_wc = (residual_bc ? prog_section_chunk_bytes : 0)/4;
957 /* clear residual buffer then populate residual bytes */
958 (void) memset(residual_buffer, 0xff, prog_section_chunk_bytes);
959 (void) memcpy(residual_buffer, &buffer[i+4*wc], residual_bc);
962 LOG_DEBUG("write section @ %08" PRIX32 " with length %" PRIu32 " bytes",
963 offset + i, (uint32_t)wc*4);
965 /* write data to flexram as whole-words */
966 result = target_write_memory(bank->target, FLEXRAM, 4, wc,
969 if (result != ERROR_OK) {
970 LOG_ERROR("target_write_memory failed");
974 /* write the residual words to the flexram */
976 result = target_write_memory(bank->target,
981 if (result != ERROR_OK) {
982 LOG_ERROR("target_write_memory failed");
987 /* execute section-write command */
988 result = kinetis_ftfx_command(bank, FTFx_CMD_SECTWRITE, bank->base + offset + i,
989 section_count>>8, section_count, 0, 0,
990 0, 0, 0, 0, &ftfx_fstat);
992 if (result != ERROR_OK)
993 return ERROR_FLASH_OPERATION_FAILED;
996 /* program longword command, not supported in "SF3" devices */
997 else if (kinfo->flash_support & FS_PROGRAM_LONGWORD) {
999 uint32_t old_count = count;
1000 count = (old_count | 3) + 1;
1001 new_buffer = malloc(count);
1002 if (new_buffer == NULL) {
1003 LOG_ERROR("odd number of bytes to write and no memory "
1004 "for padding buffer");
1007 LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " "
1008 "and padding with 0xff", old_count, count);
1009 memset(new_buffer, 0xff, count);
1010 buffer = memcpy(new_buffer, buffer, old_count);
1013 uint32_t words_remaining = count / 4;
1015 /* try using a block write */
1016 int retval = kinetis_write_block(bank, buffer, offset, words_remaining);
1018 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
1019 /* if block write failed (no sufficient working area),
1020 * we use normal (slow) single word accesses */
1021 LOG_WARNING("couldn't use block writes, falling back to single "
1024 for (i = 0; i < count; i += 4) {
1027 LOG_DEBUG("write longword @ %08" PRIX32, (uint32_t)(offset + i));
1029 uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff};
1030 memcpy(padding, buffer + i, MIN(4, count-i));
1032 result = kinetis_ftfx_command(bank, FTFx_CMD_LWORDPROG, bank->base + offset + i,
1033 padding[3], padding[2], padding[1], padding[0],
1034 0, 0, 0, 0, &ftfx_fstat);
1036 if (result != ERROR_OK)
1037 return ERROR_FLASH_OPERATION_FAILED;
1041 LOG_ERROR("Flash write strategy not implemented");
1042 return ERROR_FLASH_OPERATION_FAILED;
1048 static int kinetis_read_part_info(struct flash_bank *bank)
1051 uint32_t offset = 0;
1052 uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg2_pflsh;
1053 uint32_t nvm_size = 0, pf_size = 0, ee_size = 0;
1054 unsigned num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0, first_nvm_bank = 0,
1055 reassign = 0, pflash_sector_size_bytes = 0, nvm_sector_size_bytes = 0;
1056 struct target *target = bank->target;
1057 struct kinetis_flash_bank *kinfo = bank->driver_priv;
1059 result = target_read_u32(target, SIM_SDID, &kinfo->sim_sdid);
1060 if (result != ERROR_OK)
1063 if ((kinfo->sim_sdid & (~KINETIS_SDID_K_SERIES_MASK)) == 0) {
1064 /* older K-series MCU */
1065 uint32_t mcu_type = kinfo->sim_sdid & KINETIS_K_SDID_TYPE_MASK;
1068 case KINETIS_K_SDID_K10_M50:
1069 case KINETIS_K_SDID_K20_M50:
1071 pflash_sector_size_bytes = 1<<10;
1072 nvm_sector_size_bytes = 1<<10;
1074 kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
1075 kinfo->max_flash_prog_size = 1<<10;
1077 case KINETIS_K_SDID_K10_M72:
1078 case KINETIS_K_SDID_K20_M72:
1079 case KINETIS_K_SDID_K30_M72:
1080 case KINETIS_K_SDID_K30_M100:
1081 case KINETIS_K_SDID_K40_M72:
1082 case KINETIS_K_SDID_K40_M100:
1083 case KINETIS_K_SDID_K50_M72:
1084 /* 2kB sectors, 1kB FlexNVM sectors */
1085 pflash_sector_size_bytes = 2<<10;
1086 nvm_sector_size_bytes = 1<<10;
1088 kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
1089 kinfo->max_flash_prog_size = 1<<10;
1091 case KINETIS_K_SDID_K10_M100:
1092 case KINETIS_K_SDID_K20_M100:
1093 case KINETIS_K_SDID_K11:
1094 case KINETIS_K_SDID_K12:
1095 case KINETIS_K_SDID_K21_M50:
1096 case KINETIS_K_SDID_K22_M50:
1097 case KINETIS_K_SDID_K51_M72:
1098 case KINETIS_K_SDID_K53:
1099 case KINETIS_K_SDID_K60_M100:
1101 pflash_sector_size_bytes = 2<<10;
1102 nvm_sector_size_bytes = 2<<10;
1104 kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
1105 kinfo->max_flash_prog_size = 2<<10;
1107 case KINETIS_K_SDID_K10_M120:
1108 case KINETIS_K_SDID_K20_M120:
1109 case KINETIS_K_SDID_K21_M120:
1110 case KINETIS_K_SDID_K22_M120:
1111 case KINETIS_K_SDID_K60_M150:
1112 case KINETIS_K_SDID_K70_M150:
1114 pflash_sector_size_bytes = 4<<10;
1115 nvm_sector_size_bytes = 4<<10;
1117 kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1118 kinfo->max_flash_prog_size = 4<<10;
1121 LOG_ERROR("Unsupported K-family FAMID");
1122 return ERROR_FLASH_OPER_UNSUPPORTED;
1125 /* Newer K-series or KL series MCU */
1126 switch (kinfo->sim_sdid & KINETIS_SDID_SERIESID_MASK) {
1127 case KINETIS_SDID_SERIESID_K:
1128 switch (kinfo->sim_sdid & (KINETIS_SDID_FAMILYID_MASK | KINETIS_SDID_SUBFAMID_MASK)) {
1129 case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX2: {
1130 /* MK24FN1M reports as K22, this should detect it (according to errata note 1N83J) */
1132 result = target_read_u32(target, SIM_SOPT1, &sopt1);
1133 if (result != ERROR_OK)
1136 if (((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K24FN1M) &&
1137 ((sopt1 & KINETIS_SOPT1_RAMSIZE_MASK) == KINETIS_SOPT1_RAMSIZE_K24FN1M)) {
1139 pflash_sector_size_bytes = 4<<10;
1141 kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1142 kinfo->max_flash_prog_size = 1<<10;
1144 /* K22 with new-style SDID? */
1149 case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX4:
1151 pflash_sector_size_bytes = 4<<10;
1153 kinfo->flash_support = FS_PROGRAM_LONGWORD;
1154 kinfo->max_flash_prog_size = 1<<10;
1160 case KINETIS_SDID_SERIESID_KL:
1162 pflash_sector_size_bytes = 1<<10;
1163 nvm_sector_size_bytes = 1<<10;
1165 kinfo->flash_support = FS_PROGRAM_LONGWORD;
1166 kinfo->max_flash_prog_size = 1<<10;
1173 if (pflash_sector_size_bytes == 0) {
1174 LOG_ERROR("MCU is unsupported");
1175 return ERROR_FLASH_OPER_UNSUPPORTED;
1178 result = target_read_u32(target, SIM_FCFG1, &kinfo->sim_fcfg1);
1179 if (result != ERROR_OK)
1182 result = target_read_u32(target, SIM_FCFG2, &kinfo->sim_fcfg2);
1183 if (result != ERROR_OK)
1185 fcfg2_pflsh = (kinfo->sim_fcfg2 >> 23) & 0x01;
1187 LOG_DEBUG("SDID: 0x%08" PRIX32 " FCFG1: 0x%08" PRIX32 " FCFG2: 0x%08" PRIX32, kinfo->sim_sdid,
1188 kinfo->sim_fcfg1, kinfo->sim_fcfg2);
1190 fcfg1_nvmsize = (uint8_t)((kinfo->sim_fcfg1 >> 28) & 0x0f);
1191 fcfg1_pfsize = (uint8_t)((kinfo->sim_fcfg1 >> 24) & 0x0f);
1192 fcfg1_eesize = (uint8_t)((kinfo->sim_fcfg1 >> 16) & 0x0f);
1194 /* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */
1196 switch (fcfg1_nvmsize) {
1201 nvm_size = 1 << (14 + (fcfg1_nvmsize >> 1));
1204 if (pflash_sector_size_bytes >= 4<<10)
1215 switch (fcfg1_eesize) {
1226 ee_size = (16 << (10 - fcfg1_eesize));
1234 switch (fcfg1_pfsize) {
1241 pf_size = 1 << (14 + (fcfg1_pfsize >> 1));
1244 if (pflash_sector_size_bytes >= 4<<10)
1246 else if (fcfg2_pflsh)
1256 LOG_DEBUG("FlexNVM: %" PRIu32 " PFlash: %" PRIu32 " FlexRAM: %" PRIu32 " PFLSH: %d",
1257 nvm_size, pf_size, ee_size, fcfg2_pflsh);
1259 num_pflash_blocks = num_blocks / (2 - fcfg2_pflsh);
1260 first_nvm_bank = num_pflash_blocks;
1261 num_nvm_blocks = num_blocks - num_pflash_blocks;
1263 LOG_DEBUG("%d blocks total: %d PFlash, %d FlexNVM",
1264 num_blocks, num_pflash_blocks, num_nvm_blocks);
1267 * If the flash class is already assigned, verify the
1270 if (kinfo->flash_class != FC_AUTO) {
1271 if (kinfo->bank_ordinal != (unsigned) bank->bank_number) {
1272 LOG_WARNING("Flash ordinal/bank number mismatch");
1275 switch (kinfo->flash_class) {
1277 if (kinfo->bank_ordinal >= first_nvm_bank) {
1278 LOG_WARNING("Class mismatch, bank %d is not PFlash", bank->bank_number);
1280 } else if (bank->size != (pf_size / num_pflash_blocks)) {
1281 LOG_WARNING("PFlash size mismatch");
1283 } else if (bank->base !=
1284 (0x00000000 + bank->size * kinfo->bank_ordinal)) {
1285 LOG_WARNING("PFlash address range mismatch");
1287 } else if (kinfo->sector_size != pflash_sector_size_bytes) {
1288 LOG_WARNING("PFlash sector size mismatch");
1291 LOG_DEBUG("PFlash bank %d already configured okay",
1292 kinfo->bank_ordinal);
1296 if ((kinfo->bank_ordinal >= num_blocks) ||
1297 (kinfo->bank_ordinal < first_nvm_bank)) {
1298 LOG_WARNING("Class mismatch, bank %d is not FlexNVM", bank->bank_number);
1300 } else if (bank->size != (nvm_size / num_nvm_blocks)) {
1301 LOG_WARNING("FlexNVM size mismatch");
1303 } else if (bank->base !=
1304 (0x10000000 + bank->size * kinfo->bank_ordinal)) {
1305 LOG_WARNING("FlexNVM address range mismatch");
1307 } else if (kinfo->sector_size != nvm_sector_size_bytes) {
1308 LOG_WARNING("FlexNVM sector size mismatch");
1311 LOG_DEBUG("FlexNVM bank %d already configured okay",
1312 kinfo->bank_ordinal);
1316 if (kinfo->bank_ordinal != num_blocks) {
1317 LOG_WARNING("Class mismatch, bank %d is not FlexRAM", bank->bank_number);
1319 } else if (bank->size != ee_size) {
1320 LOG_WARNING("FlexRAM size mismatch");
1322 } else if (bank->base != FLEXRAM) {
1323 LOG_WARNING("FlexRAM address mismatch");
1325 } else if (kinfo->sector_size != nvm_sector_size_bytes) {
1326 LOG_WARNING("FlexRAM sector size mismatch");
1329 LOG_DEBUG("FlexRAM bank %d already configured okay", kinfo->bank_ordinal);
1334 LOG_WARNING("Unknown or inconsistent flash class");
1340 LOG_INFO("Probing flash info for bank %d", bank->bank_number);
1347 if ((unsigned)bank->bank_number < num_pflash_blocks) {
1348 /* pflash, banks start at address zero */
1349 kinfo->flash_class = FC_PFLASH;
1350 bank->size = (pf_size / num_pflash_blocks);
1351 bank->base = 0x00000000 + bank->size * bank->bank_number;
1352 kinfo->sector_size = pflash_sector_size_bytes;
1353 kinfo->protection_size = pf_size / 32;
1354 } else if ((unsigned)bank->bank_number < num_blocks) {
1355 /* nvm, banks start at address 0x10000000 */
1356 kinfo->flash_class = FC_FLEX_NVM;
1357 bank->size = (nvm_size / num_nvm_blocks);
1358 bank->base = 0x10000000 + bank->size * (bank->bank_number - first_nvm_bank);
1359 kinfo->sector_size = nvm_sector_size_bytes;
1360 kinfo->protection_size = 0; /* FIXME: TODO: depends on DEPART bits, chip */
1361 } else if ((unsigned)bank->bank_number == num_blocks) {
1362 LOG_ERROR("FlexRAM support not yet implemented");
1363 return ERROR_FLASH_OPER_UNSUPPORTED;
1365 LOG_ERROR("Cannot determine parameters for bank %d, only %d banks on device",
1366 bank->bank_number, num_blocks);
1367 return ERROR_FLASH_BANK_INVALID;
1370 if (bank->sectors) {
1371 free(bank->sectors);
1372 bank->sectors = NULL;
1375 bank->num_sectors = bank->size / kinfo->sector_size;
1376 assert(bank->num_sectors > 0);
1377 bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
1379 for (i = 0; i < bank->num_sectors; i++) {
1380 bank->sectors[i].offset = offset;
1381 bank->sectors[i].size = kinfo->sector_size;
1382 offset += kinfo->sector_size;
1383 bank->sectors[i].is_erased = -1;
1384 bank->sectors[i].is_protected = 1;
1390 static int kinetis_probe(struct flash_bank *bank)
1392 if (bank->target->state != TARGET_HALTED) {
1393 LOG_WARNING("Cannot communicate... target not halted.");
1394 return ERROR_TARGET_NOT_HALTED;
1397 return kinetis_read_part_info(bank);
1400 static int kinetis_auto_probe(struct flash_bank *bank)
1402 struct kinetis_flash_bank *kinfo = bank->driver_priv;
1404 if (kinfo->sim_sdid)
1407 return kinetis_probe(bank);
1410 static int kinetis_info(struct flash_bank *bank, char *buf, int buf_size)
1412 const char *bank_class_names[] = {
1413 "(ANY)", "PFlash", "FlexNVM", "FlexRAM"
1416 struct kinetis_flash_bank *kinfo = bank->driver_priv;
1418 (void) snprintf(buf, buf_size,
1419 "%s driver for %s flash bank %s at 0x%8.8" PRIx32 "",
1420 bank->driver->name, bank_class_names[kinfo->flash_class],
1421 bank->name, bank->base);
1426 static int kinetis_blank_check(struct flash_bank *bank)
1428 struct kinetis_flash_bank *kinfo = bank->driver_priv;
1430 if (bank->target->state != TARGET_HALTED) {
1431 LOG_ERROR("Target not halted");
1432 return ERROR_TARGET_NOT_HALTED;
1435 if (kinfo->flash_class == FC_PFLASH) {
1439 /* check if whole bank is blank */
1440 result = kinetis_ftfx_command(bank, FTFx_CMD_BLOCKSTAT, bank->base, 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
1442 if (result != ERROR_OK)
1445 if (ftfx_fstat & 0x01) {
1446 /* the whole bank is not erased, check sector-by-sector */
1448 for (i = 0; i < bank->num_sectors; i++) {
1450 result = kinetis_ftfx_command(bank, FTFx_CMD_SECTSTAT, bank->base + bank->sectors[i].offset,
1451 1, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
1453 if (result == ERROR_OK) {
1454 bank->sectors[i].is_erased = !(ftfx_fstat & 0x01);
1456 LOG_DEBUG("Ignoring errored PFlash sector blank-check");
1457 bank->sectors[i].is_erased = -1;
1461 /* the whole bank is erased, update all sectors */
1463 for (i = 0; i < bank->num_sectors; i++)
1464 bank->sectors[i].is_erased = 1;
1467 LOG_WARNING("kinetis_blank_check not supported yet for FlexNVM");
1468 return ERROR_FLASH_OPERATION_FAILED;
1474 static const struct command_registration kinetis_securtiy_command_handlers[] = {
1476 .name = "check_security",
1477 .mode = COMMAND_EXEC,
1480 .handler = kinetis_check_flash_security_status,
1483 .name = "mass_erase",
1484 .mode = COMMAND_EXEC,
1487 .handler = kinetis_mdm_mass_erase,
1490 .name = "test_securing",
1491 .mode = COMMAND_EXEC,
1494 .handler = kinetis_securing_test,
1496 COMMAND_REGISTRATION_DONE
1499 static const struct command_registration kinetis_exec_command_handlers[] = {
1502 .mode = COMMAND_ANY,
1505 .chain = kinetis_securtiy_command_handlers,
1507 COMMAND_REGISTRATION_DONE
1510 static const struct command_registration kinetis_command_handler[] = {
1513 .mode = COMMAND_ANY,
1514 .help = "kinetis NAND flash controller commands",
1516 .chain = kinetis_exec_command_handlers,
1518 COMMAND_REGISTRATION_DONE
1523 struct flash_driver kinetis_flash = {
1525 .commands = kinetis_command_handler,
1526 .flash_bank_command = kinetis_flash_bank_command,
1527 .erase = kinetis_erase,
1528 .protect = kinetis_protect,
1529 .write = kinetis_write,
1530 .read = default_flash_read,
1531 .probe = kinetis_probe,
1532 .auto_probe = kinetis_auto_probe,
1533 .erase_check = kinetis_blank_check,
1534 .protect_check = kinetis_protect_check,
1535 .info = kinetis_info,