1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * Copyright (C) 2011 by Erik Botö
9 * erik.boto@pelagicore.com
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
23 ***************************************************************************/
30 #include <helper/binarybuffer.h>
31 #include <target/algorithm.h>
32 #include <target/armv7m.h>
34 /* em357 register locations */
36 #define EM357_FLASH_ACR 0x40008000
37 #define EM357_FLASH_KEYR 0x40008004
38 #define EM357_FLASH_OPTKEYR 0x40008008
39 #define EM357_FLASH_SR 0x4000800C
40 #define EM357_FLASH_CR 0x40008010
41 #define EM357_FLASH_AR 0x40008014
42 #define EM357_FLASH_OBR 0x4000801C
43 #define EM357_FLASH_WRPR 0x40008020
45 #define EM357_FPEC_CLK 0x4000402c
46 /* option byte location */
48 #define EM357_OB_RDP 0x08040800
49 #define EM357_OB_WRP0 0x08040808
50 #define EM357_OB_WRP1 0x0804080A
51 #define EM357_OB_WRP2 0x0804080C
53 /* FLASH_CR register bits */
55 #define FLASH_PG (1 << 0)
56 #define FLASH_PER (1 << 1)
57 #define FLASH_MER (1 << 2)
58 #define FLASH_OPTPG (1 << 4)
59 #define FLASH_OPTER (1 << 5)
60 #define FLASH_STRT (1 << 6)
61 #define FLASH_LOCK (1 << 7)
62 #define FLASH_OPTWRE (1 << 9)
64 /* FLASH_SR register bits */
66 #define FLASH_BSY (1 << 0)
67 #define FLASH_PGERR (1 << 2)
68 #define FLASH_WRPRTERR (1 << 4)
69 #define FLASH_EOP (1 << 5)
71 /* EM357_FLASH_OBR bit definitions (reading) */
76 /* register unlock keys */
78 #define KEY1 0x45670123
79 #define KEY2 0xCDEF89AB
81 struct em357_options {
83 uint16_t user_options;
84 uint16_t protection[3];
87 struct em357_flash_bank {
88 struct em357_options option_bytes;
93 static int em357_mass_erase(struct flash_bank *bank);
95 /* flash bank em357 <base> <size> 0 0 <target#>
97 FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command)
99 struct em357_flash_bank *em357_info;
102 return ERROR_COMMAND_SYNTAX_ERROR;
104 em357_info = malloc(sizeof(struct em357_flash_bank));
105 bank->driver_priv = em357_info;
107 em357_info->probed = false;
112 static inline int em357_get_flash_status(struct flash_bank *bank, uint32_t *status)
114 struct target *target = bank->target;
115 return target_read_u32(target, EM357_FLASH_SR, status);
118 static int em357_wait_status_busy(struct flash_bank *bank, int timeout)
120 struct target *target = bank->target;
122 int retval = ERROR_OK;
124 /* wait for busy to clear */
126 retval = em357_get_flash_status(bank, &status);
127 if (retval != ERROR_OK)
129 LOG_DEBUG("status: 0x%" PRIx32 "", status);
130 if ((status & FLASH_BSY) == 0)
132 if (timeout-- <= 0) {
133 LOG_ERROR("timed out waiting for flash");
139 if (status & FLASH_WRPRTERR) {
140 LOG_ERROR("em357 device protected");
144 if (status & FLASH_PGERR) {
145 LOG_ERROR("em357 device programming failed");
149 /* Clear but report errors */
150 if (status & (FLASH_WRPRTERR | FLASH_PGERR)) {
151 /* If this operation fails, we ignore it and report the original
154 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR);
159 static int em357_read_options(struct flash_bank *bank)
162 struct em357_flash_bank *em357_info = NULL;
163 struct target *target = bank->target;
165 em357_info = bank->driver_priv;
167 /* read current option bytes */
168 int retval = target_read_u32(target, EM357_FLASH_OBR, &optiondata);
169 if (retval != ERROR_OK)
172 em357_info->option_bytes.user_options = (uint16_t)0xFFFC | ((optiondata >> 2) & 0x03);
173 em357_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
175 if (optiondata & (1 << OPT_READOUT))
176 LOG_INFO("Device Security Bit Set");
178 /* each bit refers to a 4bank protection */
179 retval = target_read_u32(target, EM357_FLASH_WRPR, &optiondata);
180 if (retval != ERROR_OK)
183 em357_info->option_bytes.protection[0] = (uint16_t)optiondata;
184 em357_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
185 em357_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
190 static int em357_erase_options(struct flash_bank *bank)
192 struct em357_flash_bank *em357_info = NULL;
193 struct target *target = bank->target;
195 em357_info = bank->driver_priv;
197 /* read current options */
198 em357_read_options(bank);
200 /* unlock flash registers */
201 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
202 if (retval != ERROR_OK)
205 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
206 if (retval != ERROR_OK)
209 /* unlock option flash registers */
210 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
211 if (retval != ERROR_OK)
213 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
214 if (retval != ERROR_OK)
217 /* erase option bytes */
218 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
219 if (retval != ERROR_OK)
221 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
222 if (retval != ERROR_OK)
225 retval = em357_wait_status_busy(bank, 10);
226 if (retval != ERROR_OK)
229 /* clear readout protection and complementary option bytes
230 * this will also force a device unlock if set */
231 em357_info->option_bytes.RDP = 0x5AA5;
236 static int em357_write_options(struct flash_bank *bank)
238 struct em357_flash_bank *em357_info = NULL;
239 struct target *target = bank->target;
241 em357_info = bank->driver_priv;
243 /* unlock flash registers */
244 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
245 if (retval != ERROR_OK)
247 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
248 if (retval != ERROR_OK)
251 /* unlock option flash registers */
252 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
253 if (retval != ERROR_OK)
255 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
256 if (retval != ERROR_OK)
259 /* program option bytes */
260 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
261 if (retval != ERROR_OK)
264 retval = em357_wait_status_busy(bank, 10);
265 if (retval != ERROR_OK)
268 /* write protection byte 1 */
269 retval = target_write_u16(target, EM357_OB_WRP0, em357_info->option_bytes.protection[0]);
270 if (retval != ERROR_OK)
273 retval = em357_wait_status_busy(bank, 10);
274 if (retval != ERROR_OK)
277 /* write protection byte 2 */
278 retval = target_write_u16(target, EM357_OB_WRP1, em357_info->option_bytes.protection[1]);
279 if (retval != ERROR_OK)
282 retval = em357_wait_status_busy(bank, 10);
283 if (retval != ERROR_OK)
286 /* write protection byte 3 */
287 retval = target_write_u16(target, EM357_OB_WRP2, em357_info->option_bytes.protection[2]);
288 if (retval != ERROR_OK)
291 retval = em357_wait_status_busy(bank, 10);
292 if (retval != ERROR_OK)
295 /* write readout protection bit */
296 retval = target_write_u16(target, EM357_OB_RDP, em357_info->option_bytes.RDP);
297 if (retval != ERROR_OK)
300 retval = em357_wait_status_busy(bank, 10);
301 if (retval != ERROR_OK)
304 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
305 if (retval != ERROR_OK)
311 static int em357_protect_check(struct flash_bank *bank)
313 struct target *target = bank->target;
314 struct em357_flash_bank *em357_info = bank->driver_priv;
321 if (target->state != TARGET_HALTED) {
322 LOG_ERROR("Target not halted");
323 return ERROR_TARGET_NOT_HALTED;
326 /* each bit refers to a 4bank protection (bit 0-23) */
327 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
328 if (retval != ERROR_OK)
331 /* each protection bit is for 4 * 2K pages */
332 num_bits = (bank->num_sectors / em357_info->ppage_size);
334 for (i = 0; i < num_bits; i++) {
336 if (protection & (1 << i))
339 for (s = 0; s < em357_info->ppage_size; s++)
340 bank->sectors[(i * em357_info->ppage_size) + s].is_protected = set;
346 static int em357_erase(struct flash_bank *bank, unsigned int first,
349 struct target *target = bank->target;
351 if (bank->target->state != TARGET_HALTED) {
352 LOG_ERROR("Target not halted");
353 return ERROR_TARGET_NOT_HALTED;
356 if ((first == 0) && (last == (bank->num_sectors - 1)))
357 return em357_mass_erase(bank);
359 /* Enable FPEC clock */
360 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
362 /* unlock flash registers */
363 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
364 if (retval != ERROR_OK)
366 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
367 if (retval != ERROR_OK)
370 for (unsigned int i = first; i <= last; i++) {
371 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER);
372 if (retval != ERROR_OK)
374 retval = target_write_u32(target, EM357_FLASH_AR,
375 bank->base + bank->sectors[i].offset);
376 if (retval != ERROR_OK)
378 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER | FLASH_STRT);
379 if (retval != ERROR_OK)
382 retval = em357_wait_status_busy(bank, 100);
383 if (retval != ERROR_OK)
386 bank->sectors[i].is_erased = 1;
389 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
390 if (retval != ERROR_OK)
396 static int em357_protect(struct flash_bank *bank, int set, unsigned int first,
399 struct em357_flash_bank *em357_info = NULL;
400 struct target *target = bank->target;
401 uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
406 em357_info = bank->driver_priv;
408 if (target->state != TARGET_HALTED) {
409 LOG_ERROR("Target not halted");
410 return ERROR_TARGET_NOT_HALTED;
413 if ((first % em357_info->ppage_size) != 0) {
414 LOG_WARNING("aligned start protect sector to a %d sector boundary",
415 em357_info->ppage_size);
416 first = first - (first % em357_info->ppage_size);
418 if (((last + 1) % em357_info->ppage_size) != 0) {
419 LOG_WARNING("aligned end protect sector to a %d sector boundary",
420 em357_info->ppage_size);
422 last = last - (last % em357_info->ppage_size);
426 /* each bit refers to a 4bank protection */
427 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
428 if (retval != ERROR_OK)
431 prot_reg[0] = (uint16_t)protection;
432 prot_reg[1] = (uint16_t)(protection >> 8);
433 prot_reg[2] = (uint16_t)(protection >> 16);
435 for (unsigned int i = first; i <= last; i++) {
436 reg = (i / em357_info->ppage_size) / 8;
437 bit = (i / em357_info->ppage_size) - (reg * 8);
439 LOG_WARNING("reg, bit: %d, %d", reg, bit);
441 prot_reg[reg] &= ~(1 << bit);
443 prot_reg[reg] |= (1 << bit);
446 status = em357_erase_options(bank);
447 if (retval != ERROR_OK)
450 em357_info->option_bytes.protection[0] = prot_reg[0];
451 em357_info->option_bytes.protection[1] = prot_reg[1];
452 em357_info->option_bytes.protection[2] = prot_reg[2];
454 return em357_write_options(bank);
457 static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer,
458 uint32_t offset, uint32_t count)
460 struct target *target = bank->target;
461 uint32_t buffer_size = 16384;
462 struct working_area *write_algorithm;
463 struct working_area *source;
464 uint32_t address = bank->base + offset;
465 struct reg_param reg_params[4];
466 struct armv7m_algorithm armv7m_info;
467 int retval = ERROR_OK;
469 /* see contrib/loaders/flash/stm32x.s for src, the same is used here except for
470 * a modified *_FLASH_BASE */
472 static const uint8_t em357_flash_write_code[] = {
473 /* #define EM357_FLASH_CR_OFFSET 0x10
474 * #define EM357_FLASH_SR_OFFSET 0x0C
476 0x08, 0x4c, /* ldr r4, EM357_FLASH_BASE */
477 0x1c, 0x44, /* add r4, r3 */
478 /* write_half_word: */
479 0x01, 0x23, /* movs r3, #0x01 */
480 0x23, 0x61, /* str r3, [r4,
481 *#EM357_FLASH_CR_OFFSET] */
482 0x30, 0xf8, 0x02, 0x3b, /* ldrh r3, [r0], #0x02 */
483 0x21, 0xf8, 0x02, 0x3b, /* strh r3, [r1], #0x02 */
485 0xe3, 0x68, /* ldr r3, [r4,
486 *#EM357_FLASH_SR_OFFSET] */
487 0x13, 0xf0, 0x01, 0x0f, /* tst r3, #0x01 */
488 0xfb, 0xd0, /* beq busy */
489 0x13, 0xf0, 0x14, 0x0f, /* tst r3, #0x14 */
490 0x01, 0xd1, /* bne exit */
491 0x01, 0x3a, /* subs r2, r2, #0x01 */
492 0xf0, 0xd1, /* bne write_half_word */
494 0x00, 0xbe, /* bkpt #0x00 */
495 0x00, 0x80, 0x00, 0x40, /* EM357_FLASH_BASE: .word 0x40008000 */
498 /* flash write code */
499 if (target_alloc_working_area(target, sizeof(em357_flash_write_code),
500 &write_algorithm) != ERROR_OK) {
501 LOG_WARNING("no working area available, can't do block memory writes");
502 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
505 retval = target_write_buffer(target, write_algorithm->address,
506 sizeof(em357_flash_write_code), em357_flash_write_code);
507 if (retval != ERROR_OK)
511 while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
513 if (buffer_size <= 256) {
514 /* we already allocated the writing code, but failed to get a
515 * buffer, free the algorithm */
516 target_free_working_area(target, write_algorithm);
519 "no large enough working area available, can't do block memory writes");
520 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
524 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
525 armv7m_info.core_mode = ARM_MODE_THREAD;
527 init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
528 init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
529 init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
530 init_reg_param(®_params[3], "r3", 32, PARAM_IN_OUT);
533 uint32_t thisrun_count = (count > (buffer_size / 2)) ?
534 (buffer_size / 2) : count;
536 retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer);
537 if (retval != ERROR_OK)
540 buf_set_u32(reg_params[0].value, 0, 32, source->address);
541 buf_set_u32(reg_params[1].value, 0, 32, address);
542 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
543 buf_set_u32(reg_params[3].value, 0, 32, 0);
545 retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
546 write_algorithm->address, 0, 10000, &armv7m_info);
547 if (retval != ERROR_OK) {
548 LOG_ERROR("error executing em357 flash write algorithm");
552 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_PGERR) {
553 LOG_ERROR("flash memory not erased before writing");
554 /* Clear but report errors */
555 target_write_u32(target, EM357_FLASH_SR, FLASH_PGERR);
560 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_WRPRTERR) {
561 LOG_ERROR("flash memory write protected");
562 /* Clear but report errors */
563 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR);
568 buffer += thisrun_count * 2;
569 address += thisrun_count * 2;
570 count -= thisrun_count;
573 target_free_working_area(target, source);
574 target_free_working_area(target, write_algorithm);
576 destroy_reg_param(®_params[0]);
577 destroy_reg_param(®_params[1]);
578 destroy_reg_param(®_params[2]);
579 destroy_reg_param(®_params[3]);
584 static int em357_write(struct flash_bank *bank, const uint8_t *buffer,
585 uint32_t offset, uint32_t count)
587 struct target *target = bank->target;
588 uint32_t words_remaining = (count / 2);
589 uint32_t bytes_remaining = (count & 0x00000001);
590 uint32_t address = bank->base + offset;
591 uint32_t bytes_written = 0;
594 if (bank->target->state != TARGET_HALTED) {
595 LOG_ERROR("Target not halted");
596 return ERROR_TARGET_NOT_HALTED;
600 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
601 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
604 /* unlock flash registers */
605 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
606 if (retval != ERROR_OK)
608 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
609 if (retval != ERROR_OK)
612 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
614 /* multiple half words (2-byte) to be programmed? */
615 if (words_remaining > 0) {
616 /* try using a block write */
617 retval = em357_write_block(bank, buffer, offset, words_remaining);
618 if (retval != ERROR_OK) {
619 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
620 /* if block write failed (no sufficient working area),
621 * we use normal (slow) single dword accesses */
623 "couldn't use block writes, falling back to single memory accesses");
626 buffer += words_remaining * 2;
627 address += words_remaining * 2;
632 if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
635 while (words_remaining > 0) {
637 memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
639 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
640 if (retval != ERROR_OK)
642 retval = target_write_u16(target, address, value);
643 if (retval != ERROR_OK)
646 retval = em357_wait_status_busy(bank, 5);
647 if (retval != ERROR_OK)
655 if (bytes_remaining) {
656 uint16_t value = 0xffff;
657 memcpy(&value, buffer + bytes_written, bytes_remaining);
659 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
660 if (retval != ERROR_OK)
662 retval = target_write_u16(target, address, value);
663 if (retval != ERROR_OK)
666 retval = em357_wait_status_busy(bank, 5);
667 if (retval != ERROR_OK)
671 return target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
674 static int em357_probe(struct flash_bank *bank)
676 struct target *target = bank->target;
677 struct em357_flash_bank *em357_info = bank->driver_priv;
681 uint32_t base_address = 0x08000000;
683 em357_info->probed = false;
685 switch (bank->size) {
687 /* 64k -- 64 1k pages */
692 /* 128k -- 128 1k pages */
697 /* 192k -- 96 2k pages */
702 /* 256k -- 128 2k pages */
707 /* 512k -- 256 2k pages */
712 LOG_WARNING("No size specified for em357 flash driver, assuming 192k!");
718 /* Enable FPEC CLK */
719 int retval = target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
720 if (retval != ERROR_OK)
723 em357_info->ppage_size = 4;
725 LOG_INFO("flash size = %dkbytes", num_pages*page_size/1024);
729 bank->base = base_address;
730 bank->size = (num_pages * page_size);
731 bank->num_sectors = num_pages;
732 bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
734 for (i = 0; i < num_pages; i++) {
735 bank->sectors[i].offset = i * page_size;
736 bank->sectors[i].size = page_size;
737 bank->sectors[i].is_erased = -1;
738 bank->sectors[i].is_protected = 1;
741 em357_info->probed = true;
746 static int em357_auto_probe(struct flash_bank *bank)
748 struct em357_flash_bank *em357_info = bank->driver_priv;
749 if (em357_info->probed)
751 return em357_probe(bank);
754 COMMAND_HANDLER(em357_handle_lock_command)
756 struct target *target = NULL;
757 struct em357_flash_bank *em357_info = NULL;
760 return ERROR_COMMAND_SYNTAX_ERROR;
762 struct flash_bank *bank;
763 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
764 if (retval != ERROR_OK)
767 em357_info = bank->driver_priv;
769 target = bank->target;
771 if (target->state != TARGET_HALTED) {
772 LOG_ERROR("Target not halted");
773 return ERROR_TARGET_NOT_HALTED;
776 if (em357_erase_options(bank) != ERROR_OK) {
777 command_print(CMD, "em357 failed to erase options");
781 /* set readout protection */
782 em357_info->option_bytes.RDP = 0;
784 if (em357_write_options(bank) != ERROR_OK) {
785 command_print(CMD, "em357 failed to lock device");
789 command_print(CMD, "em357 locked");
794 COMMAND_HANDLER(em357_handle_unlock_command)
796 struct target *target = NULL;
799 return ERROR_COMMAND_SYNTAX_ERROR;
801 struct flash_bank *bank;
802 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
803 if (retval != ERROR_OK)
806 target = bank->target;
808 if (target->state != TARGET_HALTED) {
809 LOG_ERROR("Target not halted");
810 return ERROR_TARGET_NOT_HALTED;
813 if (em357_erase_options(bank) != ERROR_OK) {
814 command_print(CMD, "em357 failed to unlock device");
818 if (em357_write_options(bank) != ERROR_OK) {
819 command_print(CMD, "em357 failed to lock device");
823 command_print(CMD, "em357 unlocked.\n"
824 "INFO: a reset or power cycle is required "
825 "for the new settings to take effect.");
830 static int em357_mass_erase(struct flash_bank *bank)
832 struct target *target = bank->target;
834 if (target->state != TARGET_HALTED) {
835 LOG_ERROR("Target not halted");
836 return ERROR_TARGET_NOT_HALTED;
839 /* Make sure the flash clock is on */
840 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
842 /* unlock option flash registers */
843 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
844 if (retval != ERROR_OK)
846 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
847 if (retval != ERROR_OK)
850 /* mass erase flash memory */
851 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER);
852 if (retval != ERROR_OK)
854 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER | FLASH_STRT);
855 if (retval != ERROR_OK)
858 retval = em357_wait_status_busy(bank, 100);
859 if (retval != ERROR_OK)
862 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
863 if (retval != ERROR_OK)
869 COMMAND_HANDLER(em357_handle_mass_erase_command)
872 return ERROR_COMMAND_SYNTAX_ERROR;
874 struct flash_bank *bank;
875 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
876 if (retval != ERROR_OK)
879 retval = em357_mass_erase(bank);
880 if (retval == ERROR_OK) {
881 /* set all sectors as erased */
882 for (unsigned int i = 0; i < bank->num_sectors; i++)
883 bank->sectors[i].is_erased = 1;
885 command_print(CMD, "em357 mass erase complete");
887 command_print(CMD, "em357 mass erase failed");
892 static const struct command_registration em357_exec_command_handlers[] = {
896 .handler = em357_handle_lock_command,
897 .mode = COMMAND_EXEC,
898 .help = "Lock entire flash device.",
903 .handler = em357_handle_unlock_command,
904 .mode = COMMAND_EXEC,
905 .help = "Unlock entire protected flash device.",
908 .name = "mass_erase",
910 .handler = em357_handle_mass_erase_command,
911 .mode = COMMAND_EXEC,
912 .help = "Erase entire flash device.",
914 COMMAND_REGISTRATION_DONE
917 static const struct command_registration em357_command_handlers[] = {
921 .help = "em357 flash command group",
923 .chain = em357_exec_command_handlers,
925 COMMAND_REGISTRATION_DONE
928 const struct flash_driver em357_flash = {
930 .commands = em357_command_handlers,
931 .flash_bank_command = em357_flash_bank_command,
932 .erase = em357_erase,
933 .protect = em357_protect,
934 .write = em357_write,
935 .read = default_flash_read,
936 .probe = em357_probe,
937 .auto_probe = em357_auto_probe,
938 .erase_check = default_flash_blank_check,
939 .protect_check = em357_protect_check,
940 .free_driver_priv = default_flash_free_driver_priv,