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   1 /***************************************************************************
   2  *   Copyright (C) 2009 by Simon Qian                                      *
   3  *   SimonQian@SimonQian.com                                               *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  17  ***************************************************************************/
  18
  19 #ifdef HAVE_CONFIG_H
  20 #include "config.h"
  21 #endif
  22
  23 #include "imp.h"
  24 #include <target/avrt.h>
  25
  26 /* AVR_JTAG_Instructions */
  27 #define AVR_JTAG_INS_LEN                                        4
  28 /* Public Instructions: */
  29 #define AVR_JTAG_INS_EXTEST                                     0x00
  30 #define AVR_JTAG_INS_IDCODE                                     0x01
  31 #define AVR_JTAG_INS_SAMPLE_PRELOAD                             0x02
  32 #define AVR_JTAG_INS_BYPASS                                     0x0F
  33 /* AVR Specified Public Instructions: */
  34 #define AVR_JTAG_INS_AVR_RESET                                  0x0C
  35 #define AVR_JTAG_INS_PROG_ENABLE                                0x04
  36 #define AVR_JTAG_INS_PROG_COMMANDS                              0x05
  37 #define AVR_JTAG_INS_PROG_PAGELOAD                              0x06
  38 #define AVR_JTAG_INS_PROG_PAGEREAD                              0x07
  39
  40 /* Data Registers: */
  41 #define AVR_JTAG_REG_Bypass_Len                                 1
  42 #define AVR_JTAG_REG_DeviceID_Len                               32
  43
  44 #define AVR_JTAG_REG_Reset_Len                                  1
  45 #define AVR_JTAG_REG_JTAGID_Len                                 32
  46 #define AVR_JTAG_REG_ProgrammingEnable_Len                      16
  47 #define AVR_JTAG_REG_ProgrammingCommand_Len                     15
  48 #define AVR_JTAG_REG_FlashDataByte_Len                          16
  49
  50 struct avrf_type {
  51         char name[15];
  52         uint16_t chip_id;
  53         int flash_page_size;
  54         int flash_page_num;
  55         int eeprom_page_size;
  56         int eeprom_page_num;
  57 };
  58
  59 struct avrf_flash_bank {
  60         int ppage_size;
  61         int probed;
  62 };
  63
  64 static const struct avrf_type avft_chips_info[] = {
  65 /*      name, chip_id,  flash_page_size, flash_page_num,
  66  *                      eeprom_page_size, eeprom_page_num
  67  */
  68         {"atmega128", 0x9702, 256, 512, 8, 512},
  69         {"atmega128rfa1", 0xa701, 128, 512, 8, 512},
  70         {"at90can128", 0x9781, 256, 512, 8, 512},
  71         {"at90usb128", 0x9782, 256, 512, 8, 512},
  72         {"atmega164p", 0x940a, 128, 128, 4, 128},
  73         {"atmega324p", 0x9508, 128, 256, 4, 256},
  74         {"atmega324pa", 0x9511, 128, 256, 4, 256},
  75         {"atmega644p", 0x960a, 256, 256, 8, 256},
  76         {"atmega1284p", 0x9705, 256, 512, 8, 512},
  77 };
  78
  79 /* avr program functions */
  80 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
  81 {
  82         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
  83         avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
  84
  85         return ERROR_OK;
  86 }
  87
  88 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
  89 {
  90         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
  91         avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
  92
  93         return ERROR_OK;
  94 }
  95
  96 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
  97 {
  98         avr_jtag_reset(avr, 1);
  99
 100         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
 101         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
 102
 103         return ERROR_OK;
 104 }
 105
 106 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
 107 {
 108         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 109         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
 110         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
 111
 112         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
 113         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
 114
 115         avr_jtag_reset(avr, 0);
 116
 117         return ERROR_OK;
 118 }
 119
 120 static int avr_jtagprg_chiperase(struct avr_common *avr)
 121 {
 122         uint32_t poll_value;
 123
 124         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 125         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
 126         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
 127         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
 128         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
 129
 130         do {
 131                 poll_value = 0;
 132                 avr_jtag_senddat(avr->jtag_info.tap,
 133                         &poll_value,
 134                         0x3380,
 135                         AVR_JTAG_REG_ProgrammingCommand_Len);
 136                 if (ERROR_OK != mcu_execute_queue())
 137                         return ERROR_FAIL;
 138                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 139         } while (!(poll_value & 0x0200));
 140
 141         return ERROR_OK;
 142 }
 143
 144 static int avr_jtagprg_writeflashpage(struct avr_common *avr,
 145         const bool ext_addressing,
 146         const uint8_t *page_buf,
 147         uint32_t buf_size,
 148         uint32_t addr,
 149         uint32_t page_size)
 150 {
 151         uint32_t i, poll_value;
 152
 153         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 154         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
 155
 156         /* load extended high byte */
 157         if (ext_addressing)
 158                 avr_jtag_senddat(avr->jtag_info.tap,
 159                         NULL,
 160                         0x0b00 | ((addr >> 17) & 0xFF),
 161                         AVR_JTAG_REG_ProgrammingCommand_Len);
 162
 163         /* load addr high byte */
 164         avr_jtag_senddat(avr->jtag_info.tap,
 165                 NULL,
 166                 0x0700 | ((addr >> 9) & 0xFF),
 167                 AVR_JTAG_REG_ProgrammingCommand_Len);
 168
 169         /* load addr low byte */
 170         avr_jtag_senddat(avr->jtag_info.tap,
 171                 NULL,
 172                 0x0300 | ((addr >> 1) & 0xFF),
 173                 AVR_JTAG_REG_ProgrammingCommand_Len);
 174
 175         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
 176
 177         for (i = 0; i < page_size; i++) {
 178                 if (i < buf_size)
 179                         avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
 180                 else
 181                         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
 182         }
 183
 184         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 185
 186         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 187         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
 188         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 189         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 190
 191         do {
 192                 poll_value = 0;
 193                 avr_jtag_senddat(avr->jtag_info.tap,
 194                         &poll_value,
 195                         0x3700,
 196                         AVR_JTAG_REG_ProgrammingCommand_Len);
 197                 if (ERROR_OK != mcu_execute_queue())
 198                         return ERROR_FAIL;
 199                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 200         } while (!(poll_value & 0x0200));
 201
 202         return ERROR_OK;
 203 }
 204
 205 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
 206 {
 207         struct avrf_flash_bank *avrf_info;
 208
 209         if (CMD_ARGC < 6)
 210                 return ERROR_COMMAND_SYNTAX_ERROR;
 211
 212         avrf_info = malloc(sizeof(struct avrf_flash_bank));
 213         bank->driver_priv = avrf_info;
 214
 215         avrf_info->probed = 0;
 216
 217         return ERROR_OK;
 218 }
 219
 220 static int avrf_erase(struct flash_bank *bank, int first, int last)
 221 {
 222         struct target *target = bank->target;
 223         struct avr_common *avr = target->arch_info;
 224         int status;
 225
 226         LOG_DEBUG("%s", __func__);
 227
 228         if (target->state != TARGET_HALTED) {
 229                 LOG_ERROR("Target not halted");
 230                 return ERROR_TARGET_NOT_HALTED;
 231         }
 232
 233         status = avr_jtagprg_enterprogmode(avr);
 234         if (status != ERROR_OK)
 235                 return status;
 236
 237         status = avr_jtagprg_chiperase(avr);
 238         if (status != ERROR_OK)
 239                 return status;
 240
 241         return avr_jtagprg_leaveprogmode(avr);
 242 }
 243
 244 static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
 245 {
 246         struct target *target = bank->target;
 247         struct avr_common *avr = target->arch_info;
 248         uint32_t cur_size, cur_buffer_size, page_size;
 249         bool ext_addressing;
 250
 251         if (bank->target->state != TARGET_HALTED) {
 252                 LOG_ERROR("Target not halted");
 253                 return ERROR_TARGET_NOT_HALTED;
 254         }
 255
 256         page_size = bank->sectors[0].size;
 257         if ((offset % page_size) != 0) {
 258                 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
 259                         offset,
 260                         page_size);
 261                 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 262         }
 263
 264         LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
 265         LOG_DEBUG("count is %" PRId32 "", count);
 266
 267         if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
 268                 return ERROR_FAIL;
 269
 270         if (bank->size > 0x20000)
 271                 ext_addressing = true;
 272         else
 273                 ext_addressing = false;
 274
 275         cur_size = 0;
 276         while (count > 0) {
 277                 if (count > page_size)
 278                         cur_buffer_size = page_size;
 279                 else
 280                         cur_buffer_size = count;
 281                 avr_jtagprg_writeflashpage(avr,
 282                         ext_addressing,
 283                         buffer + cur_size,
 284                         cur_buffer_size,
 285                         offset + cur_size,
 286                         page_size);
 287                 count -= cur_buffer_size;
 288                 cur_size += cur_buffer_size;
 289
 290                 keep_alive();
 291         }
 292
 293         return avr_jtagprg_leaveprogmode(avr);
 294 }
 295
 296 #define EXTRACT_MFG(X)  (((X) & 0xffe) >> 1)
 297 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
 298 #define EXTRACT_VER(X)  (((X) & 0xf0000000) >> 28)
 299
 300 static int avrf_probe(struct flash_bank *bank)
 301 {
 302         struct target *target = bank->target;
 303         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 304         struct avr_common *avr = target->arch_info;
 305         const struct avrf_type *avr_info = NULL;
 306         int i;
 307         uint32_t device_id;
 308
 309         if (bank->target->state != TARGET_HALTED) {
 310                 LOG_ERROR("Target not halted");
 311                 return ERROR_TARGET_NOT_HALTED;
 312         }
 313
 314         avrf_info->probed = 0;
 315
 316         avr_jtag_read_jtagid(avr, &device_id);
 317         if (ERROR_OK != mcu_execute_queue())
 318                 return ERROR_FAIL;
 319
 320         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 321         if (EXTRACT_MFG(device_id) != 0x1F)
 322                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
 323                         EXTRACT_MFG(device_id),
 324                         0x1F);
 325
 326         for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
 327                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
 328                         avr_info = &avft_chips_info[i];
 329                         LOG_INFO("target device is %s", avr_info->name);
 330                         break;
 331                 }
 332         }
 333
 334         if (avr_info != NULL) {
 335                 if (bank->sectors) {
 336                         free(bank->sectors);
 337                         bank->sectors = NULL;
 338                 }
 339
 340                 /* chip found */
 341                 bank->base = 0x00000000;
 342                 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
 343                 bank->num_sectors = avr_info->flash_page_num;
 344                 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
 345
 346                 for (i = 0; i < avr_info->flash_page_num; i++) {
 347                         bank->sectors[i].offset = i * avr_info->flash_page_size;
 348                         bank->sectors[i].size = avr_info->flash_page_size;
 349                         bank->sectors[i].is_erased = -1;
 350                         bank->sectors[i].is_protected = -1;
 351                 }
 352
 353                 avrf_info->probed = 1;
 354                 return ERROR_OK;
 355         } else {
 356                 /* chip not supported */
 357                 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
 358
 359                 avrf_info->probed = 1;
 360                 return ERROR_FAIL;
 361         }
 362 }
 363
 364 static int avrf_auto_probe(struct flash_bank *bank)
 365 {
 366         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 367         if (avrf_info->probed)
 368                 return ERROR_OK;
 369         return avrf_probe(bank);
 370 }
 371
 372 static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
 373 {
 374         struct target *target = bank->target;
 375         struct avr_common *avr = target->arch_info;
 376         const struct avrf_type *avr_info = NULL;
 377         int i;
 378         uint32_t device_id;
 379
 380         if (bank->target->state != TARGET_HALTED) {
 381                 LOG_ERROR("Target not halted");
 382                 return ERROR_TARGET_NOT_HALTED;
 383         }
 384
 385         avr_jtag_read_jtagid(avr, &device_id);
 386         if (ERROR_OK != mcu_execute_queue())
 387                 return ERROR_FAIL;
 388
 389         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 390         if (EXTRACT_MFG(device_id) != 0x1F)
 391                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
 392                         EXTRACT_MFG(device_id),
 393                         0x1F);
 394
 395         for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
 396                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
 397                         avr_info = &avft_chips_info[i];
 398                         LOG_INFO("target device is %s", avr_info->name);
 399
 400                         break;
 401                 }
 402         }
 403
 404         if (avr_info != NULL) {
 405                 /* chip found */
 406                 snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
 407                         EXTRACT_VER(device_id));
 408                 return ERROR_OK;
 409         } else {
 410                 /* chip not supported */
 411                 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
 412                 return ERROR_FLASH_OPERATION_FAILED;
 413         }
 414 }
 415
 416 static int avrf_mass_erase(struct flash_bank *bank)
 417 {
 418         struct target *target = bank->target;
 419         struct avr_common *avr = target->arch_info;
 420
 421         if (target->state != TARGET_HALTED) {
 422                 LOG_ERROR("Target not halted");
 423                 return ERROR_TARGET_NOT_HALTED;
 424         }
 425
 426         if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
 427             || (ERROR_OK != avr_jtagprg_chiperase(avr))
 428             || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
 429                 return ERROR_FAIL;
 430
 431         return ERROR_OK;
 432 }
 433
 434 COMMAND_HANDLER(avrf_handle_mass_erase_command)
 435 {
 436         int i;
 437
 438         if (CMD_ARGC < 1)
 439                 return ERROR_COMMAND_SYNTAX_ERROR;
 440
 441         struct flash_bank *bank;
 442         int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 443         if (ERROR_OK != retval)
 444                 return retval;
 445
 446         if (avrf_mass_erase(bank) == ERROR_OK) {
 447                 /* set all sectors as erased */
 448                 for (i = 0; i < bank->num_sectors; i++)
 449                         bank->sectors[i].is_erased = 1;
 450
 451                 command_print(CMD, "avr mass erase complete");
 452         } else
 453                 command_print(CMD, "avr mass erase failed");
 454
 455         LOG_DEBUG("%s", __func__);
 456         return ERROR_OK;
 457 }
 458
 459 static const struct command_registration avrf_exec_command_handlers[] = {
 460         {
 461                 .name = "mass_erase",
 462                 .usage = "<bank>",
 463                 .handler = avrf_handle_mass_erase_command,
 464                 .mode = COMMAND_EXEC,
 465                 .help = "erase entire device",
 466         },
 467         COMMAND_REGISTRATION_DONE
 468 };
 469 static const struct command_registration avrf_command_handlers[] = {
 470         {
 471                 .name = "avrf",
 472                 .mode = COMMAND_ANY,
 473                 .help = "AVR flash command group",
 474                 .usage = "",
 475                 .chain = avrf_exec_command_handlers,
 476         },
 477         COMMAND_REGISTRATION_DONE
 478 };
 479
 480 const struct flash_driver avr_flash = {
 481         .name = "avr",
 482         .commands = avrf_command_handlers,
 483         .flash_bank_command = avrf_flash_bank_command,
 484         .erase = avrf_erase,
 485         .write = avrf_write,
 486         .read = default_flash_read,
 487         .probe = avrf_probe,
 488         .auto_probe = avrf_auto_probe,
 489         .erase_check = default_flash_blank_check,
 490         .info = avrf_info,
 491         .free_driver_priv = default_flash_free_driver_priv,
 492 };