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   1 /***************************************************************************
   2  *   Copyright (C) 2009 by Simon Qian                                      *
   3  *   SimonQian@SimonQian.com                                               *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  17  ***************************************************************************/
  18
  19 #ifdef HAVE_CONFIG_H
  20 #include "config.h"
  21 #endif
  22
  23 #include "imp.h"
  24 #include <target/avrt.h>
  25
  26 /* AVR_JTAG_Instructions */
  27 #define AVR_JTAG_INS_LEN                                        4
  28 /* Public Instructions: */
  29 #define AVR_JTAG_INS_EXTEST                                     0x00
  30 #define AVR_JTAG_INS_IDCODE                                     0x01
  31 #define AVR_JTAG_INS_SAMPLE_PRELOAD                             0x02
  32 #define AVR_JTAG_INS_BYPASS                                     0x0F
  33 /* AVR Specified Public Instructions: */
  34 #define AVR_JTAG_INS_AVR_RESET                                  0x0C
  35 #define AVR_JTAG_INS_PROG_ENABLE                                0x04
  36 #define AVR_JTAG_INS_PROG_COMMANDS                              0x05
  37 #define AVR_JTAG_INS_PROG_PAGELOAD                              0x06
  38 #define AVR_JTAG_INS_PROG_PAGEREAD                              0x07
  39
  40 /* Data Registers: */
  41 #define AVR_JTAG_REG_Bypass_Len                                 1
  42 #define AVR_JTAG_REG_DeviceID_Len                               32
  43
  44 #define AVR_JTAG_REG_Reset_Len                                  1
  45 #define AVR_JTAG_REG_JTAGID_Len                                 32
  46 #define AVR_JTAG_REG_ProgrammingEnable_Len                      16
  47 #define AVR_JTAG_REG_ProgrammingCommand_Len                     15
  48 #define AVR_JTAG_REG_FlashDataByte_Len                          16
  49
  50 struct avrf_type {
  51         char name[15];
  52         uint16_t chip_id;
  53         int flash_page_size;
  54         int flash_page_num;
  55         int eeprom_page_size;
  56         int eeprom_page_num;
  57 };
  58
  59 struct avrf_flash_bank {
  60         int ppage_size;
  61         int probed;
  62 };
  63
  64 static const struct avrf_type avft_chips_info[] = {
  65 /*      name, chip_id,  flash_page_size, flash_page_num,
  66  *                      eeprom_page_size, eeprom_page_num
  67  */
  68         {"atmega128", 0x9702, 256, 512, 8, 512},
  69         {"atmega128rfa1", 0xa701, 128, 512, 8, 512},
  70         {"at90can128", 0x9781, 256, 512, 8, 512},
  71         {"at90usb128", 0x9782, 256, 512, 8, 512},
  72         {"atmega164p", 0x940a, 128, 128, 4, 128},
  73         {"atmega324p", 0x9508, 128, 256, 4, 256},
  74         {"atmega324pa", 0x9511, 128, 256, 4, 256},
  75         {"atmega644p", 0x960a, 256, 256, 8, 256},
  76         {"atmega1284p", 0x9705, 256, 512, 8, 512},
  77 };
  78
  79 /* avr program functions */
  80 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
  81 {
  82         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
  83         avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
  84
  85         return ERROR_OK;
  86 }
  87
  88 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
  89 {
  90         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
  91         avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
  92
  93         return ERROR_OK;
  94 }
  95
  96 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
  97 {
  98         avr_jtag_reset(avr, 1);
  99
 100         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
 101         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
 102
 103         return ERROR_OK;
 104 }
 105
 106 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
 107 {
 108         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 109         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
 110         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
 111
 112         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
 113         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
 114
 115         avr_jtag_reset(avr, 0);
 116
 117         return ERROR_OK;
 118 }
 119
 120 static int avr_jtagprg_chiperase(struct avr_common *avr)
 121 {
 122         uint32_t poll_value;
 123
 124         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 125         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
 126         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
 127         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
 128         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
 129
 130         do {
 131                 poll_value = 0;
 132                 avr_jtag_senddat(avr->jtag_info.tap,
 133                         &poll_value,
 134                         0x3380,
 135                         AVR_JTAG_REG_ProgrammingCommand_Len);
 136                 if (ERROR_OK != mcu_execute_queue())
 137                         return ERROR_FAIL;
 138                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 139         } while (!(poll_value & 0x0200));
 140
 141         return ERROR_OK;
 142 }
 143
 144 static int avr_jtagprg_writeflashpage(struct avr_common *avr,
 145         const uint8_t *page_buf,
 146         uint32_t buf_size,
 147         uint32_t addr,
 148         uint32_t page_size)
 149 {
 150         uint32_t i, poll_value;
 151
 152         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 153         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
 154
 155         /* load addr high byte */
 156         avr_jtag_senddat(avr->jtag_info.tap,
 157                 NULL,
 158                 0x0700 | ((addr >> 9) & 0xFF),
 159                 AVR_JTAG_REG_ProgrammingCommand_Len);
 160
 161         /* load addr low byte */
 162         avr_jtag_senddat(avr->jtag_info.tap,
 163                 NULL,
 164                 0x0300 | ((addr >> 1) & 0xFF),
 165                 AVR_JTAG_REG_ProgrammingCommand_Len);
 166
 167         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
 168
 169         for (i = 0; i < page_size; i++) {
 170                 if (i < buf_size)
 171                         avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
 172                 else
 173                         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
 174         }
 175
 176         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 177
 178         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 179         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
 180         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 181         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 182
 183         do {
 184                 poll_value = 0;
 185                 avr_jtag_senddat(avr->jtag_info.tap,
 186                         &poll_value,
 187                         0x3700,
 188                         AVR_JTAG_REG_ProgrammingCommand_Len);
 189                 if (ERROR_OK != mcu_execute_queue())
 190                         return ERROR_FAIL;
 191                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 192         } while (!(poll_value & 0x0200));
 193
 194         return ERROR_OK;
 195 }
 196
 197 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
 198 {
 199         struct avrf_flash_bank *avrf_info;
 200
 201         if (CMD_ARGC < 6)
 202                 return ERROR_COMMAND_SYNTAX_ERROR;
 203
 204         avrf_info = malloc(sizeof(struct avrf_flash_bank));
 205         bank->driver_priv = avrf_info;
 206
 207         avrf_info->probed = 0;
 208
 209         return ERROR_OK;
 210 }
 211
 212 static int avrf_erase(struct flash_bank *bank, int first, int last)
 213 {
 214         struct target *target = bank->target;
 215         struct avr_common *avr = target->arch_info;
 216         int status;
 217
 218         LOG_DEBUG("%s", __func__);
 219
 220         if (target->state != TARGET_HALTED) {
 221                 LOG_ERROR("Target not halted");
 222                 return ERROR_TARGET_NOT_HALTED;
 223         }
 224
 225         status = avr_jtagprg_enterprogmode(avr);
 226         if (status != ERROR_OK)
 227                 return status;
 228
 229         status = avr_jtagprg_chiperase(avr);
 230         if (status != ERROR_OK)
 231                 return status;
 232
 233         return avr_jtagprg_leaveprogmode(avr);
 234 }
 235
 236 static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
 237 {
 238         struct target *target = bank->target;
 239         struct avr_common *avr = target->arch_info;
 240         uint32_t cur_size, cur_buffer_size, page_size;
 241
 242         if (bank->target->state != TARGET_HALTED) {
 243                 LOG_ERROR("Target not halted");
 244                 return ERROR_TARGET_NOT_HALTED;
 245         }
 246
 247         page_size = bank->sectors[0].size;
 248         if ((offset % page_size) != 0) {
 249                 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
 250                         offset,
 251                         page_size);
 252                 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 253         }
 254
 255         LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
 256         LOG_DEBUG("count is %" PRId32 "", count);
 257
 258         if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
 259                 return ERROR_FAIL;
 260
 261         cur_size = 0;
 262         while (count > 0) {
 263                 if (count > page_size)
 264                         cur_buffer_size = page_size;
 265                 else
 266                         cur_buffer_size = count;
 267                 avr_jtagprg_writeflashpage(avr,
 268                         buffer + cur_size,
 269                         cur_buffer_size,
 270                         offset + cur_size,
 271                         page_size);
 272                 count -= cur_buffer_size;
 273                 cur_size += cur_buffer_size;
 274
 275                 keep_alive();
 276         }
 277
 278         return avr_jtagprg_leaveprogmode(avr);
 279 }
 280
 281 #define EXTRACT_MFG(X)  (((X) & 0xffe) >> 1)
 282 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
 283 #define EXTRACT_VER(X)  (((X) & 0xf0000000) >> 28)
 284
 285 static int avrf_probe(struct flash_bank *bank)
 286 {
 287         struct target *target = bank->target;
 288         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 289         struct avr_common *avr = target->arch_info;
 290         const struct avrf_type *avr_info = NULL;
 291         int i;
 292         uint32_t device_id;
 293
 294         if (bank->target->state != TARGET_HALTED) {
 295                 LOG_ERROR("Target not halted");
 296                 return ERROR_TARGET_NOT_HALTED;
 297         }
 298
 299         avrf_info->probed = 0;
 300
 301         avr_jtag_read_jtagid(avr, &device_id);
 302         if (ERROR_OK != mcu_execute_queue())
 303                 return ERROR_FAIL;
 304
 305         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 306         if (EXTRACT_MFG(device_id) != 0x1F)
 307                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
 308                         EXTRACT_MFG(device_id),
 309                         0x1F);
 310
 311         for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
 312                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
 313                         avr_info = &avft_chips_info[i];
 314                         LOG_INFO("target device is %s", avr_info->name);
 315                         break;
 316                 }
 317         }
 318
 319         if (avr_info != NULL) {
 320                 if (bank->sectors) {
 321                         free(bank->sectors);
 322                         bank->sectors = NULL;
 323                 }
 324
 325                 /* chip found */
 326                 bank->base = 0x00000000;
 327                 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
 328                 bank->num_sectors = avr_info->flash_page_num;
 329                 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
 330
 331                 for (i = 0; i < avr_info->flash_page_num; i++) {
 332                         bank->sectors[i].offset = i * avr_info->flash_page_size;
 333                         bank->sectors[i].size = avr_info->flash_page_size;
 334                         bank->sectors[i].is_erased = -1;
 335                         bank->sectors[i].is_protected = -1;
 336                 }
 337
 338                 avrf_info->probed = 1;
 339                 return ERROR_OK;
 340         } else {
 341                 /* chip not supported */
 342                 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
 343
 344                 avrf_info->probed = 1;
 345                 return ERROR_FAIL;
 346         }
 347 }
 348
 349 static int avrf_auto_probe(struct flash_bank *bank)
 350 {
 351         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 352         if (avrf_info->probed)
 353                 return ERROR_OK;
 354         return avrf_probe(bank);
 355 }
 356
 357 static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
 358 {
 359         struct target *target = bank->target;
 360         struct avr_common *avr = target->arch_info;
 361         const struct avrf_type *avr_info = NULL;
 362         int i;
 363         uint32_t device_id;
 364
 365         if (bank->target->state != TARGET_HALTED) {
 366                 LOG_ERROR("Target not halted");
 367                 return ERROR_TARGET_NOT_HALTED;
 368         }
 369
 370         avr_jtag_read_jtagid(avr, &device_id);
 371         if (ERROR_OK != mcu_execute_queue())
 372                 return ERROR_FAIL;
 373
 374         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 375         if (EXTRACT_MFG(device_id) != 0x1F)
 376                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
 377                         EXTRACT_MFG(device_id),
 378                         0x1F);
 379
 380         for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
 381                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
 382                         avr_info = &avft_chips_info[i];
 383                         LOG_INFO("target device is %s", avr_info->name);
 384
 385                         break;
 386                 }
 387         }
 388
 389         if (avr_info != NULL) {
 390                 /* chip found */
 391                 snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
 392                         EXTRACT_VER(device_id));
 393                 return ERROR_OK;
 394         } else {
 395                 /* chip not supported */
 396                 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
 397                 return ERROR_FLASH_OPERATION_FAILED;
 398         }
 399 }
 400
 401 static int avrf_mass_erase(struct flash_bank *bank)
 402 {
 403         struct target *target = bank->target;
 404         struct avr_common *avr = target->arch_info;
 405
 406         if (target->state != TARGET_HALTED) {
 407                 LOG_ERROR("Target not halted");
 408                 return ERROR_TARGET_NOT_HALTED;
 409         }
 410
 411         if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
 412             || (ERROR_OK != avr_jtagprg_chiperase(avr))
 413             || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
 414                 return ERROR_FAIL;
 415
 416         return ERROR_OK;
 417 }
 418
 419 COMMAND_HANDLER(avrf_handle_mass_erase_command)
 420 {
 421         int i;
 422
 423         if (CMD_ARGC < 1)
 424                 return ERROR_COMMAND_SYNTAX_ERROR;
 425
 426         struct flash_bank *bank;
 427         int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 428         if (ERROR_OK != retval)
 429                 return retval;
 430
 431         if (avrf_mass_erase(bank) == ERROR_OK) {
 432                 /* set all sectors as erased */
 433                 for (i = 0; i < bank->num_sectors; i++)
 434                         bank->sectors[i].is_erased = 1;
 435
 436                 command_print(CMD_CTX, "avr mass erase complete");
 437         } else
 438                 command_print(CMD_CTX, "avr mass erase failed");
 439
 440         LOG_DEBUG("%s", __func__);
 441         return ERROR_OK;
 442 }
 443
 444 static const struct command_registration avrf_exec_command_handlers[] = {
 445         {
 446                 .name = "mass_erase",
 447                 .usage = "<bank>",
 448                 .handler = avrf_handle_mass_erase_command,
 449                 .mode = COMMAND_EXEC,
 450                 .help = "erase entire device",
 451         },
 452         COMMAND_REGISTRATION_DONE
 453 };
 454 static const struct command_registration avrf_command_handlers[] = {
 455         {
 456                 .name = "avrf",
 457                 .mode = COMMAND_ANY,
 458                 .help = "AVR flash command group",
 459                 .usage = "",
 460                 .chain = avrf_exec_command_handlers,
 461         },
 462         COMMAND_REGISTRATION_DONE
 463 };
 464
 465 struct flash_driver avr_flash = {
 466         .name = "avr",
 467         .commands = avrf_command_handlers,
 468         .flash_bank_command = avrf_flash_bank_command,
 469         .erase = avrf_erase,
 470         .write = avrf_write,
 471         .read = default_flash_read,
 472         .probe = avrf_probe,
 473         .auto_probe = avrf_auto_probe,
 474         .erase_check = default_flash_blank_check,
 475         .info = avrf_info,
 476         .free_driver_priv = default_flash_free_driver_priv,
 477 };