1 /***************************************************************************
2 * Copyright (C) 2009 by Simon Qian *
3 * SimonQian@SimonQian.com *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
24 #include <target/avrt.h>
26 /* AVR_JTAG_Instructions */
27 #define AVR_JTAG_INS_LEN 4
28 /* Public Instructions: */
29 #define AVR_JTAG_INS_EXTEST 0x00
30 #define AVR_JTAG_INS_IDCODE 0x01
31 #define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
32 #define AVR_JTAG_INS_BYPASS 0x0F
33 /* AVR Specified Public Instructions: */
34 #define AVR_JTAG_INS_AVR_RESET 0x0C
35 #define AVR_JTAG_INS_PROG_ENABLE 0x04
36 #define AVR_JTAG_INS_PROG_COMMANDS 0x05
37 #define AVR_JTAG_INS_PROG_PAGELOAD 0x06
38 #define AVR_JTAG_INS_PROG_PAGEREAD 0x07
41 #define AVR_JTAG_REG_Bypass_Len 1
42 #define AVR_JTAG_REG_DeviceID_Len 32
44 #define AVR_JTAG_REG_Reset_Len 1
45 #define AVR_JTAG_REG_JTAGID_Len 32
46 #define AVR_JTAG_REG_ProgrammingEnable_Len 16
47 #define AVR_JTAG_REG_ProgrammingCommand_Len 15
48 #define AVR_JTAG_REG_FlashDataByte_Len 16
59 struct avrf_flash_bank {
64 static const struct avrf_type avft_chips_info[] = {
65 /* name, chip_id, flash_page_size, flash_page_num,
66 * eeprom_page_size, eeprom_page_num
68 {"atmega128", 0x9702, 256, 512, 8, 512},
69 {"atmega128rfa1", 0xa701, 128, 512, 8, 512},
70 {"at90can128", 0x9781, 256, 512, 8, 512},
71 {"at90usb128", 0x9782, 256, 512, 8, 512},
72 {"atmega164p", 0x940a, 128, 128, 4, 128},
73 {"atmega324p", 0x9508, 128, 256, 4, 256},
74 {"atmega324pa", 0x9511, 128, 256, 4, 256},
75 {"atmega644p", 0x960a, 256, 256, 8, 256},
76 {"atmega1284p", 0x9705, 256, 512, 8, 512},
79 /* avr program functions */
80 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
82 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
83 avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
88 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
90 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
91 avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
96 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
98 avr_jtag_reset(avr, 1);
100 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
101 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
106 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
108 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
109 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
110 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
112 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
113 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
115 avr_jtag_reset(avr, 0);
120 static int avr_jtagprg_chiperase(struct avr_common *avr)
124 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
125 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
126 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
127 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
128 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
132 avr_jtag_senddat(avr->jtag_info.tap,
135 AVR_JTAG_REG_ProgrammingCommand_Len);
136 if (ERROR_OK != mcu_execute_queue())
138 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
139 } while (!(poll_value & 0x0200));
144 static int avr_jtagprg_writeflashpage(struct avr_common *avr,
145 const uint8_t *page_buf,
150 uint32_t i, poll_value;
152 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
153 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
155 /* load addr high byte */
156 avr_jtag_senddat(avr->jtag_info.tap,
158 0x0700 | ((addr >> 9) & 0xFF),
159 AVR_JTAG_REG_ProgrammingCommand_Len);
161 /* load addr low byte */
162 avr_jtag_senddat(avr->jtag_info.tap,
164 0x0300 | ((addr >> 1) & 0xFF),
165 AVR_JTAG_REG_ProgrammingCommand_Len);
167 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
169 for (i = 0; i < page_size; i++) {
171 avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
173 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
176 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
178 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
179 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
180 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
181 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
185 avr_jtag_senddat(avr->jtag_info.tap,
188 AVR_JTAG_REG_ProgrammingCommand_Len);
189 if (ERROR_OK != mcu_execute_queue())
191 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
192 } while (!(poll_value & 0x0200));
197 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
199 struct avrf_flash_bank *avrf_info;
202 return ERROR_COMMAND_SYNTAX_ERROR;
204 avrf_info = malloc(sizeof(struct avrf_flash_bank));
205 bank->driver_priv = avrf_info;
207 avrf_info->probed = 0;
212 static int avrf_erase(struct flash_bank *bank, int first, int last)
214 struct target *target = bank->target;
215 struct avr_common *avr = target->arch_info;
218 LOG_DEBUG("%s", __func__);
220 if (target->state != TARGET_HALTED) {
221 LOG_ERROR("Target not halted");
222 return ERROR_TARGET_NOT_HALTED;
225 status = avr_jtagprg_enterprogmode(avr);
226 if (status != ERROR_OK)
229 status = avr_jtagprg_chiperase(avr);
230 if (status != ERROR_OK)
233 return avr_jtagprg_leaveprogmode(avr);
236 static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
238 struct target *target = bank->target;
239 struct avr_common *avr = target->arch_info;
240 uint32_t cur_size, cur_buffer_size, page_size;
242 if (bank->target->state != TARGET_HALTED) {
243 LOG_ERROR("Target not halted");
244 return ERROR_TARGET_NOT_HALTED;
247 page_size = bank->sectors[0].size;
248 if ((offset % page_size) != 0) {
249 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
252 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
255 LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
256 LOG_DEBUG("count is %" PRId32 "", count);
258 if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
263 if (count > page_size)
264 cur_buffer_size = page_size;
266 cur_buffer_size = count;
267 avr_jtagprg_writeflashpage(avr,
272 count -= cur_buffer_size;
273 cur_size += cur_buffer_size;
278 return avr_jtagprg_leaveprogmode(avr);
281 #define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
282 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
283 #define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
285 static int avrf_probe(struct flash_bank *bank)
287 struct target *target = bank->target;
288 struct avrf_flash_bank *avrf_info = bank->driver_priv;
289 struct avr_common *avr = target->arch_info;
290 const struct avrf_type *avr_info = NULL;
294 if (bank->target->state != TARGET_HALTED) {
295 LOG_ERROR("Target not halted");
296 return ERROR_TARGET_NOT_HALTED;
299 avrf_info->probed = 0;
301 avr_jtag_read_jtagid(avr, &device_id);
302 if (ERROR_OK != mcu_execute_queue())
305 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
306 if (EXTRACT_MFG(device_id) != 0x1F)
307 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
308 EXTRACT_MFG(device_id),
311 for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
312 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
313 avr_info = &avft_chips_info[i];
314 LOG_INFO("target device is %s", avr_info->name);
319 if (avr_info != NULL) {
322 bank->sectors = NULL;
326 bank->base = 0x00000000;
327 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
328 bank->num_sectors = avr_info->flash_page_num;
329 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
331 for (i = 0; i < avr_info->flash_page_num; i++) {
332 bank->sectors[i].offset = i * avr_info->flash_page_size;
333 bank->sectors[i].size = avr_info->flash_page_size;
334 bank->sectors[i].is_erased = -1;
335 bank->sectors[i].is_protected = -1;
338 avrf_info->probed = 1;
341 /* chip not supported */
342 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
344 avrf_info->probed = 1;
349 static int avrf_auto_probe(struct flash_bank *bank)
351 struct avrf_flash_bank *avrf_info = bank->driver_priv;
352 if (avrf_info->probed)
354 return avrf_probe(bank);
357 static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
359 struct target *target = bank->target;
360 struct avr_common *avr = target->arch_info;
361 const struct avrf_type *avr_info = NULL;
365 if (bank->target->state != TARGET_HALTED) {
366 LOG_ERROR("Target not halted");
367 return ERROR_TARGET_NOT_HALTED;
370 avr_jtag_read_jtagid(avr, &device_id);
371 if (ERROR_OK != mcu_execute_queue())
374 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
375 if (EXTRACT_MFG(device_id) != 0x1F)
376 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
377 EXTRACT_MFG(device_id),
380 for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
381 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
382 avr_info = &avft_chips_info[i];
383 LOG_INFO("target device is %s", avr_info->name);
389 if (avr_info != NULL) {
391 snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
392 EXTRACT_VER(device_id));
395 /* chip not supported */
396 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
397 return ERROR_FLASH_OPERATION_FAILED;
401 static int avrf_mass_erase(struct flash_bank *bank)
403 struct target *target = bank->target;
404 struct avr_common *avr = target->arch_info;
406 if (target->state != TARGET_HALTED) {
407 LOG_ERROR("Target not halted");
408 return ERROR_TARGET_NOT_HALTED;
411 if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
412 || (ERROR_OK != avr_jtagprg_chiperase(avr))
413 || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
419 COMMAND_HANDLER(avrf_handle_mass_erase_command)
424 return ERROR_COMMAND_SYNTAX_ERROR;
426 struct flash_bank *bank;
427 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
428 if (ERROR_OK != retval)
431 if (avrf_mass_erase(bank) == ERROR_OK) {
432 /* set all sectors as erased */
433 for (i = 0; i < bank->num_sectors; i++)
434 bank->sectors[i].is_erased = 1;
436 command_print(CMD, "avr mass erase complete");
438 command_print(CMD, "avr mass erase failed");
440 LOG_DEBUG("%s", __func__);
444 static const struct command_registration avrf_exec_command_handlers[] = {
446 .name = "mass_erase",
448 .handler = avrf_handle_mass_erase_command,
449 .mode = COMMAND_EXEC,
450 .help = "erase entire device",
452 COMMAND_REGISTRATION_DONE
454 static const struct command_registration avrf_command_handlers[] = {
458 .help = "AVR flash command group",
460 .chain = avrf_exec_command_handlers,
462 COMMAND_REGISTRATION_DONE
465 const struct flash_driver avr_flash = {
467 .commands = avrf_command_handlers,
468 .flash_bank_command = avrf_flash_bank_command,
471 .read = default_flash_read,
473 .auto_probe = avrf_auto_probe,
474 .erase_check = default_flash_blank_check,
476 .free_driver_priv = default_flash_free_driver_priv,