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   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
   6  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program; if not, write to the                         *
  20  *   Free Software Foundation, Inc.,                                       *
  21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  22  ***************************************************************************/
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "nand.h"
  28 #include "common.h"
  29 #include "time_support.h"
  30 #include "fileio.h"
  31
  32 static int nand_read_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
  33 //static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size);
  34
  35 static int nand_write_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
  36
  37 /* NAND flash controller
  38  */
  39 extern struct nand_flash_controller davinci_nand_controller;
  40 extern struct nand_flash_controller lpc3180_nand_controller;
  41 extern struct nand_flash_controller orion_nand_controller;
  42 extern struct nand_flash_controller s3c2410_nand_controller;
  43 extern struct nand_flash_controller s3c2412_nand_controller;
  44 extern struct nand_flash_controller s3c2440_nand_controller;
  45 extern struct nand_flash_controller s3c2443_nand_controller;
  46 extern struct nand_flash_controller imx31_nand_flash_controller;
  47
  48 /* extern struct nand_flash_controller boundary_scan_nand_controller; */
  49
  50 static struct nand_flash_controller *nand_flash_controllers[] =
  51 {
  52         &davinci_nand_controller,
  53         &lpc3180_nand_controller,
  54         &orion_nand_controller,
  55         &s3c2410_nand_controller,
  56         &s3c2412_nand_controller,
  57         &s3c2440_nand_controller,
  58         &s3c2443_nand_controller,
  59         &imx31_nand_flash_controller,
  60 /*      &boundary_scan_nand_controller, */
  61         NULL
  62 };
  63
  64 /* configured NAND devices and NAND Flash command handler */
  65 static struct nand_device *nand_devices = NULL;
  66 static struct command *nand_cmd;
  67
  68 /*      Chip ID list
  69  *
  70  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  71  *      options
  72  *
  73  *      Pagesize; 0, 256, 512
  74  *      0       get this information from the extended chip ID
  75  *      256     256 Byte page size
  76  *      512     512 Byte page size
  77  */
  78 static struct nand_info nand_flash_ids[] =
  79 {
  80         /* start "museum" IDs */
  81         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
  82         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
  83         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
  84         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
  85         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
  86         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
  87         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
  88         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
  89         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
  90         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
  91
  92         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
  93         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
  94         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
  95         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
  96         /* end "museum" IDs */
  97
  98         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
  99         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
 100         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 101         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 102
 103         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
 104         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
 105         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 106         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 107
 108         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
 109         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
 110         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 111         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 112
 113         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
 114         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
 115         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
 116         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 117         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 118         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 119         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 120
 121         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
 122
 123         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
 124         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
 125         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
 126         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
 127
 128         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
 129         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
 130         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
 131         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
 132
 133         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
 134         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
 135         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
 136         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
 137
 138         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
 139         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
 140         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
 141         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
 142
 143         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
 144         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
 145         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
 146         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
 147
 148         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
 149         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
 150         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
 151         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
 152
 153         {NULL, 0, 0, 0, 0, 0 }
 154 };
 155
 156 /* Manufacturer ID list
 157  */
 158 static struct nand_manufacturer nand_manuf_ids[] =
 159 {
 160         {0x0, "unknown"},
 161         {NAND_MFR_TOSHIBA, "Toshiba"},
 162         {NAND_MFR_SAMSUNG, "Samsung"},
 163         {NAND_MFR_FUJITSU, "Fujitsu"},
 164         {NAND_MFR_NATIONAL, "National"},
 165         {NAND_MFR_RENESAS, "Renesas"},
 166         {NAND_MFR_STMICRO, "ST Micro"},
 167         {NAND_MFR_HYNIX, "Hynix"},
 168         {NAND_MFR_MICRON, "Micron"},
 169         {0x0, NULL},
 170 };
 171
 172 /*
 173  * Define default oob placement schemes for large and small page devices
 174  */
 175
 176 #if 0
 177 static struct nand_ecclayout nand_oob_8 = {
 178         .eccbytes = 3,
 179         .eccpos = {0, 1, 2},
 180         .oobfree = {
 181                 {.offset = 3,
 182                  .length = 2},
 183                 {.offset = 6,
 184                  .length = 2}}
 185 };
 186 #endif
 187
 188 static struct nand_ecclayout nand_oob_16 = {
 189         .eccbytes = 6,
 190         .eccpos = {0, 1, 2, 3, 6, 7},
 191         .oobfree = {
 192                 {.offset = 8,
 193                  . length = 8}}
 194 };
 195
 196 static struct nand_ecclayout nand_oob_64 = {
 197         .eccbytes = 24,
 198         .eccpos = {
 199                    40, 41, 42, 43, 44, 45, 46, 47,
 200                    48, 49, 50, 51, 52, 53, 54, 55,
 201                    56, 57, 58, 59, 60, 61, 62, 63},
 202         .oobfree = {
 203                 {.offset = 2,
 204                  .length = 38}}
 205 };
 206
 207 /* nand device <nand_controller> [controller options]
 208  */
 209 COMMAND_HANDLER(handle_nand_device_command)
 210 {
 211         int i;
 212         int retval;
 213
 214         if (CMD_ARGC < 1)
 215         {
 216                 LOG_WARNING("incomplete flash device nand configuration");
 217                 return ERROR_FLASH_BANK_INVALID;
 218         }
 219
 220         for (i = 0; nand_flash_controllers[i]; i++)
 221         {
 222                 struct nand_device *p, *c;
 223
 224                 if (strcmp(CMD_ARGV[0], nand_flash_controllers[i]->name) == 0)
 225                 {
 226                         /* register flash specific commands */
 227                         if ((retval = nand_flash_controllers[i]->register_commands(CMD_CTX)) != ERROR_OK)
 228                         {
 229                                 LOG_ERROR("couldn't register '%s' commands", CMD_ARGV[0]);
 230                                 return retval;
 231                         }
 232
 233                         c = malloc(sizeof(struct nand_device));
 234
 235                         c->controller = nand_flash_controllers[i];
 236                         c->controller_priv = NULL;
 237                         c->manufacturer = NULL;
 238                         c->device = NULL;
 239                         c->bus_width = 0;
 240                         c->address_cycles = 0;
 241                         c->page_size = 0;
 242                         c->use_raw = 0;
 243                         c->next = NULL;
 244
 245                         retval = CALL_COMMAND_HANDLER(nand_flash_controllers[i]->nand_device_command, c);
 246                         if (ERROR_OK != retval)
 247                         {
 248                                 LOG_ERROR("'%s' driver rejected nand flash", c->controller->name);
 249                                 free(c);
 250                                 return ERROR_OK;
 251                         }
 252
 253                         /* put NAND device in linked list */
 254                         if (nand_devices)
 255                         {
 256                                 /* find last flash device */
 257                                 for (p = nand_devices; p && p->next; p = p->next);
 258                                 if (p)
 259                                         p->next = c;
 260                         }
 261                         else
 262                         {
 263                                 nand_devices = c;
 264                         }
 265
 266                         return ERROR_OK;
 267                 }
 268         }
 269
 270         /* no valid NAND controller was found (i.e. the configuration option,
 271          * didn't match one of the compiled-in controllers)
 272          */
 273         LOG_ERROR("No valid NAND flash controller found (%s)", CMD_ARGV[0]);
 274         LOG_ERROR("compiled-in NAND flash controllers:");
 275         for (i = 0; nand_flash_controllers[i]; i++)
 276         {
 277                 LOG_ERROR("%i: %s", i, nand_flash_controllers[i]->name);
 278         }
 279
 280         return ERROR_OK;
 281 }
 282
 283 int nand_register_commands(struct command_context *cmd_ctx)
 284 {
 285         nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, "NAND specific commands");
 286
 287         register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL);
 288
 289         return ERROR_OK;
 290 }
 291
 292 struct nand_device *get_nand_device_by_name(const char *name)
 293 {
 294         unsigned requested = get_flash_name_index(name);
 295         unsigned found = 0;
 296
 297         struct nand_device *nand;
 298         for (nand = nand_devices; NULL != nand; nand = nand->next)
 299         {
 300                 if (!flash_driver_name_matches(nand->controller->name, name))
 301                         continue;
 302                 if (++found < requested)
 303                         continue;
 304                 return nand;
 305         }
 306         return NULL;
 307 }
 308
 309 struct nand_device *get_nand_device_by_num(int num)
 310 {
 311         struct nand_device *p;
 312         int i = 0;
 313
 314         for (p = nand_devices; p; p = p->next)
 315         {
 316                 if (i++ == num)
 317                 {
 318                         return p;
 319                 }
 320         }
 321
 322         return NULL;
 323 }
 324
 325 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 326                 struct nand_device **nand)
 327 {
 328         const char *str = CMD_ARGV[name_index];
 329         *nand = get_nand_device_by_name(str);
 330         if (*nand)
 331                 return ERROR_OK;
 332
 333         unsigned num;
 334         COMMAND_PARSE_NUMBER(uint, str, num);
 335         *nand = get_nand_device_by_num(num);
 336         if (!*nand) {
 337                 command_print(CMD_CTX, "NAND flash device '%s' not found", str);
 338                 return ERROR_INVALID_ARGUMENTS;
 339         }
 340         return ERROR_OK;
 341 }
 342
 343 static int nand_build_bbt(struct nand_device *nand, int first, int last)
 344 {
 345         uint32_t page = 0x0;
 346         int i;
 347         uint8_t oob[6];
 348
 349         if ((first < 0) || (first >= nand->num_blocks))
 350                 first = 0;
 351
 352         if ((last >= nand->num_blocks) || (last == -1))
 353                 last = nand->num_blocks - 1;
 354
 355         for (i = first; i < last; i++)
 356         {
 357                 nand_read_page(nand, page, NULL, 0, oob, 6);
 358
 359                 if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 360                         || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
 361                                 ((nand->page_size == 2048) && (oob[0] != 0xff))))
 362                 {
 363                         LOG_WARNING("bad block: %i", i);
 364                         nand->blocks[i].is_bad = 1;
 365                 }
 366                 else
 367                 {
 368                         nand->blocks[i].is_bad = 0;
 369                 }
 370
 371                 page += (nand->erase_size / nand->page_size);
 372         }
 373
 374         return ERROR_OK;
 375 }
 376
 377 int nand_read_status(struct nand_device *nand, uint8_t *status)
 378 {
 379         if (!nand->device)
 380                 return ERROR_NAND_DEVICE_NOT_PROBED;
 381
 382         /* Send read status command */
 383         nand->controller->command(nand, NAND_CMD_STATUS);
 384
 385         alive_sleep(1);
 386
 387         /* read status */
 388         if (nand->device->options & NAND_BUSWIDTH_16)
 389         {
 390                 uint16_t data;
 391                 nand->controller->read_data(nand, &data);
 392                 *status = data & 0xff;
 393         }
 394         else
 395         {
 396                 nand->controller->read_data(nand, status);
 397         }
 398
 399         return ERROR_OK;
 400 }
 401
 402 static int nand_poll_ready(struct nand_device *nand, int timeout)
 403 {
 404         uint8_t status;
 405
 406         nand->controller->command(nand, NAND_CMD_STATUS);
 407         do {
 408                 if (nand->device->options & NAND_BUSWIDTH_16) {
 409                         uint16_t data;
 410                         nand->controller->read_data(nand, &data);
 411                         status = data & 0xff;
 412                 } else {
 413                         nand->controller->read_data(nand, &status);
 414                 }
 415                 if (status & NAND_STATUS_READY)
 416                         break;
 417                 alive_sleep(1);
 418         } while (timeout--);
 419
 420         return (status & NAND_STATUS_READY) != 0;
 421 }
 422
 423 int nand_probe(struct nand_device *nand)
 424 {
 425         uint8_t manufacturer_id, device_id;
 426         uint8_t id_buff[6];
 427         int retval;
 428         int i;
 429
 430         /* clear device data */
 431         nand->device = NULL;
 432         nand->manufacturer = NULL;
 433
 434         /* clear device parameters */
 435         nand->bus_width = 0;
 436         nand->address_cycles = 0;
 437         nand->page_size = 0;
 438         nand->erase_size = 0;
 439
 440         /* initialize controller (device parameters are zero, use controller default) */
 441         if ((retval = nand->controller->init(nand) != ERROR_OK))
 442         {
 443                 switch (retval)
 444                 {
 445                         case ERROR_NAND_OPERATION_FAILED:
 446                                 LOG_DEBUG("controller initialization failed");
 447                                 return ERROR_NAND_OPERATION_FAILED;
 448                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 449                                 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
 450                                 return ERROR_NAND_OPERATION_FAILED;
 451                         default:
 452                                 LOG_ERROR("BUG: unknown controller initialization failure");
 453                                 return ERROR_NAND_OPERATION_FAILED;
 454                 }
 455         }
 456
 457         nand->controller->command(nand, NAND_CMD_RESET);
 458         nand->controller->reset(nand);
 459
 460         nand->controller->command(nand, NAND_CMD_READID);
 461         nand->controller->address(nand, 0x0);
 462
 463         if (nand->bus_width == 8)
 464         {
 465                 nand->controller->read_data(nand, &manufacturer_id);
 466                 nand->controller->read_data(nand, &device_id);
 467         }
 468         else
 469         {
 470                 uint16_t data_buf;
 471                 nand->controller->read_data(nand, &data_buf);
 472                 manufacturer_id = data_buf & 0xff;
 473                 nand->controller->read_data(nand, &data_buf);
 474                 device_id = data_buf & 0xff;
 475         }
 476
 477         for (i = 0; nand_flash_ids[i].name; i++)
 478         {
 479                 if (nand_flash_ids[i].id == device_id)
 480                 {
 481                         nand->device = &nand_flash_ids[i];
 482                         break;
 483                 }
 484         }
 485
 486         for (i = 0; nand_manuf_ids[i].name; i++)
 487         {
 488                 if (nand_manuf_ids[i].id == manufacturer_id)
 489                 {
 490                         nand->manufacturer = &nand_manuf_ids[i];
 491                         break;
 492                 }
 493         }
 494
 495         if (!nand->manufacturer)
 496         {
 497                 nand->manufacturer = &nand_manuf_ids[0];
 498                 nand->manufacturer->id = manufacturer_id;
 499         }
 500
 501         if (!nand->device)
 502         {
 503                 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 504                         manufacturer_id, device_id);
 505                 return ERROR_NAND_OPERATION_FAILED;
 506         }
 507
 508         LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
 509
 510         /* initialize device parameters */
 511
 512         /* bus width */
 513         if (nand->device->options & NAND_BUSWIDTH_16)
 514                 nand->bus_width = 16;
 515         else
 516                 nand->bus_width = 8;
 517
 518         /* Do we need extended device probe information? */
 519         if (nand->device->page_size == 0 ||
 520             nand->device->erase_size == 0)
 521         {
 522                 if (nand->bus_width == 8)
 523                 {
 524                         nand->controller->read_data(nand, id_buff + 3);
 525                         nand->controller->read_data(nand, id_buff + 4);
 526                         nand->controller->read_data(nand, id_buff + 5);
 527                 }
 528                 else
 529                 {
 530                         uint16_t data_buf;
 531
 532                         nand->controller->read_data(nand, &data_buf);
 533                         id_buff[3] = data_buf;
 534
 535                         nand->controller->read_data(nand, &data_buf);
 536                         id_buff[4] = data_buf;
 537
 538                         nand->controller->read_data(nand, &data_buf);
 539                         id_buff[5] = data_buf >> 8;
 540                 }
 541         }
 542
 543         /* page size */
 544         if (nand->device->page_size == 0)
 545         {
 546                 nand->page_size = 1 << (10 + (id_buff[4] & 3));
 547         }
 548         else if (nand->device->page_size == 256)
 549         {
 550                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
 551                 return ERROR_NAND_OPERATION_FAILED;
 552         }
 553         else
 554         {
 555                 nand->page_size = nand->device->page_size;
 556         }
 557
 558         /* number of address cycles */
 559         if (nand->page_size <= 512)
 560         {
 561                 /* small page devices */
 562                 if (nand->device->chip_size <= 32)
 563                         nand->address_cycles = 3;
 564                 else if (nand->device->chip_size <= 8*1024)
 565                         nand->address_cycles = 4;
 566                 else
 567                 {
 568                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 569                         nand->address_cycles = 5;
 570                 }
 571         }
 572         else
 573         {
 574                 /* large page devices */
 575                 if (nand->device->chip_size <= 128)
 576                         nand->address_cycles = 4;
 577                 else if (nand->device->chip_size <= 32*1024)
 578                         nand->address_cycles = 5;
 579                 else
 580                 {
 581                         LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 582                         nand->address_cycles = 6;
 583                 }
 584         }
 585
 586         /* erase size */
 587         if (nand->device->erase_size == 0)
 588         {
 589                 switch ((id_buff[4] >> 4) & 3) {
 590                 case 0:
 591                         nand->erase_size = 64 << 10;
 592                         break;
 593                 case 1:
 594                         nand->erase_size = 128 << 10;
 595                         break;
 596                 case 2:
 597                         nand->erase_size = 256 << 10;
 598                         break;
 599                 case 3:
 600                         nand->erase_size =512 << 10;
 601                         break;
 602                 }
 603         }
 604         else
 605         {
 606                 nand->erase_size = nand->device->erase_size;
 607         }
 608
 609         /* initialize controller, but leave parameters at the controllers default */
 610         if ((retval = nand->controller->init(nand) != ERROR_OK))
 611         {
 612                 switch (retval)
 613                 {
 614                         case ERROR_NAND_OPERATION_FAILED:
 615                                 LOG_DEBUG("controller initialization failed");
 616                                 return ERROR_NAND_OPERATION_FAILED;
 617                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 618                                 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 619                                         nand->bus_width, nand->address_cycles, nand->page_size);
 620                                 return ERROR_NAND_OPERATION_FAILED;
 621                         default:
 622                                 LOG_ERROR("BUG: unknown controller initialization failure");
 623                                 return ERROR_NAND_OPERATION_FAILED;
 624                 }
 625         }
 626
 627         nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
 628         nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
 629
 630         for (i = 0; i < nand->num_blocks; i++)
 631         {
 632                 nand->blocks[i].size = nand->erase_size;
 633                 nand->blocks[i].offset = i * nand->erase_size;
 634                 nand->blocks[i].is_erased = -1;
 635                 nand->blocks[i].is_bad = -1;
 636         }
 637
 638         return ERROR_OK;
 639 }
 640
 641 static int nand_erase(struct nand_device *nand, int first_block, int last_block)
 642 {
 643         int i;
 644         uint32_t page;
 645         uint8_t status;
 646         int retval;
 647
 648         if (!nand->device)
 649                 return ERROR_NAND_DEVICE_NOT_PROBED;
 650
 651         if ((first_block < 0) || (last_block > nand->num_blocks))
 652                 return ERROR_INVALID_ARGUMENTS;
 653
 654         /* make sure we know if a block is bad before erasing it */
 655         for (i = first_block; i <= last_block; i++)
 656         {
 657                 if (nand->blocks[i].is_bad == -1)
 658                 {
 659                         nand_build_bbt(nand, i, last_block);
 660                         break;
 661                 }
 662         }
 663
 664         for (i = first_block; i <= last_block; i++)
 665         {
 666                 /* Send erase setup command */
 667                 nand->controller->command(nand, NAND_CMD_ERASE1);
 668
 669                 page = i * (nand->erase_size / nand->page_size);
 670
 671                 /* Send page address */
 672                 if (nand->page_size <= 512)
 673                 {
 674                         /* row */
 675                         nand->controller->address(nand, page & 0xff);
 676                         nand->controller->address(nand, (page >> 8) & 0xff);
 677
 678                         /* 3rd cycle only on devices with more than 32 MiB */
 679                         if (nand->address_cycles >= 4)
 680                                 nand->controller->address(nand, (page >> 16) & 0xff);
 681
 682                         /* 4th cycle only on devices with more than 8 GiB */
 683                         if (nand->address_cycles >= 5)
 684                                 nand->controller->address(nand, (page >> 24) & 0xff);
 685                 }
 686                 else
 687                 {
 688                         /* row */
 689                         nand->controller->address(nand, page & 0xff);
 690                         nand->controller->address(nand, (page >> 8) & 0xff);
 691
 692                         /* 3rd cycle only on devices with more than 128 MiB */
 693                         if (nand->address_cycles >= 5)
 694                                 nand->controller->address(nand, (page >> 16) & 0xff);
 695                 }
 696
 697                 /* Send erase confirm command */
 698                 nand->controller->command(nand, NAND_CMD_ERASE2);
 699
 700                 retval = nand->controller->nand_ready ?
 701                                 nand->controller->nand_ready(nand, 1000) :
 702                                 nand_poll_ready(nand, 1000);
 703                 if (!retval) {
 704                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 705                         return ERROR_NAND_OPERATION_TIMEOUT;
 706                 }
 707
 708                 if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
 709                 {
 710                         LOG_ERROR("couldn't read status");
 711                         return ERROR_NAND_OPERATION_FAILED;
 712                 }
 713
 714                 if (status & 0x1)
 715                 {
 716                         LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
 717                                         (nand->blocks[i].is_bad == 1)
 718                                                 ? "bad " : "",
 719                                         i, status);
 720                         /* continue; other blocks might still be erasable */
 721                 }
 722
 723                 nand->blocks[i].is_erased = 1;
 724         }
 725
 726         return ERROR_OK;
 727 }
 728
 729 #if 0
 730 static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
 731 {
 732         uint8_t *page;
 733
 734         if (!nand->device)
 735                 return ERROR_NAND_DEVICE_NOT_PROBED;
 736
 737         if (address % nand->page_size)
 738         {
 739                 LOG_ERROR("reads need to be page aligned");
 740                 return ERROR_NAND_OPERATION_FAILED;
 741         }
 742
 743         page = malloc(nand->page_size);
 744
 745         while (data_size > 0)
 746         {
 747                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 748                 uint32_t page_address;
 749
 750
 751                 page_address = address / nand->page_size;
 752
 753                 nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
 754
 755                 memcpy(data, page, thisrun_size);
 756
 757                 address += thisrun_size;
 758                 data += thisrun_size;
 759                 data_size -= thisrun_size;
 760         }
 761
 762         free(page);
 763
 764         return ERROR_OK;
 765 }
 766
 767 static int nand_write_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
 768 {
 769         uint8_t *page;
 770
 771         if (!nand->device)
 772                 return ERROR_NAND_DEVICE_NOT_PROBED;
 773
 774         if (address % nand->page_size)
 775         {
 776                 LOG_ERROR("writes need to be page aligned");
 777                 return ERROR_NAND_OPERATION_FAILED;
 778         }
 779
 780         page = malloc(nand->page_size);
 781
 782         while (data_size > 0)
 783         {
 784                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 785                 uint32_t page_address;
 786
 787                 memset(page, 0xff, nand->page_size);
 788                 memcpy(page, data, thisrun_size);
 789
 790                 page_address = address / nand->page_size;
 791
 792                 nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
 793
 794                 address += thisrun_size;
 795                 data += thisrun_size;
 796                 data_size -= thisrun_size;
 797         }
 798
 799         free(page);
 800
 801         return ERROR_OK;
 802 }
 803 #endif
 804
 805 int nand_write_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 806 {
 807         uint32_t block;
 808
 809         if (!nand->device)
 810                 return ERROR_NAND_DEVICE_NOT_PROBED;
 811
 812         block = page / (nand->erase_size / nand->page_size);
 813         if (nand->blocks[block].is_erased == 1)
 814                 nand->blocks[block].is_erased = 0;
 815
 816         if (nand->use_raw || nand->controller->write_page == NULL)
 817                 return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
 818         else
 819                 return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
 820 }
 821
 822 static int nand_read_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 823 {
 824         if (!nand->device)
 825                 return ERROR_NAND_DEVICE_NOT_PROBED;
 826
 827         if (nand->use_raw || nand->controller->read_page == NULL)
 828                 return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
 829         else
 830                 return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
 831 }
 832
 833 int nand_read_page_raw(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 834 {
 835         uint32_t i;
 836
 837         if (!nand->device)
 838                 return ERROR_NAND_DEVICE_NOT_PROBED;
 839
 840         if (nand->page_size <= 512)
 841         {
 842                 /* small page device */
 843                 if (data)
 844                         nand->controller->command(nand, NAND_CMD_READ0);
 845                 else
 846                         nand->controller->command(nand, NAND_CMD_READOOB);
 847
 848                 /* column (always 0, we start at the beginning of a page/OOB area) */
 849                 nand->controller->address(nand, 0x0);
 850
 851                 /* row */
 852                 nand->controller->address(nand, page & 0xff);
 853                 nand->controller->address(nand, (page >> 8) & 0xff);
 854
 855                 /* 4th cycle only on devices with more than 32 MiB */
 856                 if (nand->address_cycles >= 4)
 857                         nand->controller->address(nand, (page >> 16) & 0xff);
 858
 859                 /* 5th cycle only on devices with more than 8 GiB */
 860                 if (nand->address_cycles >= 5)
 861                         nand->controller->address(nand, (page >> 24) & 0xff);
 862         }
 863         else
 864         {
 865                 /* large page device */
 866                 nand->controller->command(nand, NAND_CMD_READ0);
 867
 868                 /* column (0 when we start at the beginning of a page,
 869                  * or 2048 for the beginning of OOB area)
 870                  */
 871                 nand->controller->address(nand, 0x0);
 872                 if (data)
 873                         nand->controller->address(nand, 0x0);
 874                 else
 875                         nand->controller->address(nand, 0x8);
 876
 877                 /* row */
 878                 nand->controller->address(nand, page & 0xff);
 879                 nand->controller->address(nand, (page >> 8) & 0xff);
 880
 881                 /* 5th cycle only on devices with more than 128 MiB */
 882                 if (nand->address_cycles >= 5)
 883                         nand->controller->address(nand, (page >> 16) & 0xff);
 884
 885                 /* large page devices need a start command */
 886                 nand->controller->command(nand, NAND_CMD_READSTART);
 887         }
 888
 889         if (nand->controller->nand_ready) {
 890                 if (!nand->controller->nand_ready(nand, 100))
 891                         return ERROR_NAND_OPERATION_TIMEOUT;
 892         } else {
 893                 alive_sleep(1);
 894         }
 895
 896         if (data)
 897         {
 898                 if (nand->controller->read_block_data != NULL)
 899                         (nand->controller->read_block_data)(nand, data, data_size);
 900                 else
 901                 {
 902                         for (i = 0; i < data_size;)
 903                         {
 904                                 if (nand->device->options & NAND_BUSWIDTH_16)
 905                                 {
 906                                         nand->controller->read_data(nand, data);
 907                                         data += 2;
 908                                         i += 2;
 909                                 }
 910                                 else
 911                                 {
 912                                         nand->controller->read_data(nand, data);
 913                                         data += 1;
 914                                         i += 1;
 915                                 }
 916                         }
 917                 }
 918         }
 919
 920         if (oob)
 921         {
 922                 if (nand->controller->read_block_data != NULL)
 923                         (nand->controller->read_block_data)(nand, oob, oob_size);
 924                 else
 925                 {
 926                         for (i = 0; i < oob_size;)
 927                         {
 928                                 if (nand->device->options & NAND_BUSWIDTH_16)
 929                                 {
 930                                         nand->controller->read_data(nand, oob);
 931                                         oob += 2;
 932                                         i += 2;
 933                                 }
 934                                 else
 935                                 {
 936                                         nand->controller->read_data(nand, oob);
 937                                         oob += 1;
 938                                         i += 1;
 939                                 }
 940                         }
 941                 }
 942         }
 943
 944         return ERROR_OK;
 945 }
 946
 947 int nand_write_page_raw(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 948 {
 949         uint32_t i;
 950         int retval;
 951         uint8_t status;
 952
 953         if (!nand->device)
 954                 return ERROR_NAND_DEVICE_NOT_PROBED;
 955
 956         nand->controller->command(nand, NAND_CMD_SEQIN);
 957
 958         if (nand->page_size <= 512)
 959         {
 960                 /* column (always 0, we start at the beginning of a page/OOB area) */
 961                 nand->controller->address(nand, 0x0);
 962
 963                 /* row */
 964                 nand->controller->address(nand, page & 0xff);
 965                 nand->controller->address(nand, (page >> 8) & 0xff);
 966
 967                 /* 4th cycle only on devices with more than 32 MiB */
 968                 if (nand->address_cycles >= 4)
 969                         nand->controller->address(nand, (page >> 16) & 0xff);
 970
 971                 /* 5th cycle only on devices with more than 8 GiB */
 972                 if (nand->address_cycles >= 5)
 973                         nand->controller->address(nand, (page >> 24) & 0xff);
 974         }
 975         else
 976         {
 977                 /* column (0 when we start at the beginning of a page,
 978                  * or 2048 for the beginning of OOB area)
 979                  */
 980                 nand->controller->address(nand, 0x0);
 981                 if (data)
 982                         nand->controller->address(nand, 0x0);
 983                 else
 984                         nand->controller->address(nand, 0x8);
 985
 986                 /* row */
 987                 nand->controller->address(nand, page & 0xff);
 988                 nand->controller->address(nand, (page >> 8) & 0xff);
 989
 990                 /* 5th cycle only on devices with more than 128 MiB */
 991                 if (nand->address_cycles >= 5)
 992                         nand->controller->address(nand, (page >> 16) & 0xff);
 993         }
 994
 995         if (data)
 996         {
 997                 if (nand->controller->write_block_data != NULL)
 998                         (nand->controller->write_block_data)(nand, data, data_size);
 999                 else
1000                 {
1001                         for (i = 0; i < data_size;)
1002                         {
1003                                 if (nand->device->options & NAND_BUSWIDTH_16)
1004                                 {
1005                                         uint16_t data_buf = le_to_h_u16(data);
1006                                         nand->controller->write_data(nand, data_buf);
1007                                         data += 2;
1008                                         i += 2;
1009                                 }
1010                                 else
1011                                 {
1012                                         nand->controller->write_data(nand, *data);
1013                                         data += 1;
1014                                         i += 1;
1015                                 }
1016                         }
1017                 }
1018         }
1019
1020         if (oob)
1021         {
1022                 if (nand->controller->write_block_data != NULL)
1023                         (nand->controller->write_block_data)(nand, oob, oob_size);
1024                 else
1025                 {
1026                         for (i = 0; i < oob_size;)
1027                         {
1028                                 if (nand->device->options & NAND_BUSWIDTH_16)
1029                                 {
1030                                         uint16_t oob_buf = le_to_h_u16(data);
1031                                         nand->controller->write_data(nand, oob_buf);
1032                                         oob += 2;
1033                                         i += 2;
1034                                 }
1035                                 else
1036                                 {
1037                                         nand->controller->write_data(nand, *oob);
1038                                         oob += 1;
1039                                         i += 1;
1040                                 }
1041                         }
1042                 }
1043         }
1044
1045         nand->controller->command(nand, NAND_CMD_PAGEPROG);
1046
1047         retval = nand->controller->nand_ready ?
1048                         nand->controller->nand_ready(nand, 100) :
1049                         nand_poll_ready(nand, 100);
1050         if (!retval)
1051                 return ERROR_NAND_OPERATION_TIMEOUT;
1052
1053         if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
1054         {
1055                 LOG_ERROR("couldn't read status");
1056                 return ERROR_NAND_OPERATION_FAILED;
1057         }
1058
1059         if (status & NAND_STATUS_FAIL)
1060         {
1061                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
1062                 return ERROR_NAND_OPERATION_FAILED;
1063         }
1064
1065         return ERROR_OK;
1066 }
1067
1068 COMMAND_HANDLER(handle_nand_list_command)
1069 {
1070         struct nand_device *p;
1071         int i;
1072
1073         if (!nand_devices)
1074         {
1075                 command_print(CMD_CTX, "no NAND flash devices configured");
1076                 return ERROR_OK;
1077         }
1078
1079         for (p = nand_devices, i = 0; p; p = p->next, i++)
1080         {
1081                 if (p->device)
1082                         command_print(CMD_CTX, "#%i: %s (%s) "
1083                                 "pagesize: %i, buswidth: %i,\n\t"
1084                                 "blocksize: %i, blocks: %i",
1085                                 i, p->device->name, p->manufacturer->name,
1086                                 p->page_size, p->bus_width,
1087                                 p->erase_size, p->num_blocks);
1088                 else
1089                         command_print(CMD_CTX, "#%i: not probed", i);
1090         }
1091
1092         return ERROR_OK;
1093 }
1094
1095 COMMAND_HANDLER(handle_nand_info_command)
1096 {
1097         int i = 0;
1098         int j = 0;
1099         int first = -1;
1100         int last = -1;
1101
1102         struct nand_device *p;
1103         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1104         if (ERROR_OK != retval)
1105                 return retval;
1106
1107         switch (CMD_ARGC) {
1108         default:
1109                 return ERROR_COMMAND_SYNTAX_ERROR;
1110         case 1:
1111                 first = 0;
1112                 last = INT32_MAX;
1113                 break;
1114         case 2:
1115                 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], i);
1116                 first = last = i;
1117                 i = 0;
1118                 break;
1119         case 3:
1120                 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], first);
1121                 COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], last);
1122                 break;
1123         }
1124
1125         if (NULL == p->device)
1126         {
1127                 command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
1128                 return ERROR_OK;
1129         }
1130
1131         if (first >= p->num_blocks)
1132                 first = p->num_blocks - 1;
1133
1134         if (last >= p->num_blocks)
1135                 last = p->num_blocks - 1;
1136
1137         command_print(CMD_CTX, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1138                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1139
1140         for (j = first; j <= last; j++)
1141         {
1142                 char *erase_state, *bad_state;
1143
1144                 if (p->blocks[j].is_erased == 0)
1145                         erase_state = "not erased";
1146                 else if (p->blocks[j].is_erased == 1)
1147                         erase_state = "erased";
1148                 else
1149                         erase_state = "erase state unknown";
1150
1151                 if (p->blocks[j].is_bad == 0)
1152                         bad_state = "";
1153                 else if (p->blocks[j].is_bad == 1)
1154                         bad_state = " (marked bad)";
1155                 else
1156                         bad_state = " (block condition unknown)";
1157
1158                 command_print(CMD_CTX,
1159                               "\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s",
1160                               j,
1161                               p->blocks[j].offset,
1162                               p->blocks[j].size / 1024,
1163                               erase_state,
1164                               bad_state);
1165         }
1166
1167         return ERROR_OK;
1168 }
1169
1170 COMMAND_HANDLER(handle_nand_probe_command)
1171 {
1172         if (CMD_ARGC != 1)
1173         {
1174                 return ERROR_COMMAND_SYNTAX_ERROR;
1175         }
1176
1177         struct nand_device *p;
1178         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1179         if (ERROR_OK != retval)
1180                 return retval;
1181
1182         if ((retval = nand_probe(p)) == ERROR_OK)
1183         {
1184                 command_print(CMD_CTX, "NAND flash device '%s' found", p->device->name);
1185         }
1186         else if (retval == ERROR_NAND_OPERATION_FAILED)
1187         {
1188                 command_print(CMD_CTX, "probing failed for NAND flash device");
1189         }
1190         else
1191         {
1192                 command_print(CMD_CTX, "unknown error when probing NAND flash device");
1193         }
1194
1195         return ERROR_OK;
1196 }
1197
1198 COMMAND_HANDLER(handle_nand_erase_command)
1199 {
1200         if (CMD_ARGC != 1 && CMD_ARGC != 3)
1201         {
1202                 return ERROR_COMMAND_SYNTAX_ERROR;
1203
1204         }
1205
1206         struct nand_device *p;
1207         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1208         if (ERROR_OK != retval)
1209                 return retval;
1210
1211         unsigned long offset;
1212         unsigned long length;
1213
1214         /* erase specified part of the chip; or else everything */
1215         if (CMD_ARGC == 3) {
1216                 unsigned long size = p->erase_size * p->num_blocks;
1217
1218                 COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], offset);
1219                 if ((offset % p->erase_size) != 0 || offset >= size)
1220                         return ERROR_INVALID_ARGUMENTS;
1221
1222                 COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], length);
1223                 if ((length == 0) || (length % p->erase_size) != 0
1224                                 || (length + offset) > size)
1225                         return ERROR_INVALID_ARGUMENTS;
1226
1227                 offset /= p->erase_size;
1228                 length /= p->erase_size;
1229         } else {
1230                 offset = 0;
1231                 length = p->num_blocks;
1232         }
1233
1234         retval = nand_erase(p, offset, offset + length - 1);
1235         if (retval == ERROR_OK)
1236         {
1237                 command_print(CMD_CTX, "erased blocks %lu to %lu "
1238                                 "on NAND flash device #%s '%s'",
1239                                 offset, offset + length,
1240                                 CMD_ARGV[0], p->device->name);
1241         }
1242         else if (retval == ERROR_NAND_OPERATION_FAILED)
1243         {
1244                 command_print(CMD_CTX, "erase failed");
1245         }
1246         else
1247         {
1248                 command_print(CMD_CTX, "unknown error when erasing NAND flash device");
1249         }
1250
1251         return ERROR_OK;
1252 }
1253
1254 COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
1255 {
1256         int first = -1;
1257         int last = -1;
1258
1259         if ((CMD_ARGC < 1) || (CMD_ARGC > 3) || (CMD_ARGC == 2))
1260         {
1261                 return ERROR_COMMAND_SYNTAX_ERROR;
1262
1263         }
1264
1265         struct nand_device *p;
1266         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1267         if (ERROR_OK != retval)
1268                 return retval;
1269
1270         if (CMD_ARGC == 3)
1271         {
1272                 unsigned long offset;
1273                 unsigned long length;
1274
1275                 COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], offset);
1276                 if (offset % p->erase_size)
1277                         return ERROR_INVALID_ARGUMENTS;
1278                 offset /= p->erase_size;
1279
1280                 COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], length);
1281                 if (length % p->erase_size)
1282                         return ERROR_INVALID_ARGUMENTS;
1283
1284                 length -= 1;
1285                 length /= p->erase_size;
1286
1287                 first = offset;
1288                 last = offset + length;
1289         }
1290
1291         retval = nand_build_bbt(p, first, last);
1292         if (retval == ERROR_OK)
1293         {
1294                 command_print(CMD_CTX, "checked NAND flash device for bad blocks, "
1295                                 "use \"nand info\" command to list blocks");
1296         }
1297         else if (retval == ERROR_NAND_OPERATION_FAILED)
1298         {
1299                 command_print(CMD_CTX, "error when checking for bad blocks on "
1300                                 "NAND flash device");
1301         }
1302         else
1303         {
1304                 command_print(CMD_CTX, "unknown error when checking for bad "
1305                                 "blocks on NAND flash device");
1306         }
1307
1308         return ERROR_OK;
1309 }
1310
1311 struct nand_fileio_state {
1312         uint32_t address;
1313         uint32_t size;
1314
1315         uint8_t *page;
1316         uint32_t page_size;
1317
1318         enum oob_formats oob_format;
1319         uint8_t *oob;
1320         uint32_t oob_size;
1321
1322         const int *eccpos;
1323
1324         bool file_opened;
1325         struct fileio fileio;
1326
1327         struct duration bench;
1328 };
1329
1330 static void nand_fileio_init(struct nand_fileio_state *state)
1331 {
1332         memset(state, 0, sizeof(*state));
1333         state->oob_format = NAND_OOB_NONE;
1334 }
1335
1336 static int nand_fileio_start(struct command_context *cmd_ctx,
1337                 struct nand_device *nand, const char *filename, int filemode,
1338                 struct nand_fileio_state *state)
1339 {
1340         if (state->address % nand->page_size)
1341         {
1342                 command_print(cmd_ctx, "only page-aligned addresses are supported");
1343                 return ERROR_COMMAND_SYNTAX_ERROR;
1344         }
1345
1346         duration_start(&state->bench);
1347
1348         if (NULL != filename)
1349         {
1350                 int retval = fileio_open(&state->fileio, filename, filemode, FILEIO_BINARY);
1351                 if (ERROR_OK != retval)
1352                 {
1353                         const char *msg = (FILEIO_READ == filemode) ? "read" : "write";
1354                         command_print(cmd_ctx, "failed to open '%s' for %s access",
1355                                         filename, msg);
1356                         return retval;
1357                 }
1358                 state->file_opened = true;
1359         }
1360
1361         if (!(state->oob_format & NAND_OOB_ONLY))
1362         {
1363                 state->page_size = nand->page_size;
1364                 state->page = malloc(nand->page_size);
1365         }
1366
1367         if (state->oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW))
1368         {
1369                 if (nand->page_size == 512)
1370                 {
1371                         state->oob_size = 16;
1372                         state->eccpos = nand_oob_16.eccpos;
1373                 }
1374                 else if (nand->page_size == 2048)
1375                 {
1376                         state->oob_size = 64;
1377                         state->eccpos = nand_oob_64.eccpos;
1378                 }
1379                 state->oob = malloc(state->oob_size);
1380         }
1381
1382         return ERROR_OK;
1383 }
1384 static int nand_fileio_cleanup(struct nand_fileio_state *state)
1385 {
1386         if (state->file_opened)
1387                 fileio_close(&state->fileio);
1388
1389         if (state->oob)
1390         {
1391                 free(state->oob);
1392                 state->oob = NULL;
1393         }
1394         if (state->page)
1395         {
1396                 free(state->page);
1397                 state->page = NULL;
1398         }
1399         return ERROR_OK;
1400 }
1401 static int nand_fileio_finish(struct nand_fileio_state *state)
1402 {
1403         nand_fileio_cleanup(state);
1404         return duration_measure(&state->bench);
1405 }
1406
1407 static COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
1408                 struct nand_device **dev, enum fileio_access filemode,
1409                 bool need_size, bool sw_ecc)
1410 {
1411         nand_fileio_init(state);
1412
1413         unsigned minargs = need_size ? 4 : 3;
1414         if (CMD_ARGC < minargs)
1415                 return ERROR_COMMAND_SYNTAX_ERROR;
1416
1417         struct nand_device *nand;
1418         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &nand);
1419         if (ERROR_OK != retval)
1420                 return retval;
1421
1422         if (NULL == nand->device)
1423         {
1424                 command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
1425                 return ERROR_OK;
1426         }
1427
1428         COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], state->address);
1429         if (need_size)
1430         {
1431                         COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], state->size);
1432                         if (state->size % nand->page_size)
1433                         {
1434                                 command_print(CMD_CTX, "only page-aligned sizes are supported");
1435                                 return ERROR_COMMAND_SYNTAX_ERROR;
1436                         }
1437         }
1438
1439         if (CMD_ARGC > minargs)
1440         {
1441                 for (unsigned i = minargs; i < CMD_ARGC; i++)
1442                 {
1443                         if (!strcmp(CMD_ARGV[i], "oob_raw"))
1444                                 state->oob_format |= NAND_OOB_RAW;
1445                         else if (!strcmp(CMD_ARGV[i], "oob_only"))
1446                                 state->oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1447                         else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc"))
1448                                 state->oob_format |= NAND_OOB_SW_ECC;
1449                         else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc_kw"))
1450                                 state->oob_format |= NAND_OOB_SW_ECC_KW;
1451                         else
1452                         {
1453                                 command_print(CMD_CTX, "unknown option: %s", CMD_ARGV[i]);
1454                                 return ERROR_COMMAND_SYNTAX_ERROR;
1455                         }
1456                 }
1457         }
1458
1459         retval = nand_fileio_start(CMD_CTX, nand, CMD_ARGV[1], filemode, state);
1460         if (ERROR_OK != retval)
1461                 return retval;
1462
1463         if (!need_size)
1464                 state->size = state->fileio.size;
1465
1466         *dev = nand;
1467
1468         return ERROR_OK;
1469 }
1470
1471 /**
1472  * @returns If no error occurred, returns number of bytes consumed;
1473  * otherwise, returns a negative error code.)
1474  */
1475 static int nand_fileio_read(struct nand_device *nand,
1476                 struct nand_fileio_state *s)
1477 {
1478         size_t total_read = 0;
1479         size_t one_read;
1480
1481         if (NULL != s->page)
1482         {
1483                 fileio_read(&s->fileio, s->page_size, s->page, &one_read);
1484                 if (one_read < s->page_size)
1485                         memset(s->page + one_read, 0xff, s->page_size - one_read);
1486                 total_read += one_read;
1487         }
1488
1489         if (s->oob_format & NAND_OOB_SW_ECC)
1490         {
1491                 uint8_t ecc[3];
1492                 memset(s->oob, 0xff, s->oob_size);
1493                 for (uint32_t i = 0, j = 0; i < s->page_size; i += 256)
1494                 {
1495                         nand_calculate_ecc(nand, s->page + i, ecc);
1496                         s->oob[s->eccpos[j++]] = ecc[0];
1497                         s->oob[s->eccpos[j++]] = ecc[1];
1498                         s->oob[s->eccpos[j++]] = ecc[2];
1499                 }
1500         }
1501         else if (s->oob_format & NAND_OOB_SW_ECC_KW)
1502         {
1503                 /*
1504                  * In this case eccpos is not used as
1505                  * the ECC data is always stored contigously
1506                  * at the end of the OOB area.  It consists
1507                  * of 10 bytes per 512-byte data block.
1508                  */
1509                 uint8_t *ecc = s->oob + s->oob_size - s->page_size / 512 * 10;
1510                 memset(s->oob, 0xff, s->oob_size);
1511                 for (uint32_t i = 0; i < s->page_size; i += 512)
1512                 {
1513                         nand_calculate_ecc_kw(nand, s->page + i, ecc);
1514                         ecc += 10;
1515                 }
1516         }
1517         else if (NULL != s->oob)
1518         {
1519                 fileio_read(&s->fileio, s->oob_size, s->oob, &one_read);
1520                 if (one_read < s->oob_size)
1521                         memset(s->oob + one_read, 0xff, s->oob_size - one_read);
1522                 total_read += one_read;
1523         }
1524         return total_read;
1525 }
1526
1527 COMMAND_HANDLER(handle_nand_write_command)
1528 {
1529         struct nand_device *nand = NULL;
1530         struct nand_fileio_state s;
1531         int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
1532                         &s, &nand, FILEIO_READ, false, true);
1533         if (ERROR_OK != retval)
1534                 return retval;
1535
1536         uint32_t total_bytes = s.size;
1537         while (s.size > 0)
1538         {
1539                 int bytes_read = nand_fileio_read(nand, &s);
1540                 if (bytes_read <= 0)
1541                 {
1542                         command_print(CMD_CTX, "error while reading file");
1543                         return nand_fileio_cleanup(&s);
1544                 }
1545                 s.size -= bytes_read;
1546
1547                 retval = nand_write_page(nand, s.address / nand->page_size,
1548                                 s.page, s.page_size, s.oob, s.oob_size);
1549                 if (ERROR_OK != retval)
1550                 {
1551                         command_print(CMD_CTX, "failed writing file %s "
1552                                 "to NAND flash %s at offset 0x%8.8" PRIx32,
1553                                 CMD_ARGV[1], CMD_ARGV[0], s.address);
1554                         return nand_fileio_cleanup(&s);
1555                 }
1556                 s.address += s.page_size;
1557         }
1558
1559         if (nand_fileio_finish(&s))
1560         {
1561                 command_print(CMD_CTX, "wrote file %s to NAND flash %s up to "
1562                                 "offset 0x%8.8" PRIx32 " in %fs (%0.3f kb/s)",
1563                                 CMD_ARGV[1], CMD_ARGV[0], s.address, duration_elapsed(&s.bench),
1564                                 duration_kbps(&s.bench, total_bytes));
1565         }
1566         return ERROR_OK;
1567 }
1568
1569 COMMAND_HANDLER(handle_nand_verify_command)
1570 {
1571         struct nand_device *nand = NULL;
1572         struct nand_fileio_state file;
1573         int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
1574                         &file, &nand, FILEIO_READ, false, true);
1575         if (ERROR_OK != retval)
1576                 return retval;
1577
1578         struct nand_fileio_state dev;
1579         nand_fileio_init(&dev);
1580         dev.address = file.address;
1581         dev.size = file.size;
1582         dev.oob_format = file.oob_format;
1583         retval = nand_fileio_start(CMD_CTX, nand, NULL, FILEIO_NONE, &dev);
1584         if (ERROR_OK != retval)
1585                 return retval;
1586
1587         while (file.size > 0)
1588         {
1589                 int retval = nand_read_page(nand, dev.address / dev.page_size,
1590                                 dev.page, dev.page_size, dev.oob, dev.oob_size);
1591                 if (ERROR_OK != retval)
1592                 {
1593                         command_print(CMD_CTX, "reading NAND flash page failed");
1594                         nand_fileio_cleanup(&dev);
1595                         return nand_fileio_cleanup(&file);
1596                 }
1597
1598                 int bytes_read = nand_fileio_read(nand, &file);
1599                 if (bytes_read <= 0)
1600                 {
1601                         command_print(CMD_CTX, "error while reading file");
1602                         nand_fileio_cleanup(&dev);
1603                         return nand_fileio_cleanup(&file);
1604                 }
1605
1606                 if ((dev.page && memcmp(dev.page, file.page, dev.page_size)) ||
1607                     (dev.oob && memcmp(dev.oob, file.oob, dev.oob_size)) )
1608                 {
1609                         command_print(CMD_CTX, "NAND flash contents differ "
1610                                                 "at 0x%8.8" PRIx32, dev.address);
1611                         nand_fileio_cleanup(&dev);
1612                         return nand_fileio_cleanup(&file);
1613                 }
1614
1615                 file.size -= bytes_read;
1616                 file.address += nand->page_size;
1617         }
1618
1619         if (nand_fileio_finish(&file) == ERROR_OK)
1620         {
1621                 command_print(CMD_CTX, "verified file %s in NAND flash %s "
1622                                 "up to offset 0x%8.8" PRIx32 " in %fs (%0.3f kb/s)",
1623                                 CMD_ARGV[1], CMD_ARGV[0], dev.address, duration_elapsed(&file.bench),
1624                                 duration_kbps(&file.bench, dev.size));
1625         }
1626
1627         return nand_fileio_cleanup(&dev);
1628 }
1629
1630 COMMAND_HANDLER(handle_nand_dump_command)
1631 {
1632         struct nand_device *nand = NULL;
1633         struct nand_fileio_state s;
1634         int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
1635                         &s, &nand, FILEIO_WRITE, true, false);
1636         if (ERROR_OK != retval)
1637                 return retval;
1638
1639         while (s.size > 0)
1640         {
1641                 size_t size_written;
1642                 int retval = nand_read_page(nand, s.address / nand->page_size,
1643                                 s.page, s.page_size, s.oob, s.oob_size);
1644                 if (ERROR_OK != retval)
1645                 {
1646                         command_print(CMD_CTX, "reading NAND flash page failed");
1647                         return nand_fileio_cleanup(&s);
1648                 }
1649
1650                 if (NULL != s.page)
1651                         fileio_write(&s.fileio, s.page_size, s.page, &size_written);
1652
1653                 if (NULL != s.oob)
1654                         fileio_write(&s.fileio, s.oob_size, s.oob, &size_written);
1655
1656                 s.size -= nand->page_size;
1657                 s.address += nand->page_size;
1658         }
1659
1660         if (nand_fileio_finish(&s) == ERROR_OK)
1661         {
1662                 command_print(CMD_CTX, "dumped %zu bytes in %fs (%0.3f kb/s)",
1663                                 s.fileio.size, duration_elapsed(&s.bench),
1664                                 duration_kbps(&s.bench, s.fileio.size));
1665         }
1666         return ERROR_OK;
1667 }
1668
1669 COMMAND_HANDLER(handle_nand_raw_access_command)
1670 {
1671         if ((CMD_ARGC < 1) || (CMD_ARGC > 2))
1672         {
1673                 return ERROR_COMMAND_SYNTAX_ERROR;
1674         }
1675
1676         struct nand_device *p;
1677         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1678         if (ERROR_OK != retval)
1679                 return retval;
1680
1681         if (NULL == p->device)
1682         {
1683                 command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
1684                 return ERROR_OK;
1685         }
1686
1687         if (CMD_ARGC == 2)
1688                 COMMAND_PARSE_ENABLE(CMD_ARGV[1], p->use_raw);
1689
1690         const char *msg = p->use_raw ? "enabled" : "disabled";
1691         command_print(CMD_CTX, "raw access is %s", msg);
1692
1693         return ERROR_OK;
1694 }
1695
1696 int nand_init(struct command_context *cmd_ctx)
1697 {
1698         if (!nand_devices)
1699                 return ERROR_OK;
1700
1701         register_command(cmd_ctx, nand_cmd, "list",
1702                         handle_nand_list_command, COMMAND_EXEC,
1703                         "list configured NAND flash devices");
1704         register_command(cmd_ctx, nand_cmd, "info",
1705                         handle_nand_info_command, COMMAND_EXEC,
1706                         "print info about NAND flash device <num>");
1707         register_command(cmd_ctx, nand_cmd, "probe",
1708                         handle_nand_probe_command, COMMAND_EXEC,
1709                         "identify NAND flash device <num>");
1710
1711         register_command(cmd_ctx, nand_cmd, "check_bad_blocks",
1712                         handle_nand_check_bad_blocks_command, COMMAND_EXEC,
1713                         "check NAND flash device <num> for bad blocks [<offset> <length>]");
1714         register_command(cmd_ctx, nand_cmd, "erase",
1715                         handle_nand_erase_command, COMMAND_EXEC,
1716                         "erase blocks on NAND flash device <num> [<offset> <length>]");
1717         register_command(cmd_ctx, nand_cmd, "dump",
1718                         handle_nand_dump_command, COMMAND_EXEC,
1719                         "dump from NAND flash device <num> <filename> "
1720                          "<offset> <length> [oob_raw | oob_only]");
1721         register_command(cmd_ctx, nand_cmd, "verify",
1722                         &handle_nand_verify_command, COMMAND_EXEC,
1723                         "verify NAND flash device <num> <filename> <offset> "
1724                         "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]");
1725         register_command(cmd_ctx, nand_cmd, "write",
1726                         handle_nand_write_command, COMMAND_EXEC,
1727                         "write to NAND flash device <num> <filename> <offset> "
1728                         "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]");
1729
1730         register_command(cmd_ctx, nand_cmd, "raw_access",
1731                         handle_nand_raw_access_command, COMMAND_EXEC,
1732                         "raw access to NAND flash device <num> ['enable'|'disable']");
1733
1734         return ERROR_OK;
1735 }