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   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
   6  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program; if not, write to the                         *
  20  *   Free Software Foundation, Inc.,                                       *
  21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  22  ***************************************************************************/
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "replacements.h"
  28 #include "log.h"
  29
  30 #include <stdlib.h>
  31 #include <string.h>
  32 #include <inttypes.h>
  33
  34 #include <errno.h>
  35
  36 #include "nand.h"
  37 #include "flash.h"
  38 #include "time_support.h"
  39 #include "fileio.h"
  40 #include "image.h"
  41
  42 int nand_register_commands(struct command_context_s *cmd_ctx);
  43 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  44 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  45 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  46 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  47 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  48 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  49 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  50 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  51
  52 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  53
  54 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  55 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  56 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
  57
  58 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  59 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  60
  61 /* NAND flash controller
  62  */
  63 extern nand_flash_controller_t lpc3180_nand_controller;
  64 extern nand_flash_controller_t orion_nand_controller;
  65 extern nand_flash_controller_t s3c2410_nand_controller;
  66 extern nand_flash_controller_t s3c2412_nand_controller;
  67 extern nand_flash_controller_t s3c2440_nand_controller;
  68 extern nand_flash_controller_t s3c2443_nand_controller;
  69
  70 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
  71
  72 nand_flash_controller_t *nand_flash_controllers[] =
  73 {
  74         &lpc3180_nand_controller,
  75         &orion_nand_controller,
  76         &s3c2410_nand_controller,
  77         &s3c2412_nand_controller,
  78         &s3c2440_nand_controller,
  79         &s3c2443_nand_controller,
  80 /*      &boundary_scan_nand_controller, */
  81         NULL
  82 };
  83
  84 /* configured NAND devices and NAND Flash command handler */
  85 nand_device_t *nand_devices = NULL;
  86 static command_t *nand_cmd;
  87
  88 /*      Chip ID list
  89  *
  90  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  91  *      options
  92  *
  93  *      Pagesize; 0, 256, 512
  94  *      0       get this information from the extended chip ID
  95  *      256     256 Byte page size
  96  *      512     512 Byte page size
  97  */
  98 nand_info_t nand_flash_ids[] =
  99 {
 100         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
 101         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
 102         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
 103         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
 104         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
 105         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
 106         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
 107         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
 108         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
 109         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
 110
 111         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
 112         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
 113         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 114         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 115
 116         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
 117         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
 118         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 119         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 120
 121         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
 122         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
 123         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 124         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 125
 126         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
 127         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
 128         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 129         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 130
 131         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
 132         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
 133         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
 134         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 135         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 136         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 137         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 138
 139         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
 140
 141         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
 142         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
 143         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
 144         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
 145
 146         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
 147         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
 148         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
 149         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
 150
 151         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
 152         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
 153         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
 154         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
 155
 156         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
 157         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
 158         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
 159         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
 160
 161         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
 162         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
 163         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
 164         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
 165
 166         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
 167         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
 168         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
 169         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
 170
 171         {NULL, 0,}
 172 };
 173
 174 /* Manufacturer ID list
 175  */
 176 nand_manufacturer_t nand_manuf_ids[] =
 177 {
 178         {0x0, "unknown"},
 179         {NAND_MFR_TOSHIBA, "Toshiba"},
 180         {NAND_MFR_SAMSUNG, "Samsung"},
 181         {NAND_MFR_FUJITSU, "Fujitsu"},
 182         {NAND_MFR_NATIONAL, "National"},
 183         {NAND_MFR_RENESAS, "Renesas"},
 184         {NAND_MFR_STMICRO, "ST Micro"},
 185         {NAND_MFR_HYNIX, "Hynix"},
 186         {0x0, NULL},
 187 };
 188
 189 /* nand device <nand_controller> [controller options]
 190  */
 191 int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 192 {
 193         int i;
 194         int retval;
 195
 196         if (argc < 1)
 197         {
 198                 LOG_WARNING("incomplete flash device nand configuration");
 199                 return ERROR_FLASH_BANK_INVALID;
 200         }
 201
 202         for (i = 0; nand_flash_controllers[i]; i++)
 203         {
 204                 nand_device_t *p, *c;
 205
 206                 if (strcmp(args[0], nand_flash_controllers[i]->name) == 0)
 207                 {
 208                         /* register flash specific commands */
 209                         if ((retval = nand_flash_controllers[i]->register_commands(cmd_ctx)) != ERROR_OK)
 210                         {
 211                                 LOG_ERROR("couldn't register '%s' commands", args[0]);
 212                                 return retval;
 213                         }
 214
 215                         c = malloc(sizeof(nand_device_t));
 216
 217                         c->controller = nand_flash_controllers[i];
 218                         c->controller_priv = NULL;
 219                         c->manufacturer = NULL;
 220                         c->device = NULL;
 221                         c->bus_width = 0;
 222                         c->address_cycles = 0;
 223                         c->page_size = 0;
 224                         c->use_raw = 0;
 225                         c->next = NULL;
 226
 227                         if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK)
 228                         {
 229                                 LOG_ERROR("'%s' driver rejected nand flash", c->controller->name);
 230                                 free(c);
 231                                 return ERROR_OK;
 232                         }
 233
 234                         /* put NAND device in linked list */
 235                         if (nand_devices)
 236                         {
 237                                 /* find last flash device */
 238                                 for (p = nand_devices; p && p->next; p = p->next);
 239                                 if (p)
 240                                         p->next = c;
 241                         }
 242                         else
 243                         {
 244                                 nand_devices = c;
 245                         }
 246
 247                         return ERROR_OK;
 248                 }
 249         }
 250
 251         /* no valid NAND controller was found (i.e. the configuration option,
 252          * didn't match one of the compiled-in controllers)
 253          */
 254         LOG_ERROR("No valid NAND flash controller found (%s)", args[0]);
 255         LOG_ERROR("compiled-in NAND flash controllers:");
 256         for (i = 0; nand_flash_controllers[i]; i++)
 257         {
 258                 LOG_ERROR("%i: %s", i, nand_flash_controllers[i]->name);
 259         }
 260
 261         return ERROR_OK;
 262 }
 263
 264 int nand_register_commands(struct command_context_s *cmd_ctx)
 265 {
 266         nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, "NAND specific commands");
 267
 268         register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL);
 269
 270         return ERROR_OK;
 271 }
 272
 273 int nand_init(struct command_context_s *cmd_ctx)
 274 {
 275         if (nand_devices)
 276         {
 277                 register_command(cmd_ctx, nand_cmd, "list", handle_nand_list_command, COMMAND_EXEC,
 278                                                  "list configured NAND flash devices");
 279                 register_command(cmd_ctx, nand_cmd, "info", handle_nand_info_command, COMMAND_EXEC,
 280                                                  "print info about NAND flash device <num>");
 281                 register_command(cmd_ctx, nand_cmd, "probe", handle_nand_probe_command, COMMAND_EXEC,
 282                                                  "identify NAND flash device <num>");
 283                 register_command(cmd_ctx, nand_cmd, "check_bad_blocks", handle_nand_check_bad_blocks_command, COMMAND_EXEC,
 284                                                  "check NAND flash device <num> for bad blocks [<first> <last>]");
 285                 register_command(cmd_ctx, nand_cmd, "erase", handle_nand_erase_command, COMMAND_EXEC,
 286                                                  "erase blocks on NAND flash device <num> <first> <last>");
 287                 register_command(cmd_ctx, nand_cmd, "copy", handle_nand_copy_command, COMMAND_EXEC,
 288                                                  "copy from NAND flash device <num> <offset> <length> <ram-address>");
 289                 register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
 290                                                  "dump from NAND flash device <num> <filename> <offset> <size> [options]");
 291                 register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
 292                                                  "write to NAND flash device <num> <filename> <offset> [oob_raw|oob_only]");
 293                 register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
 294                                                  "raw access to NAND flash device <num> ['enable'|'disable']");
 295         }
 296
 297         return ERROR_OK;
 298 }
 299
 300 nand_device_t *get_nand_device_by_num(int num)
 301 {
 302         nand_device_t *p;
 303         int i = 0;
 304
 305         for (p = nand_devices; p; p = p->next)
 306         {
 307                 if (i++ == num)
 308                 {
 309                         return p;
 310                 }
 311         }
 312
 313         return NULL;
 314 }
 315
 316 int nand_build_bbt(struct nand_device_s *device, int first, int last)
 317 {
 318         u32 page = 0x0;
 319         int i;
 320         u8 *oob;
 321
 322         oob = malloc(6);
 323
 324         if ((first < 0) || (first >= device->num_blocks))
 325                 first = 0;
 326
 327         if ((last >= device->num_blocks) || (last == -1))
 328                 last = device->num_blocks - 1;
 329
 330         for (i = first; i < last; i++)
 331         {
 332                 nand_read_page(device, page, NULL, 0, oob, 6);
 333
 334                 if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 335                         || (((device->page_size == 512) && (oob[5] != 0xff)) ||
 336                                 ((device->page_size == 2048) && (oob[0] != 0xff))))
 337                 {
 338                         LOG_WARNING("invalid block: %i", i);
 339                         device->blocks[i].is_bad = 1;
 340                 }
 341                 else
 342                 {
 343                         device->blocks[i].is_bad = 0;
 344                 }
 345
 346                 page += (device->erase_size / device->page_size);
 347         }
 348
 349         return ERROR_OK;
 350 }
 351
 352 int nand_read_status(struct nand_device_s *device, u8 *status)
 353 {
 354         if (!device->device)
 355                 return ERROR_NAND_DEVICE_NOT_PROBED;
 356
 357         /* Send read status command */
 358         device->controller->command(device, NAND_CMD_STATUS);
 359
 360         alive_sleep(1);
 361
 362         /* read status */
 363         if (device->device->options & NAND_BUSWIDTH_16)
 364         {
 365                 u16 data;
 366                 device->controller->read_data(device, &data);
 367                 *status = data & 0xff;
 368         }
 369         else
 370         {
 371                 device->controller->read_data(device, status);
 372         }
 373
 374         return ERROR_OK;
 375 }
 376
 377 int nand_poll_ready(struct nand_device_s *device, int timeout)
 378 {
 379         u8 status;
 380
 381         device->controller->command(device, NAND_CMD_STATUS);
 382         do {
 383                 if (device->device->options & NAND_BUSWIDTH_16) {
 384                         u16 data;
 385                         device->controller->read_data(device, &data);
 386                         status = data & 0xff;
 387                 } else {
 388                         device->controller->read_data(device, &status);
 389                 }
 390                 if (status & NAND_STATUS_READY)
 391                         break;
 392                 alive_sleep(1);
 393         } while (timeout--);
 394
 395         return (status & NAND_STATUS_READY) != 0;
 396 }
 397
 398 int nand_probe(struct nand_device_s *device)
 399 {
 400         u8 manufacturer_id, device_id;
 401         u8 id_buff[6];
 402         int retval;
 403         int i;
 404
 405         /* clear device data */
 406         device->device = NULL;
 407         device->manufacturer = NULL;
 408
 409         /* clear device parameters */
 410         device->bus_width = 0;
 411         device->address_cycles = 0;
 412         device->page_size = 0;
 413         device->erase_size = 0;
 414
 415         /* initialize controller (device parameters are zero, use controller default) */
 416         if ((retval = device->controller->init(device) != ERROR_OK))
 417         {
 418                 switch (retval)
 419                 {
 420                         case ERROR_NAND_OPERATION_FAILED:
 421                                 LOG_DEBUG("controller initialization failed");
 422                                 return ERROR_NAND_OPERATION_FAILED;
 423                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 424                                 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
 425                                 return ERROR_NAND_OPERATION_FAILED;
 426                         default:
 427                                 LOG_ERROR("BUG: unknown controller initialization failure");
 428                                 return ERROR_NAND_OPERATION_FAILED;
 429                 }
 430         }
 431
 432         device->controller->command(device, NAND_CMD_RESET);
 433         device->controller->reset(device);
 434
 435         device->controller->command(device, NAND_CMD_READID);
 436         device->controller->address(device, 0x0);
 437
 438         if (device->bus_width == 8)
 439         {
 440                 device->controller->read_data(device, &manufacturer_id);
 441                 device->controller->read_data(device, &device_id);
 442         }
 443         else
 444         {
 445                 u16 data_buf;
 446                 device->controller->read_data(device, &data_buf);
 447                 manufacturer_id = data_buf & 0xff;
 448                 device->controller->read_data(device, &data_buf);
 449                 device_id = data_buf & 0xff;
 450         }
 451
 452         for (i = 0; nand_flash_ids[i].name; i++)
 453         {
 454                 if (nand_flash_ids[i].id == device_id)
 455                 {
 456                         device->device = &nand_flash_ids[i];
 457                         break;
 458                 }
 459         }
 460
 461         for (i = 0; nand_manuf_ids[i].name; i++)
 462         {
 463                 if (nand_manuf_ids[i].id == manufacturer_id)
 464                 {
 465                         device->manufacturer = &nand_manuf_ids[i];
 466                         break;
 467                 }
 468         }
 469
 470         if (!device->manufacturer)
 471         {
 472                 device->manufacturer = &nand_manuf_ids[0];
 473                 device->manufacturer->id = manufacturer_id;
 474         }
 475
 476         if (!device->device)
 477         {
 478                 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 479                         manufacturer_id, device_id);
 480                 return ERROR_NAND_OPERATION_FAILED;
 481         }
 482
 483         LOG_DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
 484
 485         /* initialize device parameters */
 486
 487         /* bus width */
 488         if (device->device->options & NAND_BUSWIDTH_16)
 489                 device->bus_width = 16;
 490         else
 491                 device->bus_width = 8;
 492
 493         /* Do we need extended device probe information? */
 494         if (device->device->page_size == 0 ||
 495             device->device->erase_size == 0)
 496         {
 497                 if (device->bus_width == 8)
 498                 {
 499                         device->controller->read_data(device, id_buff+3);
 500                         device->controller->read_data(device, id_buff+4);
 501                         device->controller->read_data(device, id_buff+5);
 502                 }
 503                 else
 504                 {
 505                         u16 data_buf;
 506
 507                         device->controller->read_data(device, &data_buf);
 508                         id_buff[3] = data_buf;
 509
 510                         device->controller->read_data(device, &data_buf);
 511                         id_buff[4] = data_buf;
 512
 513                         device->controller->read_data(device, &data_buf);
 514                         id_buff[5] = data_buf >> 8;
 515                 }
 516         }
 517
 518         /* page size */
 519         if (device->device->page_size == 0)
 520         {
 521                 device->page_size = 1 << (10 + (id_buff[4] & 3));
 522         }
 523         else if (device->device->page_size == 256)
 524         {
 525                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
 526                 return ERROR_NAND_OPERATION_FAILED;
 527         }
 528         else
 529         {
 530                 device->page_size = device->device->page_size;
 531         }
 532
 533         /* number of address cycles */
 534         if (device->page_size <= 512)
 535         {
 536                 /* small page devices */
 537                 if (device->device->chip_size <= 32)
 538                         device->address_cycles = 3;
 539                 else if (device->device->chip_size <= 8*1024)
 540                         device->address_cycles = 4;
 541                 else
 542                 {
 543                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 544                         device->address_cycles = 5;
 545                 }
 546         }
 547         else
 548         {
 549                 /* large page devices */
 550                 if (device->device->chip_size <= 128)
 551                         device->address_cycles = 4;
 552                 else if (device->device->chip_size <= 32*1024)
 553                         device->address_cycles = 5;
 554                 else
 555                 {
 556                         LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 557                         device->address_cycles = 6;
 558                 }
 559         }
 560
 561         /* erase size */
 562         if (device->device->erase_size == 0)
 563         {
 564                 switch ((id_buff[4] >> 4) & 3) {
 565                 case 0:
 566                         device->erase_size = 64 << 10;
 567                         break;
 568                 case 1:
 569                         device->erase_size = 128 << 10;
 570                         break;
 571                 case 2:
 572                         device->erase_size = 256 << 10;
 573                         break;
 574                 case 3:
 575                         device->erase_size =512 << 10;
 576                         break;
 577                 }
 578         }
 579         else
 580         {
 581                 device->erase_size = device->device->erase_size;
 582         }
 583
 584         /* initialize controller, but leave parameters at the controllers default */
 585         if ((retval = device->controller->init(device) != ERROR_OK))
 586         {
 587                 switch (retval)
 588                 {
 589                         case ERROR_NAND_OPERATION_FAILED:
 590                                 LOG_DEBUG("controller initialization failed");
 591                                 return ERROR_NAND_OPERATION_FAILED;
 592                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 593                                 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 594                                         device->bus_width, device->address_cycles, device->page_size);
 595                                 return ERROR_NAND_OPERATION_FAILED;
 596                         default:
 597                                 LOG_ERROR("BUG: unknown controller initialization failure");
 598                                 return ERROR_NAND_OPERATION_FAILED;
 599                 }
 600         }
 601
 602         device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024);
 603         device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks);
 604
 605         for (i = 0; i < device->num_blocks; i++)
 606         {
 607                 device->blocks[i].size = device->erase_size;
 608                 device->blocks[i].offset = i * device->erase_size;
 609                 device->blocks[i].is_erased = -1;
 610                 device->blocks[i].is_bad = -1;
 611         }
 612
 613         return ERROR_OK;
 614 }
 615
 616 int nand_erase(struct nand_device_s *device, int first_block, int last_block)
 617 {
 618         int i;
 619         u32 page;
 620         u8 status;
 621         int retval;
 622
 623         if (!device->device)
 624                 return ERROR_NAND_DEVICE_NOT_PROBED;
 625
 626         if ((first_block < 0) || (last_block > device->num_blocks))
 627                 return ERROR_INVALID_ARGUMENTS;
 628
 629         /* make sure we know if a block is bad before erasing it */
 630         for (i = first_block; i <= last_block; i++)
 631         {
 632                 if (device->blocks[i].is_bad == -1)
 633                 {
 634                         nand_build_bbt(device, i, last_block);
 635                         break;
 636                 }
 637         }
 638
 639         for (i = first_block; i <= last_block; i++)
 640         {
 641                 /* Send erase setup command */
 642                 device->controller->command(device, NAND_CMD_ERASE1);
 643
 644                 page = i * (device->erase_size / device->page_size);
 645
 646                 /* Send page address */
 647                 if (device->page_size <= 512)
 648                 {
 649                         /* row */
 650                         device->controller->address(device, page & 0xff);
 651                         device->controller->address(device, (page >> 8) & 0xff);
 652
 653                         /* 3rd cycle only on devices with more than 32 MiB */
 654                         if (device->address_cycles >= 4)
 655                                 device->controller->address(device, (page >> 16) & 0xff);
 656
 657                         /* 4th cycle only on devices with more than 8 GiB */
 658                         if (device->address_cycles >= 5)
 659                                 device->controller->address(device, (page >> 24) & 0xff);
 660                 }
 661                 else
 662                 {
 663                         /* row */
 664                         device->controller->address(device, page & 0xff);
 665                         device->controller->address(device, (page >> 8) & 0xff);
 666
 667                         /* 3rd cycle only on devices with more than 128 MiB */
 668                         if (device->address_cycles >= 5)
 669                                 device->controller->address(device, (page >> 16) & 0xff);
 670                 }
 671
 672                 /* Send erase confirm command */
 673                 device->controller->command(device, NAND_CMD_ERASE2);
 674
 675                 retval = device->controller->nand_ready ?
 676                                 device->controller->nand_ready(device, 1000) :
 677                                 nand_poll_ready(device, 1000);
 678                 if (!retval) {
 679                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 680                         return ERROR_NAND_OPERATION_TIMEOUT;
 681                 }
 682
 683                 if ((retval = nand_read_status(device, &status)) != ERROR_OK)
 684                 {
 685                         LOG_ERROR("couldn't read status");
 686                         return ERROR_NAND_OPERATION_FAILED;
 687                 }
 688
 689                 if (status & 0x1)
 690                 {
 691                         LOG_ERROR("erase operation didn't pass, status: 0x%2.2x", status);
 692                         return ERROR_NAND_OPERATION_FAILED;
 693                 }
 694         }
 695
 696         return ERROR_OK;
 697 }
 698
 699 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
 700 {
 701         u8 *page;
 702
 703         if (!device->device)
 704                 return ERROR_NAND_DEVICE_NOT_PROBED;
 705
 706         if (address % device->page_size)
 707         {
 708                 LOG_ERROR("reads need to be page aligned");
 709                 return ERROR_NAND_OPERATION_FAILED;
 710         }
 711
 712         page = malloc(device->page_size);
 713
 714         while (data_size > 0 )
 715         {
 716                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 717                 u32 page_address;
 718
 719
 720                 page_address = address / device->page_size;
 721
 722                 nand_read_page(device, page_address, page, device->page_size, NULL, 0);
 723
 724                 memcpy(data, page, thisrun_size);
 725
 726                 address += thisrun_size;
 727                 data += thisrun_size;
 728                 data_size -= thisrun_size;
 729         }
 730
 731         free(page);
 732
 733         return ERROR_OK;
 734 }
 735
 736 int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
 737 {
 738         u8 *page;
 739
 740         if (!device->device)
 741                 return ERROR_NAND_DEVICE_NOT_PROBED;
 742
 743         if (address % device->page_size)
 744         {
 745                 LOG_ERROR("writes need to be page aligned");
 746                 return ERROR_NAND_OPERATION_FAILED;
 747         }
 748
 749         page = malloc(device->page_size);
 750
 751         while (data_size > 0 )
 752         {
 753                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 754                 u32 page_address;
 755
 756                 memset(page, 0xff, device->page_size);
 757                 memcpy(page, data, thisrun_size);
 758
 759                 page_address = address / device->page_size;
 760
 761                 nand_write_page(device, page_address, page, device->page_size, NULL, 0);
 762
 763                 address += thisrun_size;
 764                 data += thisrun_size;
 765                 data_size -= thisrun_size;
 766         }
 767
 768         free(page);
 769
 770         return ERROR_OK;
 771 }
 772
 773 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 774 {
 775         if (!device->device)
 776                 return ERROR_NAND_DEVICE_NOT_PROBED;
 777
 778         if (device->use_raw || device->controller->write_page == NULL)
 779                 return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
 780         else
 781                 return device->controller->write_page(device, page, data, data_size, oob, oob_size);
 782 }
 783
 784 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 785 {
 786         if (!device->device)
 787                 return ERROR_NAND_DEVICE_NOT_PROBED;
 788
 789         if (device->use_raw || device->controller->read_page == NULL)
 790                 return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
 791         else
 792                 return device->controller->read_page(device, page, data, data_size, oob, oob_size);
 793 }
 794
 795 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 796 {
 797         int i;
 798
 799         if (!device->device)
 800                 return ERROR_NAND_DEVICE_NOT_PROBED;
 801
 802         if (device->page_size <= 512)
 803         {
 804                 /* small page device */
 805                 if (data)
 806                         device->controller->command(device, NAND_CMD_READ0);
 807                 else
 808                         device->controller->command(device, NAND_CMD_READOOB);
 809
 810                 /* column (always 0, we start at the beginning of a page/OOB area) */
 811                 device->controller->address(device, 0x0);
 812
 813                 /* row */
 814                 device->controller->address(device, page & 0xff);
 815                 device->controller->address(device, (page >> 8) & 0xff);
 816
 817                 /* 4th cycle only on devices with more than 32 MiB */
 818                 if (device->address_cycles >= 4)
 819                         device->controller->address(device, (page >> 16) & 0xff);
 820
 821                 /* 5th cycle only on devices with more than 8 GiB */
 822                 if (device->address_cycles >= 5)
 823                         device->controller->address(device, (page >> 24) & 0xff);
 824         }
 825         else
 826         {
 827                 /* large page device */
 828                 device->controller->command(device, NAND_CMD_READ0);
 829
 830                 /* column (0 when we start at the beginning of a page,
 831                  * or 2048 for the beginning of OOB area)
 832                  */
 833                 device->controller->address(device, 0x0);
 834                 if (data)
 835                         device->controller->address(device, 0x0);
 836                 else
 837                         device->controller->address(device, 0x8);
 838
 839                 /* row */
 840                 device->controller->address(device, page & 0xff);
 841                 device->controller->address(device, (page >> 8) & 0xff);
 842
 843                 /* 5th cycle only on devices with more than 128 MiB */
 844                 if (device->address_cycles >= 5)
 845                         device->controller->address(device, (page >> 16) & 0xff);
 846
 847                 /* large page devices need a start command */
 848                 device->controller->command(device, NAND_CMD_READSTART);
 849         }
 850
 851         if (device->controller->nand_ready) {
 852                 if (!device->controller->nand_ready(device, 100))
 853                         return ERROR_NAND_OPERATION_TIMEOUT;
 854         } else {
 855                 alive_sleep(1);
 856         }
 857
 858         if (data)
 859         {
 860                 if (device->controller->read_block_data != NULL)
 861                         (device->controller->read_block_data)(device, data, data_size);
 862                 else
 863                 {
 864                         for (i = 0; i < data_size;)
 865                         {
 866                                 if (device->device->options & NAND_BUSWIDTH_16)
 867                                 {
 868                                         device->controller->read_data(device, data);
 869                                         data += 2;
 870                                         i += 2;
 871                                 }
 872                                 else
 873                                 {
 874                                         device->controller->read_data(device, data);
 875                                         data += 1;
 876                                         i += 1;
 877                                 }
 878                         }
 879                 }
 880         }
 881
 882         if (oob)
 883         {
 884                 if (device->controller->read_block_data != NULL)
 885                         (device->controller->read_block_data)(device, oob, oob_size);
 886                 else
 887                 {
 888                         for (i = 0; i < oob_size;)
 889                         {
 890                                 if (device->device->options & NAND_BUSWIDTH_16)
 891                                 {
 892                                         device->controller->read_data(device, oob);
 893                                         oob += 2;
 894                                         i += 2;
 895                                 }
 896                                 else
 897                                 {
 898                                         device->controller->read_data(device, oob);
 899                                         oob += 1;
 900                                         i += 1;
 901                                 }
 902                         }
 903                 }
 904         }
 905
 906         return ERROR_OK;
 907 }
 908
 909 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 910 {
 911         int i;
 912         int retval;
 913         u8 status;
 914
 915         if (!device->device)
 916                 return ERROR_NAND_DEVICE_NOT_PROBED;
 917
 918         device->controller->command(device, NAND_CMD_SEQIN);
 919
 920         if (device->page_size <= 512)
 921         {
 922                 /* column (always 0, we start at the beginning of a page/OOB area) */
 923                 device->controller->address(device, 0x0);
 924
 925                 /* row */
 926                 device->controller->address(device, page & 0xff);
 927                 device->controller->address(device, (page >> 8) & 0xff);
 928
 929                 /* 4th cycle only on devices with more than 32 MiB */
 930                 if (device->address_cycles >= 4)
 931                         device->controller->address(device, (page >> 16) & 0xff);
 932
 933                 /* 5th cycle only on devices with more than 8 GiB */
 934                 if (device->address_cycles >= 5)
 935                         device->controller->address(device, (page >> 24) & 0xff);
 936         }
 937         else
 938         {
 939                 /* column (0 when we start at the beginning of a page,
 940                  * or 2048 for the beginning of OOB area)
 941                  */
 942                 device->controller->address(device, 0x0);
 943                 if (data)
 944                         device->controller->address(device, 0x0);
 945                 else
 946                         device->controller->address(device, 0x8);
 947
 948                 /* row */
 949                 device->controller->address(device, page & 0xff);
 950                 device->controller->address(device, (page >> 8) & 0xff);
 951
 952                 /* 5th cycle only on devices with more than 128 MiB */
 953                 if (device->address_cycles >= 5)
 954                         device->controller->address(device, (page >> 16) & 0xff);
 955         }
 956
 957         if (data)
 958         {
 959                 if (device->controller->write_block_data != NULL)
 960                         (device->controller->write_block_data)(device, data, data_size);
 961                 else
 962                 {
 963                         for (i = 0; i < data_size;)
 964                         {
 965                                 if (device->device->options & NAND_BUSWIDTH_16)
 966                                 {
 967                                         u16 data_buf = le_to_h_u16(data);
 968                                         device->controller->write_data(device, data_buf);
 969                                         data += 2;
 970                                         i += 2;
 971                                 }
 972                                 else
 973                                 {
 974                                         device->controller->write_data(device, *data);
 975                                         data += 1;
 976                                         i += 1;
 977                                 }
 978                         }
 979                 }
 980         }
 981
 982         if (oob)
 983         {
 984                 if (device->controller->write_block_data != NULL)
 985                         (device->controller->write_block_data)(device, oob, oob_size);
 986                 else
 987                 {
 988                         for (i = 0; i < oob_size;)
 989                         {
 990                                 if (device->device->options & NAND_BUSWIDTH_16)
 991                                 {
 992                                         u16 oob_buf = le_to_h_u16(data);
 993                                         device->controller->write_data(device, oob_buf);
 994                                         oob += 2;
 995                                         i += 2;
 996                                 }
 997                                 else
 998                                 {
 999                                         device->controller->write_data(device, *oob);
1000                                         oob += 1;
1001                                         i += 1;
1002                                 }
1003                         }
1004                 }
1005         }
1006
1007         device->controller->command(device, NAND_CMD_PAGEPROG);
1008
1009         retval = device->controller->nand_ready ?
1010                         device->controller->nand_ready(device, 100) :
1011                         nand_poll_ready(device, 100);
1012         if (!retval)
1013                 return ERROR_NAND_OPERATION_TIMEOUT;
1014
1015         if ((retval = nand_read_status(device, &status)) != ERROR_OK)
1016         {
1017                 LOG_ERROR("couldn't read status");
1018                 return ERROR_NAND_OPERATION_FAILED;
1019         }
1020
1021         if (status & NAND_STATUS_FAIL)
1022         {
1023                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
1024                 return ERROR_NAND_OPERATION_FAILED;
1025         }
1026
1027         return ERROR_OK;
1028 }
1029
1030 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1031 {
1032         nand_device_t *p;
1033         int i = 0;
1034
1035         if (!nand_devices)
1036         {
1037                 command_print(cmd_ctx, "no NAND flash devices configured");
1038                 return ERROR_OK;
1039         }
1040
1041         for (p = nand_devices; p; p = p->next)
1042         {
1043                 if (p->device)
1044                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1045                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1046                 else
1047                         command_print(cmd_ctx, "#%i: not probed");
1048         }
1049
1050         return ERROR_OK;
1051 }
1052
1053 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1054 {
1055         nand_device_t *p;
1056         int i = 0;
1057         int j = 0;
1058         int first = -1;
1059         int last = -1;
1060
1061         if ((argc < 1) || (argc > 3))
1062         {
1063                 return ERROR_COMMAND_SYNTAX_ERROR;
1064
1065         }
1066
1067         if (argc == 2)
1068         {
1069                 first = last = strtoul(args[1], NULL, 0);
1070         }
1071         else if (argc == 3)
1072         {
1073                 first = strtoul(args[1], NULL, 0);
1074                 last = strtoul(args[2], NULL, 0);
1075         }
1076
1077         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1078         if (p)
1079         {
1080                 if (p->device)
1081                 {
1082                         if (first >= p->num_blocks)
1083                                 first = p->num_blocks - 1;
1084
1085                         if (last >= p->num_blocks)
1086                                 last = p->num_blocks - 1;
1087
1088                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1089                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1090
1091                         for (j = first; j <= last; j++)
1092                         {
1093                                 char *erase_state, *bad_state;
1094
1095                                 if (p->blocks[j].is_erased == 0)
1096                                         erase_state = "not erased";
1097                                 else if (p->blocks[j].is_erased == 1)
1098                                         erase_state = "erased";
1099                                 else
1100                                         erase_state = "erase state unknown";
1101
1102                                 if (p->blocks[j].is_bad == 0)
1103                                         bad_state = "";
1104                                 else if (p->blocks[j].is_bad == 1)
1105                                         bad_state = " (marked bad)";
1106                                 else
1107                                         bad_state = " (block condition unknown)";
1108
1109                                 command_print(cmd_ctx, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1110                                                         j, p->blocks[j].offset, p->blocks[j].size / 1024,
1111                                                         erase_state, bad_state);
1112                         }
1113                 }
1114                 else
1115                 {
1116                         command_print(cmd_ctx, "#%i: not probed");
1117                 }
1118         }
1119
1120         return ERROR_OK;
1121 }
1122
1123 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1124 {
1125         nand_device_t *p;
1126         int retval;
1127
1128         if (argc != 1)
1129         {
1130                 return ERROR_COMMAND_SYNTAX_ERROR;
1131         }
1132
1133         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1134         if (p)
1135         {
1136                 if ((retval = nand_probe(p)) == ERROR_OK)
1137                 {
1138                         command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name);
1139                 }
1140                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1141                 {
1142                         command_print(cmd_ctx, "probing failed for NAND flash device");
1143                 }
1144                 else
1145                 {
1146                         command_print(cmd_ctx, "unknown error when probing NAND flash device");
1147                 }
1148         }
1149         else
1150         {
1151                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1152         }
1153
1154         return ERROR_OK;
1155 }
1156
1157 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1158 {
1159         nand_device_t *p;
1160         int retval;
1161
1162         if (argc != 3)
1163         {
1164                 return ERROR_COMMAND_SYNTAX_ERROR;
1165
1166         }
1167
1168         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1169         if (p)
1170         {
1171                 int first = strtoul(args[1], NULL, 0);
1172                 int last = strtoul(args[2], NULL, 0);
1173
1174                 if ((retval = nand_erase(p, first, last)) == ERROR_OK)
1175                 {
1176                         command_print(cmd_ctx, "successfully erased blocks %i to %i on NAND flash device '%s'", first, last, p->device->name);
1177                 }
1178                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1179                 {
1180                         command_print(cmd_ctx, "erase failed");
1181                 }
1182                 else
1183                 {
1184                         command_print(cmd_ctx, "unknown error when erasing NAND flash device");
1185                 }
1186         }
1187         else
1188         {
1189                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1190         }
1191
1192         return ERROR_OK;
1193 }
1194
1195 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1196 {
1197         nand_device_t *p;
1198         int retval;
1199         int first = -1;
1200         int last = -1;
1201
1202         if ((argc < 1) || (argc > 3) || (argc == 2))
1203         {
1204                 return ERROR_COMMAND_SYNTAX_ERROR;
1205
1206         }
1207
1208         if (argc == 3)
1209         {
1210                 first = strtoul(args[1], NULL, 0);
1211                 last = strtoul(args[2], NULL, 0);
1212         }
1213
1214         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1215         if (p)
1216         {
1217                 if ((retval = nand_build_bbt(p, first, last)) == ERROR_OK)
1218                 {
1219                         command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p->device->name);
1220                 }
1221                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1222                 {
1223                         command_print(cmd_ctx, "error when checking for bad blocks on NAND flash device");
1224                 }
1225                 else
1226                 {
1227                         command_print(cmd_ctx, "unknown error when checking for bad blocks on NAND flash device");
1228                 }
1229         }
1230         else
1231         {
1232                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1233         }
1234
1235         return ERROR_OK;
1236 }
1237
1238 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1239 {
1240         nand_device_t *p;
1241
1242         if (argc != 4)
1243         {
1244                 return ERROR_COMMAND_SYNTAX_ERROR;
1245
1246         }
1247
1248         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1249         if (p)
1250         {
1251
1252         }
1253         else
1254         {
1255                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1256         }
1257
1258         return ERROR_OK;
1259 }
1260
1261 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1262 {
1263         u32 offset;
1264         u32 binary_size;
1265         u32 buf_cnt;
1266         enum oob_formats oob_format = NAND_OOB_NONE;
1267
1268         fileio_t fileio;
1269
1270         duration_t duration;
1271         char *duration_text;
1272
1273         nand_device_t *p;
1274
1275         if (argc < 3)
1276         {
1277                 return ERROR_COMMAND_SYNTAX_ERROR;
1278
1279         }
1280
1281         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1282         if (p)
1283         {
1284                 u8 *page = NULL;
1285                 u32 page_size = 0;
1286                 u8 *oob = NULL;
1287                 u32 oob_size = 0;
1288
1289                 offset = strtoul(args[2], NULL, 0);
1290
1291                 if (argc > 3)
1292                 {
1293                         int i;
1294                         for (i = 3; i < argc; i++)
1295                         {
1296                                 if (!strcmp(args[i], "oob_raw"))
1297                                         oob_format |= NAND_OOB_RAW;
1298                                 else if (!strcmp(args[i], "oob_only"))
1299                                         oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1300                                 else
1301                                 {
1302                                         command_print(cmd_ctx, "unknown option: %s", args[i]);
1303                                         return ERROR_COMMAND_SYNTAX_ERROR;
1304                                 }
1305                         }
1306                 }
1307
1308                 duration_start_measure(&duration);
1309
1310                 if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK)
1311                 {
1312                         return ERROR_OK;
1313                 }
1314
1315                 buf_cnt = binary_size = fileio.size;
1316
1317                 if (!(oob_format & NAND_OOB_ONLY))
1318                 {
1319                         page_size = p->page_size;
1320                         page = malloc(p->page_size);
1321                 }
1322
1323                 if (oob_format & NAND_OOB_RAW)
1324                 {
1325                         if (p->page_size == 512)
1326                                 oob_size = 16;
1327                         else if (p->page_size == 2048)
1328                                 oob_size = 64;
1329                         oob = malloc(oob_size);
1330                 }
1331
1332                 if (offset % p->page_size)
1333                 {
1334                         command_print(cmd_ctx, "only page size aligned offsets and sizes are supported");
1335                         fileio_close(&fileio);
1336                         free(oob);
1337                         free(page);
1338                         return ERROR_OK;
1339                 }
1340
1341                 while (buf_cnt > 0)
1342                 {
1343                         u32 size_read;
1344
1345                         if (NULL != page)
1346                         {
1347                                 fileio_read(&fileio, page_size, page, &size_read);
1348                                 buf_cnt -= size_read;
1349                                 if (size_read < page_size)
1350                                 {
1351                                         memset(page + size_read, 0xff, page_size - size_read);
1352                                 }
1353                         }
1354
1355                         if (NULL != oob)
1356                         {
1357                                 fileio_read(&fileio, oob_size, oob, &size_read);
1358                                 buf_cnt -= size_read;
1359                                 if (size_read < oob_size)
1360                                 {
1361                                         memset(oob + size_read, 0xff, oob_size - size_read);
1362                                 }
1363                         }
1364
1365                         if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK)
1366                         {
1367                                 command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1368                                         args[1], args[0], offset);
1369
1370                                 fileio_close(&fileio);
1371                                 free(oob);
1372                                 free(page);
1373
1374                                 return ERROR_OK;
1375                         }
1376                         offset += page_size;
1377                 }
1378
1379                 fileio_close(&fileio);
1380                 free(oob);
1381                 free(page);
1382                 oob = NULL;
1383                 page = NULL;
1384                 duration_stop_measure(&duration, &duration_text);
1385                 command_print(cmd_ctx, "wrote file %s to NAND flash %s up to offset 0x%8.8x in %s",
1386                         args[1], args[0], offset, duration_text);
1387                 free(duration_text);
1388                 duration_text = NULL;
1389         }
1390         else
1391         {
1392                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1393         }
1394
1395         return ERROR_OK;
1396 }
1397
1398 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1399 {
1400         nand_device_t *p;
1401
1402         if (argc < 4)
1403         {
1404                 return ERROR_COMMAND_SYNTAX_ERROR;
1405         }
1406
1407         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1408         if (p)
1409         {
1410                 if (p->device)
1411                 {
1412                         fileio_t fileio;
1413                         duration_t duration;
1414                         char *duration_text;
1415                         int retval;
1416
1417                         u8 *page = NULL;
1418                         u32 page_size = 0;
1419                         u8 *oob = NULL;
1420                         u32 oob_size = 0;
1421                         u32 address = strtoul(args[2], NULL, 0);
1422                         u32 size = strtoul(args[3], NULL, 0);
1423                         u32 bytes_done = 0;
1424                         enum oob_formats oob_format = NAND_OOB_NONE;
1425
1426                         if (argc > 4)
1427                         {
1428                                 int i;
1429                                 for (i = 4; i < argc; i++)
1430                                 {
1431                                         if (!strcmp(args[i], "oob_raw"))
1432                                                 oob_format |= NAND_OOB_RAW;
1433                                         else if (!strcmp(args[i], "oob_only"))
1434                                                 oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1435                                         else
1436                                                 command_print(cmd_ctx, "unknown option: '%s'", args[i]);
1437                                 }
1438                         }
1439
1440                         if ((address % p->page_size) || (size % p->page_size))
1441                         {
1442                                 command_print(cmd_ctx, "only page size aligned addresses and sizes are supported");
1443                                 return ERROR_OK;
1444                         }
1445
1446                         if (!(oob_format & NAND_OOB_ONLY))
1447                         {
1448                                 page_size = p->page_size;
1449                                 page = malloc(p->page_size);
1450                         }
1451
1452                         if (oob_format & NAND_OOB_RAW)
1453                         {
1454                                 if (p->page_size == 512)
1455                                         oob_size = 16;
1456                                 else if (p->page_size == 2048)
1457                                         oob_size = 64;
1458                                 oob = malloc(oob_size);
1459                         }
1460
1461                         if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK)
1462                         {
1463                                 return ERROR_OK;
1464                         }
1465
1466                         duration_start_measure(&duration);
1467
1468                         while (size > 0)
1469                         {
1470                                 u32 size_written;
1471                                 if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK)
1472                                 {
1473                                         command_print(cmd_ctx, "reading NAND flash page failed");
1474                                         free(page);
1475                                         free(oob);
1476                                         fileio_close(&fileio);
1477                                         return ERROR_OK;
1478                                 }
1479
1480                                 if (NULL != page)
1481                                 {
1482                                         fileio_write(&fileio, page_size, page, &size_written);
1483                                         bytes_done += page_size;
1484                                 }
1485
1486                                 if (NULL != oob)
1487                                 {
1488                                         fileio_write(&fileio, oob_size, oob, &size_written);
1489                                         bytes_done += oob_size;
1490                                 }
1491
1492                                 size -= p->page_size;
1493                                 address += p->page_size;
1494                         }
1495
1496                         free(page);
1497                         page = NULL;
1498                         free(oob);
1499                         oob = NULL;
1500                         fileio_close(&fileio);
1501
1502                         duration_stop_measure(&duration, &duration_text);
1503                         command_print(cmd_ctx, "dumped %"PRIi64" byte in %s", fileio.size, duration_text);
1504                         free(duration_text);
1505                         duration_text = NULL;
1506                 }
1507                 else
1508                 {
1509                         command_print(cmd_ctx, "#%i: not probed");
1510                 }
1511         }
1512         else
1513         {
1514                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1515         }
1516
1517         return ERROR_OK;
1518 }
1519
1520 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1521 {
1522         nand_device_t *p;
1523
1524         if ((argc < 1) || (argc > 2))
1525         {
1526                 return ERROR_COMMAND_SYNTAX_ERROR;
1527         }
1528
1529         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1530         if (p)
1531         {
1532                 if (p->device)
1533                 {
1534                         if (argc == 2)
1535                         {
1536                                 if (strcmp("enable", args[1]) == 0)
1537                                 {
1538                                         p->use_raw = 1;
1539                                 }
1540                                 else if (strcmp("disable", args[1]) == 0)
1541                                 {
1542                                         p->use_raw = 0;
1543                                 }
1544                                 else
1545                                 {
1546                                         return ERROR_COMMAND_SYNTAX_ERROR;
1547                                 }
1548                         }
1549
1550                         command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled");
1551                 }
1552                 else
1553                 {
1554                         command_print(cmd_ctx, "#%i: not probed");
1555                 }
1556         }
1557         else
1558         {
1559                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1560         }
1561
1562         return ERROR_OK;
1563 }