- remove target specific variant and use target->variant member
[fw/openocd] / src / flash / nand.c
1 /***************************************************************************
2  *   Copyright (C) 2007 by Dominic Rath                                    *
3  *   Dominic.Rath@gmx.de                                                   *
4  *                                                                         *
5  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
6  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
7  *                                                                         *
8  *   This program is free software; you can redistribute it and/or modify  *
9  *   it under the terms of the GNU General Public License as published by  *
10  *   the Free Software Foundation; either version 2 of the License, or     *
11  *   (at your option) any later version.                                   *
12  *                                                                         *
13  *   This program is distributed in the hope that it will be useful,       *
14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
16  *   GNU General Public License for more details.                          *
17  *                                                                         *
18  *   You should have received a copy of the GNU General Public License     *
19  *   along with this program; if not, write to the                         *
20  *   Free Software Foundation, Inc.,                                       *
21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
22  ***************************************************************************/
23 #ifdef HAVE_CONFIG_H
24 #include "config.h"
25 #endif
26
27 #include "replacements.h"
28 #include "log.h"
29
30 #include <stdlib.h>
31 #include <string.h>
32 #include <inttypes.h>
33
34 #include <errno.h>
35
36 #include "nand.h"
37 #include "flash.h"
38 #include "time_support.h"
39 #include "fileio.h"
40 #include "image.h"
41
42 int nand_register_commands(struct command_context_s *cmd_ctx);
43 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
44 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
45 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
46 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
47 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
48 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
49 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
50 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
51
52 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
53
54 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
55 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
56 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
57
58 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
59 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
60
61 /* NAND flash controller
62  */
63 extern nand_flash_controller_t lpc3180_nand_controller;
64 extern nand_flash_controller_t s3c2410_nand_controller;
65 extern nand_flash_controller_t s3c2412_nand_controller;
66 extern nand_flash_controller_t s3c2440_nand_controller;
67 extern nand_flash_controller_t s3c2443_nand_controller;
68
69 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
70
71 nand_flash_controller_t *nand_flash_controllers[] =
72 {
73         &lpc3180_nand_controller,
74         &s3c2410_nand_controller,
75         &s3c2412_nand_controller,
76         &s3c2440_nand_controller,
77         &s3c2443_nand_controller,
78 /*      &boundary_scan_nand_controller, */
79         NULL
80 };
81
82 /* configured NAND devices and NAND Flash command handler */
83 nand_device_t *nand_devices = NULL;
84 static command_t *nand_cmd;
85
86 /*      Chip ID list
87  *
88  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
89  *      options
90  *
91  *      Pagesize; 0, 256, 512
92  *      0       get this information from the extended chip ID
93  *      256     256 Byte page size
94  *      512     512 Byte page size
95  */
96 nand_info_t nand_flash_ids[] =
97 {
98         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
99         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
100         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
101         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
102         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
103         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
104         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
105         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
106         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
107         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
108
109         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
110         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
111         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
112         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
113
114         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
115         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
116         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
117         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
118
119         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
120         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
121         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
122         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
123
124         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
125         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
126         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
127         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
128
129         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
130         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
131         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
132         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
133         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
134         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
135         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
136
137         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
138
139         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
140         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
141         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
142         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
143
144         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
145         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
146         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
147         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
148
149         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
150         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
151         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
152         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
153
154         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
155         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
156         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
157         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
158
159         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
160         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
161         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
162         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
163
164         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
165         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
166         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
167         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
168
169         {NULL, 0,}
170 };
171
172 /* Manufacturer ID list
173  */
174 nand_manufacturer_t nand_manuf_ids[] =
175 {
176         {0x0, "unknown"},
177         {NAND_MFR_TOSHIBA, "Toshiba"},
178         {NAND_MFR_SAMSUNG, "Samsung"},
179         {NAND_MFR_FUJITSU, "Fujitsu"},
180         {NAND_MFR_NATIONAL, "National"},
181         {NAND_MFR_RENESAS, "Renesas"},
182         {NAND_MFR_STMICRO, "ST Micro"},
183         {NAND_MFR_HYNIX, "Hynix"},
184         {0x0, NULL},
185 };
186
187 /* nand device <nand_controller> [controller options]
188  */
189 int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
190 {
191         int i;
192         int retval;
193                 
194         if (argc < 1)
195         {
196                 LOG_WARNING("incomplete flash device nand configuration");
197                 return ERROR_FLASH_BANK_INVALID;
198         }
199         
200         for (i = 0; nand_flash_controllers[i]; i++)
201         {
202                 nand_device_t *p, *c;
203                 
204                 if (strcmp(args[0], nand_flash_controllers[i]->name) == 0)
205                 {
206                         /* register flash specific commands */
207                         if ((retval = nand_flash_controllers[i]->register_commands(cmd_ctx)) != ERROR_OK)
208                         {
209                                 LOG_ERROR("couldn't register '%s' commands", args[0]);
210                                 return retval;
211                         }
212         
213                         c = malloc(sizeof(nand_device_t));
214
215                         c->controller = nand_flash_controllers[i];
216                         c->controller_priv = NULL;
217                         c->manufacturer = NULL;
218                         c->device = NULL;
219                         c->bus_width = 0;
220                         c->address_cycles = 0;
221                         c->page_size = 0;
222                         c->use_raw = 0;
223                         c->next = NULL;
224
225                         if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK)
226                         {
227                                 LOG_ERROR("'%s' driver rejected nand flash", c->controller->name);
228                                 free(c);
229                                 return ERROR_OK;
230                         }
231                         
232                         /* put NAND device in linked list */
233                         if (nand_devices)
234                         {
235                                 /* find last flash device */
236                                 for (p = nand_devices; p && p->next; p = p->next);
237                                 if (p)
238                                         p->next = c;
239                         }
240                         else
241                         {
242                                 nand_devices = c;
243                         }
244                         
245                         return ERROR_OK;
246                 }
247         }
248
249         /* no valid NAND controller was found (i.e. the configuration option,
250          * didn't match one of the compiled-in controllers)
251          */
252         LOG_ERROR("No valid NAND flash controller found (%s)", args[0]);
253         LOG_ERROR("compiled-in NAND flash controllers:");
254         for (i = 0; nand_flash_controllers[i]; i++)
255         {
256                 LOG_ERROR("%i: %s", i, nand_flash_controllers[i]->name);
257         }
258         
259         return ERROR_OK;
260 }
261
262 int nand_register_commands(struct command_context_s *cmd_ctx)
263 {
264         nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, "NAND specific commands");
265         
266         register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL);
267         
268         return ERROR_OK;
269 }
270
271 int nand_init(struct command_context_s *cmd_ctx)
272 {
273         if (nand_devices)
274         {
275                 register_command(cmd_ctx, nand_cmd, "list", handle_nand_list_command, COMMAND_EXEC,
276                                                  "list configured NAND flash devices");
277                 register_command(cmd_ctx, nand_cmd, "info", handle_nand_info_command, COMMAND_EXEC,
278                                                  "print info about NAND flash device <num>");
279                 register_command(cmd_ctx, nand_cmd, "probe", handle_nand_probe_command, COMMAND_EXEC,
280                                                  "identify NAND flash device <num>");
281                 register_command(cmd_ctx, nand_cmd, "check_bad_blocks", handle_nand_check_bad_blocks_command, COMMAND_EXEC,
282                                                  "check NAND flash device <num> for bad blocks [<first> <last>]");
283                 register_command(cmd_ctx, nand_cmd, "erase", handle_nand_erase_command, COMMAND_EXEC,
284                                                  "erase blocks on NAND flash device <num> <first> <last>");
285                 register_command(cmd_ctx, nand_cmd, "copy", handle_nand_copy_command, COMMAND_EXEC,
286                                                  "copy from NAND flash device <num> <offset> <length> <ram-address>");
287                 register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
288                                                  "dump from NAND flash device <num> <filename> <offset> <size> [options]");
289                 register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
290                                                  "write to NAND flash device <num> <filename> <offset> [options]");
291                 register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
292                                                  "raw access to NAND flash device <num> ['enable'|'disable']");
293         }
294         
295         return ERROR_OK;
296 }
297
298 nand_device_t *get_nand_device_by_num(int num)
299 {
300         nand_device_t *p;
301         int i = 0;
302
303         for (p = nand_devices; p; p = p->next)
304         {
305                 if (i++ == num)
306                 {
307                         return p;
308                 }
309         }
310         
311         return NULL;
312 }
313
314 int nand_build_bbt(struct nand_device_s *device, int first, int last)
315 {
316         u32 page = 0x0;
317         int i;
318         u8 *oob;
319         
320         oob = malloc(6);
321         
322         if ((first < 0) || (first >= device->num_blocks))
323                 first = 0;
324         
325         if ((last >= device->num_blocks) || (last == -1))
326                 last = device->num_blocks - 1;
327         
328         for (i = first; i < last; i++)
329         {
330                 nand_read_page(device, page, NULL, 0, oob, 6);
331                 
332                 if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
333                         || (((device->page_size == 512) && (oob[5] != 0xff)) ||
334                                 ((device->page_size == 2048) && (oob[0] != 0xff))))
335                 {
336                         LOG_WARNING("invalid block: %i", i);
337                         device->blocks[i].is_bad = 1;
338                 }
339                 else
340                 {
341                         device->blocks[i].is_bad = 0;
342                 }
343                 
344                 page += (device->erase_size / device->page_size);
345         }
346         
347         return ERROR_OK;
348 }
349
350 int nand_read_status(struct nand_device_s *device, u8 *status)
351 {
352         if (!device->device)
353                 return ERROR_NAND_DEVICE_NOT_PROBED;
354                 
355         /* Send read status command */
356         device->controller->command(device, NAND_CMD_STATUS);
357         
358         alive_sleep(1);
359         
360         /* read status */
361         if (device->device->options & NAND_BUSWIDTH_16)
362         {
363                 u16 data;
364                 device->controller->read_data(device, &data);
365                 *status = data & 0xff;
366         }
367         else
368         {
369                 device->controller->read_data(device, status);
370         }
371                         
372         return ERROR_OK;
373 }
374
375 int nand_probe(struct nand_device_s *device)
376 {
377         u8 manufacturer_id, device_id;
378         u8 id_buff[5];
379         int retval;
380         int i;
381
382         /* clear device data */
383         device->device = NULL;
384         device->manufacturer = NULL;
385         
386         /* clear device parameters */
387         device->bus_width = 0;
388         device->address_cycles = 0;
389         device->page_size = 0;
390         device->erase_size = 0;
391         
392         /* initialize controller (device parameters are zero, use controller default) */
393         if ((retval = device->controller->init(device) != ERROR_OK))
394         {
395                 switch (retval)
396                 {
397                         case ERROR_NAND_OPERATION_FAILED:
398                                 LOG_DEBUG("controller initialization failed");
399                                 return ERROR_NAND_OPERATION_FAILED;
400                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
401                                 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
402                                 return ERROR_NAND_OPERATION_FAILED;
403                         default:
404                                 LOG_ERROR("BUG: unknown controller initialization failure");
405                                 return ERROR_NAND_OPERATION_FAILED;
406                 }
407         }
408         
409         device->controller->command(device, NAND_CMD_RESET);
410         device->controller->reset(device);
411
412         device->controller->command(device, NAND_CMD_READID);
413         device->controller->address(device, 0x0);
414         
415         if (device->bus_width == 8)
416         {
417                 device->controller->read_data(device, &manufacturer_id);
418                 device->controller->read_data(device, &device_id);
419         }
420         else
421         {
422                 u16 data_buf;
423                 device->controller->read_data(device, &data_buf);
424                 manufacturer_id = data_buf & 0xff;
425                 device->controller->read_data(device, &data_buf);
426                 device_id = data_buf & 0xff;
427         }
428                 
429         for (i = 0; nand_flash_ids[i].name; i++)
430         {
431                 if (nand_flash_ids[i].id == device_id)
432                 {
433                         device->device = &nand_flash_ids[i];
434                         break;
435                 }
436         }
437         
438         for (i = 0; nand_manuf_ids[i].name; i++)
439         {
440                 if (nand_manuf_ids[i].id == manufacturer_id)
441                 {
442                         device->manufacturer = &nand_manuf_ids[i];
443                         break;
444                 }
445         }
446         
447         if (!device->manufacturer)
448         {
449                 device->manufacturer = &nand_manuf_ids[0];
450                 device->manufacturer->id = manufacturer_id;
451         }
452         
453         if (!device->device)
454         {
455                 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
456                         manufacturer_id, device_id);
457                 return ERROR_NAND_OPERATION_FAILED;
458         }
459         
460         LOG_DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
461         
462         /* initialize device parameters */
463         
464         /* bus width */ 
465         if (device->device->options & NAND_BUSWIDTH_16)
466                 device->bus_width = 16;
467         else
468                 device->bus_width = 8;
469
470         /* Do we need extended device probe information? */
471         if (device->device->page_size == 0 ||
472             device->device->erase_size == 0)
473         {
474                 if (device->bus_width == 8)
475                 {
476                         device->controller->read_data(device, id_buff+3);
477                         device->controller->read_data(device, id_buff+4);
478                         device->controller->read_data(device, id_buff+5);
479                 }
480                 else
481                 {
482                         u16 data_buf;
483
484                         device->controller->read_data(device, &data_buf);
485                         id_buff[3] = data_buf;
486
487                         device->controller->read_data(device, &data_buf);
488                         id_buff[4] = data_buf;
489
490                         device->controller->read_data(device, &data_buf);
491                         id_buff[5] = data_buf >> 8;
492                 }
493         }
494                 
495         /* page size */
496         if (device->device->page_size == 0)
497         {
498                 device->page_size = 1 << (10 + (id_buff[4] & 3));
499         }
500         else if (device->device->page_size == 256)
501         {
502                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
503                 return ERROR_NAND_OPERATION_FAILED;
504         }
505         else
506         {
507                 device->page_size = device->device->page_size;
508         }
509         
510         /* number of address cycles */
511         if (device->page_size <= 512)
512         {
513                 /* small page devices */
514                 if (device->device->chip_size <= 32)
515                         device->address_cycles = 3;
516                 else if (device->device->chip_size <= 8*1024)
517                         device->address_cycles = 4;
518                 else
519                 {
520                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
521                         device->address_cycles = 5;
522                 }
523         }
524         else
525         {
526                 /* large page devices */
527                 if (device->device->chip_size <= 128)
528                         device->address_cycles = 4;
529                 else if (device->device->chip_size <= 32*1024)
530                         device->address_cycles = 5;
531                 else
532                 {
533                         LOG_ERROR("BUG: small page NAND device with more than 32 GiB encountered");
534                         device->address_cycles = 6;
535                 }
536         }
537         
538         /* erase size */
539         if (device->device->erase_size == 0)
540         {
541                 switch ((id_buff[4] >> 4) & 3) {
542                 case 0:
543                         device->erase_size = 64 << 10;
544                         break;
545                 case 1:
546                         device->erase_size = 128 << 10;
547                         break;
548                 case 2:
549                         device->erase_size = 256 << 10;
550                         break;
551                 case 3:
552                         device->erase_size =512 << 10;
553                         break;
554                 }
555         }
556         else
557         {
558                 device->erase_size = device->device->erase_size;
559         }
560         
561         /* initialize controller, but leave parameters at the controllers default */
562         if ((retval = device->controller->init(device) != ERROR_OK))
563         {
564                 switch (retval)
565                 {
566                         case ERROR_NAND_OPERATION_FAILED:
567                                 LOG_DEBUG("controller initialization failed");
568                                 return ERROR_NAND_OPERATION_FAILED;
569                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
570                                 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
571                                         device->bus_width, device->address_cycles, device->page_size);
572                                 return ERROR_NAND_OPERATION_FAILED;
573                         default:
574                                 LOG_ERROR("BUG: unknown controller initialization failure");
575                                 return ERROR_NAND_OPERATION_FAILED;
576                 }
577         }
578         
579         device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024);
580         device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks);
581         
582         for (i = 0; i < device->num_blocks; i++)
583         {
584                 device->blocks[i].size = device->erase_size;
585                 device->blocks[i].offset = i * device->erase_size;
586                 device->blocks[i].is_erased = -1;
587                 device->blocks[i].is_bad = -1;
588         }
589         
590         return ERROR_OK;
591 }
592
593 int nand_erase(struct nand_device_s *device, int first_block, int last_block)
594 {
595         int i;
596         u32 page;
597         u8 status;
598         int retval;
599         
600         if (!device->device)
601                 return ERROR_NAND_DEVICE_NOT_PROBED;
602         
603         if ((first_block < 0) || (last_block > device->num_blocks))
604                 return ERROR_INVALID_ARGUMENTS;
605         
606         /* make sure we know if a block is bad before erasing it */
607         for (i = first_block; i <= last_block; i++)
608         {
609                 if (device->blocks[i].is_bad == -1)
610                 {
611                         nand_build_bbt(device, i, last_block);
612                         break;
613                 }
614         }
615         
616         for (i = first_block; i <= last_block; i++)
617         {
618                 /* Send erase setup command */
619                 device->controller->command(device, NAND_CMD_ERASE1);
620                 
621                 page = i * (device->erase_size / device->page_size);
622                 
623                 /* Send page address */
624                 if (device->page_size <= 512)
625                 {
626                         /* row */
627                         device->controller->address(device, page & 0xff);
628                         device->controller->address(device, (page >> 8) & 0xff);
629                         
630                         /* 3rd cycle only on devices with more than 32 MiB */
631                         if (device->address_cycles >= 4)
632                                 device->controller->address(device, (page >> 16) & 0xff);
633         
634                         /* 4th cycle only on devices with more than 8 GiB */
635                         if (device->address_cycles >= 5)
636                                 device->controller->address(device, (page >> 24) & 0xff);
637                 }
638                 else
639                 {
640                         /* row */
641                         device->controller->address(device, page & 0xff);
642                         device->controller->address(device, (page >> 8) & 0xff);
643         
644                         /* 3rd cycle only on devices with more than 128 MiB */
645                         if (device->address_cycles >= 5)
646                                 device->controller->address(device, (page >> 16) & 0xff);
647                 }
648                 
649                 /* Send erase confirm command */
650                 device->controller->command(device, NAND_CMD_ERASE2);
651                 
652                 if (!device->controller->nand_ready(device, 1000))
653                 {
654                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
655                         return ERROR_NAND_OPERATION_TIMEOUT;
656                 }
657                 
658                 if ((retval = nand_read_status(device, &status)) != ERROR_OK)
659                 {
660                         LOG_ERROR("couldn't read status");
661                         return ERROR_NAND_OPERATION_FAILED;
662                 }
663                 
664                 if (status & 0x1)
665                 {
666                         LOG_ERROR("erase operation didn't pass, status: 0x%2.2x", status);
667                         return ERROR_NAND_OPERATION_FAILED;
668                 }
669         }
670         
671         return ERROR_OK;
672 }
673
674 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
675 {
676         u8 *page;
677         
678         if (!device->device)
679                 return ERROR_NAND_DEVICE_NOT_PROBED;
680                 
681         if (address % device->page_size)
682         {
683                 LOG_ERROR("reads need to be page aligned");
684                 return ERROR_NAND_OPERATION_FAILED;
685         }
686         
687         page = malloc(device->page_size);
688         
689         while (data_size > 0 )
690         {
691                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
692                 u32 page_address;
693                 
694                 
695                 page_address = address / device->page_size;
696                 
697                 nand_read_page(device, page_address, page, device->page_size, NULL, 0);
698
699                 memcpy(data, page, thisrun_size);
700                 
701                 address += thisrun_size;
702                 data += thisrun_size;
703                 data_size -= thisrun_size;
704         }
705         
706         free(page);
707         
708         return ERROR_OK;
709 }
710
711 int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
712 {
713         u8 *page;
714         
715         if (!device->device)
716                 return ERROR_NAND_DEVICE_NOT_PROBED;
717                 
718         if (address % device->page_size)
719         {
720                 LOG_ERROR("writes need to be page aligned");
721                 return ERROR_NAND_OPERATION_FAILED;
722         }
723         
724         page = malloc(device->page_size);
725         
726         while (data_size > 0 )
727         {
728                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
729                 u32 page_address;
730                 
731                 memset(page, 0xff, device->page_size);
732                 memcpy(page, data, thisrun_size);
733                 
734                 page_address = address / device->page_size;
735                 
736                 nand_write_page(device, page_address, page, device->page_size, NULL, 0);
737                 
738                 address += thisrun_size;
739                 data += thisrun_size;
740                 data_size -= thisrun_size;
741         }
742         
743         free(page);
744         
745         return ERROR_OK;
746 }
747
748 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
749 {
750         if (!device->device)
751                 return ERROR_NAND_DEVICE_NOT_PROBED;
752                 
753         if (device->use_raw || device->controller->write_page == NULL)
754                 return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
755         else
756                 return device->controller->write_page(device, page, data, data_size, oob, oob_size);
757 }
758
759 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
760 {
761         if (!device->device)
762                 return ERROR_NAND_DEVICE_NOT_PROBED;
763                 
764         if (device->use_raw || device->controller->read_page == NULL)
765                 return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
766         else
767                 return device->controller->read_page(device, page, data, data_size, oob, oob_size);
768 }
769
770 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
771 {
772         int i;
773         
774         if (!device->device)
775                 return ERROR_NAND_DEVICE_NOT_PROBED;
776
777         if (device->page_size <= 512)
778         {
779                 /* small page device */
780                 if (data)
781                         device->controller->command(device, NAND_CMD_READ0);
782                 else
783                         device->controller->command(device, NAND_CMD_READOOB);
784                 
785                 /* column (always 0, we start at the beginning of a page/OOB area) */
786                 device->controller->address(device, 0x0);
787                 
788                 /* row */
789                 device->controller->address(device, page & 0xff);
790                 device->controller->address(device, (page >> 8) & 0xff);
791                 
792                 /* 4th cycle only on devices with more than 32 MiB */
793                 if (device->address_cycles >= 4)
794                         device->controller->address(device, (page >> 16) & 0xff);
795
796                 /* 5th cycle only on devices with more than 8 GiB */
797                 if (device->address_cycles >= 5)
798                         device->controller->address(device, (page >> 24) & 0xff);
799         }
800         else
801         {
802                 /* large page device */
803                 device->controller->command(device, NAND_CMD_READ0);
804                 
805                 /* column (0 when we start at the beginning of a page,
806                  * or 2048 for the beginning of OOB area)
807                  */
808                 device->controller->address(device, 0x0);
809                 if (data)
810                         device->controller->address(device, 0x0);
811                 else
812                         device->controller->address(device, 0x8);
813                 
814                 /* row */
815                 device->controller->address(device, page & 0xff);
816                 device->controller->address(device, (page >> 8) & 0xff);
817
818                 /* 5th cycle only on devices with more than 128 MiB */
819                 if (device->address_cycles >= 5)
820                         device->controller->address(device, (page >> 16) & 0xff);
821
822                 /* large page devices need a start command */
823                 device->controller->command(device, NAND_CMD_READSTART);
824         }
825         
826         if (!device->controller->nand_ready(device, 100))
827                 return ERROR_NAND_OPERATION_TIMEOUT;
828         
829         if (data)
830         {
831                 if (device->controller->read_block_data != NULL)
832                         (device->controller->read_block_data)(device, data, data_size);
833                 else
834                 {
835                         for (i = 0; i < data_size;)
836                         {
837                                 if (device->device->options & NAND_BUSWIDTH_16)
838                                 {
839                                         device->controller->read_data(device, data);
840                                         data += 2;
841                                         i += 2;
842                                 }
843                                 else
844                                 {
845                                         device->controller->read_data(device, data);
846                                         data += 1;
847                                         i += 1;
848                                 }
849                         }
850                 }
851         }
852         
853         if (oob)
854         {
855                 if (device->controller->read_block_data != NULL)
856                         (device->controller->read_block_data)(device, oob, oob_size);
857                 else
858                 {
859                         for (i = 0; i < oob_size;)
860                         {
861                                 if (device->device->options & NAND_BUSWIDTH_16)
862                                 {
863                                         device->controller->read_data(device, oob);
864                                         oob += 2;
865                                         i += 2;
866                                 }
867                                 else
868                                 {
869                                         device->controller->read_data(device, oob);
870                                         oob += 1;
871                                         i += 1;
872                                 }
873                         }
874                 }
875         }
876         
877         return ERROR_OK;        
878 }
879
880 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
881 {
882         int i;
883         int retval;
884         u8 status;
885         
886         if (!device->device)
887                 return ERROR_NAND_DEVICE_NOT_PROBED;
888
889         device->controller->command(device, NAND_CMD_SEQIN);
890         
891         if (device->page_size <= 512)
892         {
893                 /* column (always 0, we start at the beginning of a page/OOB area) */
894                 device->controller->address(device, 0x0);
895                 
896                 /* row */
897                 device->controller->address(device, page & 0xff);
898                 device->controller->address(device, (page >> 8) & 0xff);
899                 
900                 /* 4th cycle only on devices with more than 32 MiB */
901                 if (device->address_cycles >= 4)
902                         device->controller->address(device, (page >> 16) & 0xff);
903
904                 /* 5th cycle only on devices with more than 8 GiB */
905                 if (device->address_cycles >= 5)
906                         device->controller->address(device, (page >> 24) & 0xff);
907         }
908         else
909         {
910                 /* column (0 when we start at the beginning of a page,
911                  * or 2048 for the beginning of OOB area)
912                  */
913                 device->controller->address(device, 0x0);
914                 device->controller->address(device, 0x8);
915                 
916                 /* row */
917                 device->controller->address(device, page & 0xff);
918                 device->controller->address(device, (page >> 8) & 0xff);
919
920                 /* 5th cycle only on devices with more than 128 MiB */
921                 if (device->address_cycles >= 5)
922                         device->controller->address(device, (page >> 16) & 0xff);
923         }
924         
925         if (data)
926         {
927                 if (device->controller->write_block_data != NULL)
928                         (device->controller->write_block_data)(device, data, data_size);
929                 else
930                 {
931                         for (i = 0; i < data_size;)
932                         {
933                                 if (device->device->options & NAND_BUSWIDTH_16)
934                                 {
935                                         u16 data_buf = le_to_h_u16(data);
936                                         device->controller->write_data(device, data_buf);
937                                         data += 2;
938                                         i += 2;
939                                 }
940                                 else
941                                 {
942                                         device->controller->write_data(device, *data);
943                                         data += 1;
944                                         i += 1;
945                                 }
946                         }
947                 }
948         }
949         
950         if (oob)
951         {
952                 if (device->controller->write_block_data != NULL)
953                         (device->controller->write_block_data)(device, oob, oob_size);
954                 else
955                 {
956                         for (i = 0; i < oob_size;)
957                         {
958                                 if (device->device->options & NAND_BUSWIDTH_16)
959                                 {
960                                         u16 oob_buf = le_to_h_u16(data);
961                                         device->controller->write_data(device, oob_buf);
962                                         oob += 2;
963                                         i += 2;
964                                 }
965                                 else
966                                 {
967                                         device->controller->write_data(device, *oob);
968                                         oob += 1;
969                                         i += 1;
970                                 }
971                         }
972                 }
973         }
974         
975         device->controller->command(device, NAND_CMD_PAGEPROG);
976         
977         if (!device->controller->nand_ready(device, 100))
978                 return ERROR_NAND_OPERATION_TIMEOUT;
979         
980         if ((retval = nand_read_status(device, &status)) != ERROR_OK)
981         {
982                 LOG_ERROR("couldn't read status");
983                 return ERROR_NAND_OPERATION_FAILED;
984         }
985                 
986         if (status & NAND_STATUS_FAIL)
987         {
988                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
989                 return ERROR_NAND_OPERATION_FAILED;
990         }
991         
992         return ERROR_OK;        
993 }
994
995 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
996 {
997         nand_device_t *p;
998         int i = 0;
999         
1000         if (!nand_devices)
1001         {
1002                 command_print(cmd_ctx, "no NAND flash devices configured");
1003                 return ERROR_OK;
1004         }
1005         
1006         for (p = nand_devices; p; p = p->next)
1007         {
1008                 if (p->device)
1009                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1010                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1011                 else
1012                         command_print(cmd_ctx, "#%i: not probed");
1013         }
1014         
1015         return ERROR_OK;
1016 }
1017
1018 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1019 {
1020         nand_device_t *p;
1021         int i = 0;
1022         int j = 0;
1023         int first = -1;
1024         int last = -1;
1025                 
1026         if ((argc < 1) || (argc > 3))
1027         {
1028                 return ERROR_COMMAND_SYNTAX_ERROR;
1029
1030         }
1031         
1032         if (argc == 2)
1033         {
1034                 first = last = strtoul(args[1], NULL, 0);
1035         }
1036         else if (argc == 3)
1037         {
1038                 first = strtoul(args[1], NULL, 0);
1039                 last = strtoul(args[2], NULL, 0);
1040         }
1041                 
1042         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1043         if (p)
1044         {
1045                 if (p->device)
1046                 {
1047                         if (first >= p->num_blocks)
1048                                 first = p->num_blocks - 1;
1049                         
1050                         if (last >= p->num_blocks)
1051                                 last = p->num_blocks - 1;
1052                         
1053                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1054                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1055                         
1056                         for (j = first; j <= last; j++)
1057                         {
1058                                 char *erase_state, *bad_state;
1059                                 
1060                                 if (p->blocks[j].is_erased == 0)
1061                                         erase_state = "not erased";
1062                                 else if (p->blocks[j].is_erased == 1)
1063                                         erase_state = "erased";
1064                                 else
1065                                         erase_state = "erase state unknown";
1066                                 
1067                                 if (p->blocks[j].is_bad == 0)
1068                                         bad_state = "";
1069                                 else if (p->blocks[j].is_bad == 1)
1070                                         bad_state = " (marked bad)";
1071                                 else
1072                                         bad_state = " (block condition unknown)";
1073
1074                                 command_print(cmd_ctx, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1075                                                         j, p->blocks[j].offset, p->blocks[j].size / 1024,
1076                                                         erase_state, bad_state);
1077                         }
1078                 }
1079                 else
1080                 {
1081                         command_print(cmd_ctx, "#%i: not probed");
1082                 }
1083         }
1084         
1085         return ERROR_OK;
1086 }
1087
1088 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1089 {
1090         nand_device_t *p;
1091         int retval;
1092                 
1093         if (argc != 1)
1094         {
1095                 return ERROR_COMMAND_SYNTAX_ERROR;
1096         }
1097         
1098         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1099         if (p)
1100         {
1101                 if ((retval = nand_probe(p)) == ERROR_OK)
1102                 {
1103                         command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name);
1104                 }
1105                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1106                 {
1107                         command_print(cmd_ctx, "probing failed for NAND flash device");
1108                 }
1109                 else
1110                 {
1111                         command_print(cmd_ctx, "unknown error when probing NAND flash device");
1112                 }
1113         }
1114         else
1115         {
1116                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1117         }
1118         
1119         return ERROR_OK;
1120 }
1121
1122 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1123 {
1124         nand_device_t *p;
1125         int retval;
1126                 
1127         if (argc != 3)
1128         {
1129                 return ERROR_COMMAND_SYNTAX_ERROR;
1130
1131         }
1132         
1133         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1134         if (p)
1135         {
1136                 int first = strtoul(args[1], NULL, 0);
1137                 int last = strtoul(args[2], NULL, 0);
1138                 
1139                 if ((retval = nand_erase(p, first, last)) == ERROR_OK)
1140                 {
1141                         command_print(cmd_ctx, "successfully erased blocks %i to %i on NAND flash device '%s'", first, last, p->device->name);
1142                 }
1143                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1144                 {
1145                         command_print(cmd_ctx, "erase failed");
1146                 }
1147                 else
1148                 {
1149                         command_print(cmd_ctx, "unknown error when erasing NAND flash device");
1150                 }
1151         }
1152         else
1153         {
1154                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1155         }
1156         
1157         return ERROR_OK;
1158 }
1159
1160 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1161 {
1162         nand_device_t *p;
1163         int retval;
1164         int first = -1;
1165         int last = -1;
1166                 
1167         if ((argc < 1) || (argc > 3) || (argc == 2))
1168         {
1169                 return ERROR_COMMAND_SYNTAX_ERROR;
1170
1171         }
1172         
1173         if (argc == 3)
1174         {
1175                 first = strtoul(args[1], NULL, 0);
1176                 last = strtoul(args[2], NULL, 0);
1177         }
1178         
1179         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1180         if (p)
1181         {
1182                 if ((retval = nand_build_bbt(p, first, last)) == ERROR_OK)
1183                 {
1184                         command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p->device->name);
1185                 }
1186                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1187                 {
1188                         command_print(cmd_ctx, "error when checking for bad blocks on NAND flash device");
1189                 }
1190                 else
1191                 {
1192                         command_print(cmd_ctx, "unknown error when checking for bad blocks on NAND flash device");
1193                 }
1194         }
1195         else
1196         {
1197                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1198         }
1199         
1200         return ERROR_OK;
1201 }
1202
1203 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1204 {
1205         nand_device_t *p;
1206                 
1207         if (argc != 4)
1208         {
1209                 return ERROR_COMMAND_SYNTAX_ERROR;
1210
1211         }
1212         
1213         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1214         if (p)
1215         {
1216
1217         }
1218         else
1219         {
1220                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1221         }
1222         
1223         return ERROR_OK;
1224 }
1225
1226 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1227 {
1228         u32 offset;
1229         u32 binary_size;
1230         u32 buf_cnt;
1231         enum oob_formats oob_format = NAND_OOB_NONE;
1232         
1233         fileio_t fileio;
1234         
1235         duration_t duration;
1236         char *duration_text;
1237         
1238         nand_device_t *p;
1239                 
1240         if (argc < 3)
1241         {
1242                 return ERROR_COMMAND_SYNTAX_ERROR;
1243
1244         }
1245         
1246         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1247         if (p)
1248         {
1249                 u8 *page = NULL;
1250                 u32 page_size = 0;
1251                 u8 *oob = NULL;
1252                 u32 oob_size = 0;
1253                         
1254                 duration_start_measure(&duration);
1255                 offset = strtoul(args[2], NULL, 0);
1256                 
1257                 if (argc > 3)
1258                 {
1259                         int i;
1260                         for (i = 3; i < argc; i++)
1261                         {
1262                                 if (!strcmp(args[i], "oob_raw"))
1263                                         oob_format |= NAND_OOB_RAW;
1264                                 else if (!strcmp(args[i], "oob_only"))
1265                                         oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1266                                 else
1267                                 {
1268                                         command_print(cmd_ctx, "unknown option: %s", args[i]);
1269                                 }
1270                         }
1271                 }
1272                 
1273                 if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK)
1274                 {
1275                         return ERROR_OK;
1276                 }
1277         
1278                 buf_cnt = binary_size = fileio.size;
1279                 
1280                 if (!(oob_format & NAND_OOB_ONLY))
1281                 {
1282                         page_size = p->page_size;
1283                         page = malloc(p->page_size);
1284                 }
1285
1286                 if (oob_format & NAND_OOB_RAW)
1287                 {
1288                         if (p->page_size == 512)
1289                                 oob_size = 16;
1290                         else if (p->page_size == 2048)
1291                                 oob_size = 64;
1292                         oob = malloc(oob_size);
1293                 }
1294                 
1295                 if (offset % p->page_size)
1296                 {
1297                         command_print(cmd_ctx, "only page size aligned offsets and sizes are supported");
1298                         fileio_close(&fileio);
1299                         free(oob);
1300                         free(page);
1301                         return ERROR_OK;
1302                 }
1303                 
1304                 while (buf_cnt > 0)
1305                 {
1306                         u32 size_read;
1307                         
1308                         if (NULL != page)
1309                         {
1310                                 fileio_read(&fileio, page_size, page, &size_read);
1311                                 buf_cnt -= size_read;
1312                                 if (size_read < page_size)
1313                                 {
1314                                         memset(page + size_read, 0xff, page_size - size_read);
1315                                 }
1316                         }
1317                                 
1318                         if (NULL != oob)
1319                         {
1320                                 fileio_read(&fileio, oob_size, oob, &size_read);
1321                                 buf_cnt -= size_read;
1322                                 if (size_read < oob_size)
1323                                 {
1324                                         memset(oob + size_read, 0xff, oob_size - size_read);
1325                                 }
1326                         }
1327                         
1328                         if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK)
1329                         {
1330                                 command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1331                                         args[1], args[0], offset);
1332
1333                                 fileio_close(&fileio);
1334                                 free(oob);
1335                                 free(page);
1336
1337                                 return ERROR_OK;
1338                         }
1339                         offset += page_size;
1340                 }
1341
1342                 fileio_close(&fileio);
1343                 free(oob);
1344                 free(page);
1345                 oob = NULL;
1346                 page = NULL;
1347                 duration_stop_measure(&duration, &duration_text);
1348                 command_print(cmd_ctx, "wrote file %s to NAND flash %s at offset 0x%8.8x in %s",
1349                         args[1], args[0], offset, duration_text);
1350                 free(duration_text);
1351                 duration_text = NULL;
1352         }
1353         else
1354         {
1355                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1356         }
1357         
1358         return ERROR_OK;
1359 }
1360
1361 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1362 {
1363         nand_device_t *p;
1364                         
1365         if (argc < 4)
1366         {
1367                 return ERROR_COMMAND_SYNTAX_ERROR;
1368         }
1369         
1370         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1371         if (p)
1372         {
1373                 if (p->device)
1374                 {
1375                         fileio_t fileio;
1376                         duration_t duration;
1377                         char *duration_text;
1378                         int retval;
1379                         
1380                         u8 *page = NULL;
1381                         u32 page_size = 0;
1382                         u8 *oob = NULL;
1383                         u32 oob_size = 0;
1384                         u32 address = strtoul(args[2], NULL, 0);
1385                         u32 size = strtoul(args[3], NULL, 0);
1386                         u32 bytes_done = 0;
1387                         enum oob_formats oob_format = NAND_OOB_NONE;
1388                         
1389                         if (argc > 4)
1390                         {
1391                                 int i;
1392                                 for (i = 4; i < argc; i++)
1393                                 {
1394                                         if (!strcmp(args[i], "oob_raw"))
1395                                                 oob_format |= NAND_OOB_RAW;
1396                                         else if (!strcmp(args[i], "oob_only"))
1397                                                 oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1398                                         else
1399                                                 command_print(cmd_ctx, "unknown option: '%s'", args[i]); 
1400                                 }
1401                         }
1402                         
1403                         if ((address % p->page_size) || (size % p->page_size))
1404                         {
1405                                 command_print(cmd_ctx, "only page size aligned addresses and sizes are supported");
1406                                 return ERROR_OK;
1407                         }
1408                 
1409                         if (!(oob_format & NAND_OOB_ONLY))
1410                         {
1411                                 page_size = p->page_size;
1412                                 page = malloc(p->page_size);
1413                         }
1414
1415                         if (oob_format & NAND_OOB_RAW)
1416                         {
1417                                 if (p->page_size == 512)
1418                                         oob_size = 16;
1419                                 else if (p->page_size == 2048)
1420                                         oob_size = 64;
1421                                 oob = malloc(oob_size);
1422                         }
1423                         
1424                         if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK)
1425                         {
1426                                 return ERROR_OK;
1427                         }
1428         
1429                         duration_start_measure(&duration);
1430                         
1431                         while (size > 0)
1432                         {
1433                                 u32 size_written;
1434                                 if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK)
1435                                 {
1436                                         command_print(cmd_ctx, "reading NAND flash page failed");
1437                                         free(page);
1438                                         free(oob);                                                              
1439                                         fileio_close(&fileio);
1440                                         return ERROR_OK;
1441                                 }
1442                                 
1443                                 if (NULL != page)
1444                                 {
1445                                         fileio_write(&fileio, page_size, page, &size_written);
1446                                         bytes_done += page_size;
1447                                 }
1448                                         
1449                                 if (NULL != oob)
1450                                 {
1451                                         fileio_write(&fileio, oob_size, oob, &size_written);
1452                                         bytes_done += oob_size;
1453                                 }
1454                                         
1455                                 size -= p->page_size;
1456                                 address += p->page_size;
1457                         }
1458                         
1459                         free(page);
1460                         page = NULL;
1461                         free(oob);
1462                         oob = NULL;
1463                         fileio_close(&fileio);
1464
1465                         duration_stop_measure(&duration, &duration_text);
1466                         command_print(cmd_ctx, "dumped %"PRIi64" byte in %s", fileio.size, duration_text);
1467                         free(duration_text);
1468                         duration_text = NULL;
1469                 }
1470                 else
1471                 {
1472                         command_print(cmd_ctx, "#%i: not probed");
1473                 }
1474         }
1475         else
1476         {
1477                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1478         }
1479         
1480         return ERROR_OK;
1481 }
1482
1483 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1484 {
1485         nand_device_t *p;
1486                 
1487         if ((argc < 1) || (argc > 2))
1488         {
1489                 return ERROR_COMMAND_SYNTAX_ERROR;
1490         }
1491         
1492         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1493         if (p)
1494         {
1495                 if (p->device)
1496                 {
1497                         if (argc == 2)
1498                         {
1499                                 if (strcmp("enable", args[1]) == 0)
1500                                 {
1501                                         p->use_raw = 1;
1502                                 }
1503                                 else if (strcmp("disable", args[1]) == 0)
1504                                 {
1505                                         p->use_raw = 0;
1506                                 }
1507                                 else
1508                                 {
1509                                         return ERROR_COMMAND_SYNTAX_ERROR;
1510                                 }
1511                         }
1512         
1513                         command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled");
1514                 }
1515                 else
1516                 {
1517                         command_print(cmd_ctx, "#%i: not probed");
1518                 }
1519         }
1520         else
1521         {
1522                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1523         }
1524         
1525         return ERROR_OK;
1526 }