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   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
   6  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program; if not, write to the                         *
  20  *   Free Software Foundation, Inc.,                                       *
  21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  22  ***************************************************************************/
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "nand.h"
  28 #include "common.h"
  29 #include "time_support.h"
  30 #include "fileio.h"
  31
  32 static int nand_read_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
  33 //static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size);
  34
  35 static int nand_write_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
  36
  37 /* NAND flash controller
  38  */
  39 extern struct nand_flash_controller davinci_nand_controller;
  40 extern struct nand_flash_controller lpc3180_nand_controller;
  41 extern struct nand_flash_controller orion_nand_controller;
  42 extern struct nand_flash_controller s3c2410_nand_controller;
  43 extern struct nand_flash_controller s3c2412_nand_controller;
  44 extern struct nand_flash_controller s3c2440_nand_controller;
  45 extern struct nand_flash_controller s3c2443_nand_controller;
  46 extern struct nand_flash_controller imx31_nand_flash_controller;
  47
  48 /* extern struct nand_flash_controller boundary_scan_nand_controller; */
  49
  50 static struct nand_flash_controller *nand_flash_controllers[] =
  51 {
  52         &davinci_nand_controller,
  53         &lpc3180_nand_controller,
  54         &orion_nand_controller,
  55         &s3c2410_nand_controller,
  56         &s3c2412_nand_controller,
  57         &s3c2440_nand_controller,
  58         &s3c2443_nand_controller,
  59         &imx31_nand_flash_controller,
  60 /*      &boundary_scan_nand_controller, */
  61         NULL
  62 };
  63
  64 /* configured NAND devices and NAND Flash command handler */
  65 static struct nand_device *nand_devices = NULL;
  66 static struct command *nand_cmd;
  67
  68 /*      Chip ID list
  69  *
  70  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  71  *      options
  72  *
  73  *      Pagesize; 0, 256, 512
  74  *      0       get this information from the extended chip ID
  75  *      256     256 Byte page size
  76  *      512     512 Byte page size
  77  */
  78 static struct nand_info nand_flash_ids[] =
  79 {
  80         /* start "museum" IDs */
  81         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
  82         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
  83         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
  84         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
  85         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
  86         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
  87         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
  88         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
  89         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
  90         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
  91
  92         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
  93         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
  94         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
  95         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
  96         /* end "museum" IDs */
  97
  98         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
  99         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
 100         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 101         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 102
 103         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
 104         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
 105         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 106         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 107
 108         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
 109         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
 110         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 111         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 112
 113         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
 114         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
 115         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
 116         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 117         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 118         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 119         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 120
 121         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
 122
 123         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
 124         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
 125         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
 126         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
 127
 128         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
 129         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
 130         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
 131         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
 132
 133         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
 134         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
 135         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
 136         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
 137
 138         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
 139         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
 140         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
 141         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
 142
 143         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
 144         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
 145         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
 146         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
 147
 148         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
 149         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
 150         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
 151         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
 152
 153         {NULL, 0, 0, 0, 0, 0 }
 154 };
 155
 156 /* Manufacturer ID list
 157  */
 158 static struct nand_manufacturer nand_manuf_ids[] =
 159 {
 160         {0x0, "unknown"},
 161         {NAND_MFR_TOSHIBA, "Toshiba"},
 162         {NAND_MFR_SAMSUNG, "Samsung"},
 163         {NAND_MFR_FUJITSU, "Fujitsu"},
 164         {NAND_MFR_NATIONAL, "National"},
 165         {NAND_MFR_RENESAS, "Renesas"},
 166         {NAND_MFR_STMICRO, "ST Micro"},
 167         {NAND_MFR_HYNIX, "Hynix"},
 168         {NAND_MFR_MICRON, "Micron"},
 169         {0x0, NULL},
 170 };
 171
 172 /*
 173  * Define default oob placement schemes for large and small page devices
 174  */
 175
 176 #if 0
 177 static struct nand_ecclayout nand_oob_8 = {
 178         .eccbytes = 3,
 179         .eccpos = {0, 1, 2},
 180         .oobfree = {
 181                 {.offset = 3,
 182                  .length = 2},
 183                 {.offset = 6,
 184                  .length = 2}}
 185 };
 186 #endif
 187
 188 static struct nand_ecclayout nand_oob_16 = {
 189         .eccbytes = 6,
 190         .eccpos = {0, 1, 2, 3, 6, 7},
 191         .oobfree = {
 192                 {.offset = 8,
 193                  . length = 8}}
 194 };
 195
 196 static struct nand_ecclayout nand_oob_64 = {
 197         .eccbytes = 24,
 198         .eccpos = {
 199                    40, 41, 42, 43, 44, 45, 46, 47,
 200                    48, 49, 50, 51, 52, 53, 54, 55,
 201                    56, 57, 58, 59, 60, 61, 62, 63},
 202         .oobfree = {
 203                 {.offset = 2,
 204                  .length = 38}}
 205 };
 206
 207 COMMAND_HANDLER(handle_nand_list_drivers)
 208 {
 209         command_print(CMD_CTX, "Available NAND flash controller drivers:");
 210         for (unsigned i = 0; nand_flash_controllers[i]; i++)
 211                 command_print(CMD_CTX, "  %s", nand_flash_controllers[i]->name);
 212         return ERROR_OK;
 213 }
 214
 215 static COMMAND_HELPER(create_nand_device, const char *bank_name,
 216                 struct nand_flash_controller *controller)
 217 {
 218         int retval = controller->register_commands(CMD_CTX);
 219         if (ERROR_OK != retval)
 220         {
 221                 LOG_ERROR("couldn't register '%s' commands", controller->name);
 222                 return retval;
 223         }
 224         struct nand_device *c = malloc(sizeof(struct nand_device));
 225
 226         c->name = strdup(bank_name);
 227         c->controller = controller;
 228         c->controller_priv = NULL;
 229         c->manufacturer = NULL;
 230         c->device = NULL;
 231         c->bus_width = 0;
 232         c->address_cycles = 0;
 233         c->page_size = 0;
 234         c->use_raw = 0;
 235         c->next = NULL;
 236
 237         retval = CALL_COMMAND_HANDLER(controller->nand_device_command, c);
 238         if (ERROR_OK != retval)
 239         {
 240                 LOG_ERROR("'%s' driver rejected nand flash", controller->name);
 241                 free(c);
 242                 return ERROR_OK;
 243         }
 244
 245         if (nand_devices) {
 246                 struct nand_device *p = nand_devices;
 247                 while (p && p->next) p = p->next;
 248                 p->next = c;
 249         } else
 250                 nand_devices = c;
 251
 252         return ERROR_OK;
 253 }
 254
 255 COMMAND_HANDLER(handle_nand_device_command)
 256 {
 257         if (CMD_ARGC < 1)
 258         {
 259                 LOG_ERROR("incomplete nand device configuration");
 260                 return ERROR_FLASH_BANK_INVALID;
 261         }
 262
 263         // save name and increment (for compatibility) with drivers
 264         const char *bank_name = *CMD_ARGV++;
 265         CMD_ARGC--;
 266
 267         const char *driver_name = CMD_ARGV[0];
 268         for (unsigned i = 0; nand_flash_controllers[i]; i++)
 269         {
 270                 struct nand_flash_controller *controller = nand_flash_controllers[i];
 271                 if (strcmp(driver_name, controller->name) != 0)
 272                         continue;
 273
 274                 return CALL_COMMAND_HANDLER(create_nand_device,
 275                                 bank_name, controller);
 276         }
 277
 278         LOG_ERROR("No valid NAND flash driver found (%s)", driver_name);
 279         return CALL_COMMAND_HANDLER(handle_nand_list_drivers);
 280 }
 281
 282 int nand_register_commands(struct command_context *cmd_ctx)
 283 {
 284         nand_cmd = register_command(cmd_ctx, NULL, "nand",
 285                         NULL, COMMAND_ANY, "NAND specific commands");
 286
 287         register_command(cmd_ctx, nand_cmd, "device",
 288                         &handle_nand_device_command, COMMAND_CONFIG,
 289                         "defines a new NAND bank");
 290         register_command(cmd_ctx, nand_cmd, "drivers",
 291                         &handle_nand_list_drivers, COMMAND_ANY,
 292                         "lists available NAND drivers");
 293
 294         return ERROR_OK;
 295 }
 296
 297 struct nand_device *get_nand_device_by_name(const char *name)
 298 {
 299         unsigned requested = get_flash_name_index(name);
 300         unsigned found = 0;
 301
 302         struct nand_device *nand;
 303         for (nand = nand_devices; NULL != nand; nand = nand->next)
 304         {
 305                 if (strcmp(nand->name, name) == 0)
 306                         return nand;
 307                 if (!flash_driver_name_matches(nand->controller->name, name))
 308                         continue;
 309                 if (++found < requested)
 310                         continue;
 311                 return nand;
 312         }
 313         return NULL;
 314 }
 315
 316 struct nand_device *get_nand_device_by_num(int num)
 317 {
 318         struct nand_device *p;
 319         int i = 0;
 320
 321         for (p = nand_devices; p; p = p->next)
 322         {
 323                 if (i++ == num)
 324                 {
 325                         return p;
 326                 }
 327         }
 328
 329         return NULL;
 330 }
 331
 332 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 333                 struct nand_device **nand)
 334 {
 335         const char *str = CMD_ARGV[name_index];
 336         *nand = get_nand_device_by_name(str);
 337         if (*nand)
 338                 return ERROR_OK;
 339
 340         unsigned num;
 341         COMMAND_PARSE_NUMBER(uint, str, num);
 342         *nand = get_nand_device_by_num(num);
 343         if (!*nand) {
 344                 command_print(CMD_CTX, "NAND flash device '%s' not found", str);
 345                 return ERROR_INVALID_ARGUMENTS;
 346         }
 347         return ERROR_OK;
 348 }
 349
 350 static int nand_build_bbt(struct nand_device *nand, int first, int last)
 351 {
 352         uint32_t page = 0x0;
 353         int i;
 354         uint8_t oob[6];
 355
 356         if ((first < 0) || (first >= nand->num_blocks))
 357                 first = 0;
 358
 359         if ((last >= nand->num_blocks) || (last == -1))
 360                 last = nand->num_blocks - 1;
 361
 362         for (i = first; i < last; i++)
 363         {
 364                 nand_read_page(nand, page, NULL, 0, oob, 6);
 365
 366                 if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 367                         || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
 368                                 ((nand->page_size == 2048) && (oob[0] != 0xff))))
 369                 {
 370                         LOG_WARNING("bad block: %i", i);
 371                         nand->blocks[i].is_bad = 1;
 372                 }
 373                 else
 374                 {
 375                         nand->blocks[i].is_bad = 0;
 376                 }
 377
 378                 page += (nand->erase_size / nand->page_size);
 379         }
 380
 381         return ERROR_OK;
 382 }
 383
 384 int nand_read_status(struct nand_device *nand, uint8_t *status)
 385 {
 386         if (!nand->device)
 387                 return ERROR_NAND_DEVICE_NOT_PROBED;
 388
 389         /* Send read status command */
 390         nand->controller->command(nand, NAND_CMD_STATUS);
 391
 392         alive_sleep(1);
 393
 394         /* read status */
 395         if (nand->device->options & NAND_BUSWIDTH_16)
 396         {
 397                 uint16_t data;
 398                 nand->controller->read_data(nand, &data);
 399                 *status = data & 0xff;
 400         }
 401         else
 402         {
 403                 nand->controller->read_data(nand, status);
 404         }
 405
 406         return ERROR_OK;
 407 }
 408
 409 static int nand_poll_ready(struct nand_device *nand, int timeout)
 410 {
 411         uint8_t status;
 412
 413         nand->controller->command(nand, NAND_CMD_STATUS);
 414         do {
 415                 if (nand->device->options & NAND_BUSWIDTH_16) {
 416                         uint16_t data;
 417                         nand->controller->read_data(nand, &data);
 418                         status = data & 0xff;
 419                 } else {
 420                         nand->controller->read_data(nand, &status);
 421                 }
 422                 if (status & NAND_STATUS_READY)
 423                         break;
 424                 alive_sleep(1);
 425         } while (timeout--);
 426
 427         return (status & NAND_STATUS_READY) != 0;
 428 }
 429
 430 int nand_probe(struct nand_device *nand)
 431 {
 432         uint8_t manufacturer_id, device_id;
 433         uint8_t id_buff[6];
 434         int retval;
 435         int i;
 436
 437         /* clear device data */
 438         nand->device = NULL;
 439         nand->manufacturer = NULL;
 440
 441         /* clear device parameters */
 442         nand->bus_width = 0;
 443         nand->address_cycles = 0;
 444         nand->page_size = 0;
 445         nand->erase_size = 0;
 446
 447         /* initialize controller (device parameters are zero, use controller default) */
 448         if ((retval = nand->controller->init(nand) != ERROR_OK))
 449         {
 450                 switch (retval)
 451                 {
 452                         case ERROR_NAND_OPERATION_FAILED:
 453                                 LOG_DEBUG("controller initialization failed");
 454                                 return ERROR_NAND_OPERATION_FAILED;
 455                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 456                                 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
 457                                 return ERROR_NAND_OPERATION_FAILED;
 458                         default:
 459                                 LOG_ERROR("BUG: unknown controller initialization failure");
 460                                 return ERROR_NAND_OPERATION_FAILED;
 461                 }
 462         }
 463
 464         nand->controller->command(nand, NAND_CMD_RESET);
 465         nand->controller->reset(nand);
 466
 467         nand->controller->command(nand, NAND_CMD_READID);
 468         nand->controller->address(nand, 0x0);
 469
 470         if (nand->bus_width == 8)
 471         {
 472                 nand->controller->read_data(nand, &manufacturer_id);
 473                 nand->controller->read_data(nand, &device_id);
 474         }
 475         else
 476         {
 477                 uint16_t data_buf;
 478                 nand->controller->read_data(nand, &data_buf);
 479                 manufacturer_id = data_buf & 0xff;
 480                 nand->controller->read_data(nand, &data_buf);
 481                 device_id = data_buf & 0xff;
 482         }
 483
 484         for (i = 0; nand_flash_ids[i].name; i++)
 485         {
 486                 if (nand_flash_ids[i].id == device_id)
 487                 {
 488                         nand->device = &nand_flash_ids[i];
 489                         break;
 490                 }
 491         }
 492
 493         for (i = 0; nand_manuf_ids[i].name; i++)
 494         {
 495                 if (nand_manuf_ids[i].id == manufacturer_id)
 496                 {
 497                         nand->manufacturer = &nand_manuf_ids[i];
 498                         break;
 499                 }
 500         }
 501
 502         if (!nand->manufacturer)
 503         {
 504                 nand->manufacturer = &nand_manuf_ids[0];
 505                 nand->manufacturer->id = manufacturer_id;
 506         }
 507
 508         if (!nand->device)
 509         {
 510                 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 511                         manufacturer_id, device_id);
 512                 return ERROR_NAND_OPERATION_FAILED;
 513         }
 514
 515         LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
 516
 517         /* initialize device parameters */
 518
 519         /* bus width */
 520         if (nand->device->options & NAND_BUSWIDTH_16)
 521                 nand->bus_width = 16;
 522         else
 523                 nand->bus_width = 8;
 524
 525         /* Do we need extended device probe information? */
 526         if (nand->device->page_size == 0 ||
 527             nand->device->erase_size == 0)
 528         {
 529                 if (nand->bus_width == 8)
 530                 {
 531                         nand->controller->read_data(nand, id_buff + 3);
 532                         nand->controller->read_data(nand, id_buff + 4);
 533                         nand->controller->read_data(nand, id_buff + 5);
 534                 }
 535                 else
 536                 {
 537                         uint16_t data_buf;
 538
 539                         nand->controller->read_data(nand, &data_buf);
 540                         id_buff[3] = data_buf;
 541
 542                         nand->controller->read_data(nand, &data_buf);
 543                         id_buff[4] = data_buf;
 544
 545                         nand->controller->read_data(nand, &data_buf);
 546                         id_buff[5] = data_buf >> 8;
 547                 }
 548         }
 549
 550         /* page size */
 551         if (nand->device->page_size == 0)
 552         {
 553                 nand->page_size = 1 << (10 + (id_buff[4] & 3));
 554         }
 555         else if (nand->device->page_size == 256)
 556         {
 557                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
 558                 return ERROR_NAND_OPERATION_FAILED;
 559         }
 560         else
 561         {
 562                 nand->page_size = nand->device->page_size;
 563         }
 564
 565         /* number of address cycles */
 566         if (nand->page_size <= 512)
 567         {
 568                 /* small page devices */
 569                 if (nand->device->chip_size <= 32)
 570                         nand->address_cycles = 3;
 571                 else if (nand->device->chip_size <= 8*1024)
 572                         nand->address_cycles = 4;
 573                 else
 574                 {
 575                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 576                         nand->address_cycles = 5;
 577                 }
 578         }
 579         else
 580         {
 581                 /* large page devices */
 582                 if (nand->device->chip_size <= 128)
 583                         nand->address_cycles = 4;
 584                 else if (nand->device->chip_size <= 32*1024)
 585                         nand->address_cycles = 5;
 586                 else
 587                 {
 588                         LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 589                         nand->address_cycles = 6;
 590                 }
 591         }
 592
 593         /* erase size */
 594         if (nand->device->erase_size == 0)
 595         {
 596                 switch ((id_buff[4] >> 4) & 3) {
 597                 case 0:
 598                         nand->erase_size = 64 << 10;
 599                         break;
 600                 case 1:
 601                         nand->erase_size = 128 << 10;
 602                         break;
 603                 case 2:
 604                         nand->erase_size = 256 << 10;
 605                         break;
 606                 case 3:
 607                         nand->erase_size =512 << 10;
 608                         break;
 609                 }
 610         }
 611         else
 612         {
 613                 nand->erase_size = nand->device->erase_size;
 614         }
 615
 616         /* initialize controller, but leave parameters at the controllers default */
 617         if ((retval = nand->controller->init(nand) != ERROR_OK))
 618         {
 619                 switch (retval)
 620                 {
 621                         case ERROR_NAND_OPERATION_FAILED:
 622                                 LOG_DEBUG("controller initialization failed");
 623                                 return ERROR_NAND_OPERATION_FAILED;
 624                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 625                                 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 626                                         nand->bus_width, nand->address_cycles, nand->page_size);
 627                                 return ERROR_NAND_OPERATION_FAILED;
 628                         default:
 629                                 LOG_ERROR("BUG: unknown controller initialization failure");
 630                                 return ERROR_NAND_OPERATION_FAILED;
 631                 }
 632         }
 633
 634         nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
 635         nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
 636
 637         for (i = 0; i < nand->num_blocks; i++)
 638         {
 639                 nand->blocks[i].size = nand->erase_size;
 640                 nand->blocks[i].offset = i * nand->erase_size;
 641                 nand->blocks[i].is_erased = -1;
 642                 nand->blocks[i].is_bad = -1;
 643         }
 644
 645         return ERROR_OK;
 646 }
 647
 648 static int nand_erase(struct nand_device *nand, int first_block, int last_block)
 649 {
 650         int i;
 651         uint32_t page;
 652         uint8_t status;
 653         int retval;
 654
 655         if (!nand->device)
 656                 return ERROR_NAND_DEVICE_NOT_PROBED;
 657
 658         if ((first_block < 0) || (last_block > nand->num_blocks))
 659                 return ERROR_INVALID_ARGUMENTS;
 660
 661         /* make sure we know if a block is bad before erasing it */
 662         for (i = first_block; i <= last_block; i++)
 663         {
 664                 if (nand->blocks[i].is_bad == -1)
 665                 {
 666                         nand_build_bbt(nand, i, last_block);
 667                         break;
 668                 }
 669         }
 670
 671         for (i = first_block; i <= last_block; i++)
 672         {
 673                 /* Send erase setup command */
 674                 nand->controller->command(nand, NAND_CMD_ERASE1);
 675
 676                 page = i * (nand->erase_size / nand->page_size);
 677
 678                 /* Send page address */
 679                 if (nand->page_size <= 512)
 680                 {
 681                         /* row */
 682                         nand->controller->address(nand, page & 0xff);
 683                         nand->controller->address(nand, (page >> 8) & 0xff);
 684
 685                         /* 3rd cycle only on devices with more than 32 MiB */
 686                         if (nand->address_cycles >= 4)
 687                                 nand->controller->address(nand, (page >> 16) & 0xff);
 688
 689                         /* 4th cycle only on devices with more than 8 GiB */
 690                         if (nand->address_cycles >= 5)
 691                                 nand->controller->address(nand, (page >> 24) & 0xff);
 692                 }
 693                 else
 694                 {
 695                         /* row */
 696                         nand->controller->address(nand, page & 0xff);
 697                         nand->controller->address(nand, (page >> 8) & 0xff);
 698
 699                         /* 3rd cycle only on devices with more than 128 MiB */
 700                         if (nand->address_cycles >= 5)
 701                                 nand->controller->address(nand, (page >> 16) & 0xff);
 702                 }
 703
 704                 /* Send erase confirm command */
 705                 nand->controller->command(nand, NAND_CMD_ERASE2);
 706
 707                 retval = nand->controller->nand_ready ?
 708                                 nand->controller->nand_ready(nand, 1000) :
 709                                 nand_poll_ready(nand, 1000);
 710                 if (!retval) {
 711                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 712                         return ERROR_NAND_OPERATION_TIMEOUT;
 713                 }
 714
 715                 if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
 716                 {
 717                         LOG_ERROR("couldn't read status");
 718                         return ERROR_NAND_OPERATION_FAILED;
 719                 }
 720
 721                 if (status & 0x1)
 722                 {
 723                         LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
 724                                         (nand->blocks[i].is_bad == 1)
 725                                                 ? "bad " : "",
 726                                         i, status);
 727                         /* continue; other blocks might still be erasable */
 728                 }
 729
 730                 nand->blocks[i].is_erased = 1;
 731         }
 732
 733         return ERROR_OK;
 734 }
 735
 736 #if 0
 737 static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
 738 {
 739         uint8_t *page;
 740
 741         if (!nand->device)
 742                 return ERROR_NAND_DEVICE_NOT_PROBED;
 743
 744         if (address % nand->page_size)
 745         {
 746                 LOG_ERROR("reads need to be page aligned");
 747                 return ERROR_NAND_OPERATION_FAILED;
 748         }
 749
 750         page = malloc(nand->page_size);
 751
 752         while (data_size > 0)
 753         {
 754                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 755                 uint32_t page_address;
 756
 757
 758                 page_address = address / nand->page_size;
 759
 760                 nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
 761
 762                 memcpy(data, page, thisrun_size);
 763
 764                 address += thisrun_size;
 765                 data += thisrun_size;
 766                 data_size -= thisrun_size;
 767         }
 768
 769         free(page);
 770
 771         return ERROR_OK;
 772 }
 773
 774 static int nand_write_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
 775 {
 776         uint8_t *page;
 777
 778         if (!nand->device)
 779                 return ERROR_NAND_DEVICE_NOT_PROBED;
 780
 781         if (address % nand->page_size)
 782         {
 783                 LOG_ERROR("writes need to be page aligned");
 784                 return ERROR_NAND_OPERATION_FAILED;
 785         }
 786
 787         page = malloc(nand->page_size);
 788
 789         while (data_size > 0)
 790         {
 791                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 792                 uint32_t page_address;
 793
 794                 memset(page, 0xff, nand->page_size);
 795                 memcpy(page, data, thisrun_size);
 796
 797                 page_address = address / nand->page_size;
 798
 799                 nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
 800
 801                 address += thisrun_size;
 802                 data += thisrun_size;
 803                 data_size -= thisrun_size;
 804         }
 805
 806         free(page);
 807
 808         return ERROR_OK;
 809 }
 810 #endif
 811
 812 int nand_write_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 813 {
 814         uint32_t block;
 815
 816         if (!nand->device)
 817                 return ERROR_NAND_DEVICE_NOT_PROBED;
 818
 819         block = page / (nand->erase_size / nand->page_size);
 820         if (nand->blocks[block].is_erased == 1)
 821                 nand->blocks[block].is_erased = 0;
 822
 823         if (nand->use_raw || nand->controller->write_page == NULL)
 824                 return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
 825         else
 826                 return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
 827 }
 828
 829 static int nand_read_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 830 {
 831         if (!nand->device)
 832                 return ERROR_NAND_DEVICE_NOT_PROBED;
 833
 834         if (nand->use_raw || nand->controller->read_page == NULL)
 835                 return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
 836         else
 837                 return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
 838 }
 839
 840 int nand_read_page_raw(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 841 {
 842         uint32_t i;
 843
 844         if (!nand->device)
 845                 return ERROR_NAND_DEVICE_NOT_PROBED;
 846
 847         if (nand->page_size <= 512)
 848         {
 849                 /* small page device */
 850                 if (data)
 851                         nand->controller->command(nand, NAND_CMD_READ0);
 852                 else
 853                         nand->controller->command(nand, NAND_CMD_READOOB);
 854
 855                 /* column (always 0, we start at the beginning of a page/OOB area) */
 856                 nand->controller->address(nand, 0x0);
 857
 858                 /* row */
 859                 nand->controller->address(nand, page & 0xff);
 860                 nand->controller->address(nand, (page >> 8) & 0xff);
 861
 862                 /* 4th cycle only on devices with more than 32 MiB */
 863                 if (nand->address_cycles >= 4)
 864                         nand->controller->address(nand, (page >> 16) & 0xff);
 865
 866                 /* 5th cycle only on devices with more than 8 GiB */
 867                 if (nand->address_cycles >= 5)
 868                         nand->controller->address(nand, (page >> 24) & 0xff);
 869         }
 870         else
 871         {
 872                 /* large page device */
 873                 nand->controller->command(nand, NAND_CMD_READ0);
 874
 875                 /* column (0 when we start at the beginning of a page,
 876                  * or 2048 for the beginning of OOB area)
 877                  */
 878                 nand->controller->address(nand, 0x0);
 879                 if (data)
 880                         nand->controller->address(nand, 0x0);
 881                 else
 882                         nand->controller->address(nand, 0x8);
 883
 884                 /* row */
 885                 nand->controller->address(nand, page & 0xff);
 886                 nand->controller->address(nand, (page >> 8) & 0xff);
 887
 888                 /* 5th cycle only on devices with more than 128 MiB */
 889                 if (nand->address_cycles >= 5)
 890                         nand->controller->address(nand, (page >> 16) & 0xff);
 891
 892                 /* large page devices need a start command */
 893                 nand->controller->command(nand, NAND_CMD_READSTART);
 894         }
 895
 896         if (nand->controller->nand_ready) {
 897                 if (!nand->controller->nand_ready(nand, 100))
 898                         return ERROR_NAND_OPERATION_TIMEOUT;
 899         } else {
 900                 alive_sleep(1);
 901         }
 902
 903         if (data)
 904         {
 905                 if (nand->controller->read_block_data != NULL)
 906                         (nand->controller->read_block_data)(nand, data, data_size);
 907                 else
 908                 {
 909                         for (i = 0; i < data_size;)
 910                         {
 911                                 if (nand->device->options & NAND_BUSWIDTH_16)
 912                                 {
 913                                         nand->controller->read_data(nand, data);
 914                                         data += 2;
 915                                         i += 2;
 916                                 }
 917                                 else
 918                                 {
 919                                         nand->controller->read_data(nand, data);
 920                                         data += 1;
 921                                         i += 1;
 922                                 }
 923                         }
 924                 }
 925         }
 926
 927         if (oob)
 928         {
 929                 if (nand->controller->read_block_data != NULL)
 930                         (nand->controller->read_block_data)(nand, oob, oob_size);
 931                 else
 932                 {
 933                         for (i = 0; i < oob_size;)
 934                         {
 935                                 if (nand->device->options & NAND_BUSWIDTH_16)
 936                                 {
 937                                         nand->controller->read_data(nand, oob);
 938                                         oob += 2;
 939                                         i += 2;
 940                                 }
 941                                 else
 942                                 {
 943                                         nand->controller->read_data(nand, oob);
 944                                         oob += 1;
 945                                         i += 1;
 946                                 }
 947                         }
 948                 }
 949         }
 950
 951         return ERROR_OK;
 952 }
 953
 954 int nand_write_page_raw(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 955 {
 956         uint32_t i;
 957         int retval;
 958         uint8_t status;
 959
 960         if (!nand->device)
 961                 return ERROR_NAND_DEVICE_NOT_PROBED;
 962
 963         nand->controller->command(nand, NAND_CMD_SEQIN);
 964
 965         if (nand->page_size <= 512)
 966         {
 967                 /* column (always 0, we start at the beginning of a page/OOB area) */
 968                 nand->controller->address(nand, 0x0);
 969
 970                 /* row */
 971                 nand->controller->address(nand, page & 0xff);
 972                 nand->controller->address(nand, (page >> 8) & 0xff);
 973
 974                 /* 4th cycle only on devices with more than 32 MiB */
 975                 if (nand->address_cycles >= 4)
 976                         nand->controller->address(nand, (page >> 16) & 0xff);
 977
 978                 /* 5th cycle only on devices with more than 8 GiB */
 979                 if (nand->address_cycles >= 5)
 980                         nand->controller->address(nand, (page >> 24) & 0xff);
 981         }
 982         else
 983         {
 984                 /* column (0 when we start at the beginning of a page,
 985                  * or 2048 for the beginning of OOB area)
 986                  */
 987                 nand->controller->address(nand, 0x0);
 988                 if (data)
 989                         nand->controller->address(nand, 0x0);
 990                 else
 991                         nand->controller->address(nand, 0x8);
 992
 993                 /* row */
 994                 nand->controller->address(nand, page & 0xff);
 995                 nand->controller->address(nand, (page >> 8) & 0xff);
 996
 997                 /* 5th cycle only on devices with more than 128 MiB */
 998                 if (nand->address_cycles >= 5)
 999                         nand->controller->address(nand, (page >> 16) & 0xff);
1000         }
1001
1002         if (data)
1003         {
1004                 if (nand->controller->write_block_data != NULL)
1005                         (nand->controller->write_block_data)(nand, data, data_size);
1006                 else
1007                 {
1008                         for (i = 0; i < data_size;)
1009                         {
1010                                 if (nand->device->options & NAND_BUSWIDTH_16)
1011                                 {
1012                                         uint16_t data_buf = le_to_h_u16(data);
1013                                         nand->controller->write_data(nand, data_buf);
1014                                         data += 2;
1015                                         i += 2;
1016                                 }
1017                                 else
1018                                 {
1019                                         nand->controller->write_data(nand, *data);
1020                                         data += 1;
1021                                         i += 1;
1022                                 }
1023                         }
1024                 }
1025         }
1026
1027         if (oob)
1028         {
1029                 if (nand->controller->write_block_data != NULL)
1030                         (nand->controller->write_block_data)(nand, oob, oob_size);
1031                 else
1032                 {
1033                         for (i = 0; i < oob_size;)
1034                         {
1035                                 if (nand->device->options & NAND_BUSWIDTH_16)
1036                                 {
1037                                         uint16_t oob_buf = le_to_h_u16(data);
1038                                         nand->controller->write_data(nand, oob_buf);
1039                                         oob += 2;
1040                                         i += 2;
1041                                 }
1042                                 else
1043                                 {
1044                                         nand->controller->write_data(nand, *oob);
1045                                         oob += 1;
1046                                         i += 1;
1047                                 }
1048                         }
1049                 }
1050         }
1051
1052         nand->controller->command(nand, NAND_CMD_PAGEPROG);
1053
1054         retval = nand->controller->nand_ready ?
1055                         nand->controller->nand_ready(nand, 100) :
1056                         nand_poll_ready(nand, 100);
1057         if (!retval)
1058                 return ERROR_NAND_OPERATION_TIMEOUT;
1059
1060         if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
1061         {
1062                 LOG_ERROR("couldn't read status");
1063                 return ERROR_NAND_OPERATION_FAILED;
1064         }
1065
1066         if (status & NAND_STATUS_FAIL)
1067         {
1068                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
1069                 return ERROR_NAND_OPERATION_FAILED;
1070         }
1071
1072         return ERROR_OK;
1073 }
1074
1075 COMMAND_HANDLER(handle_nand_list_command)
1076 {
1077         struct nand_device *p;
1078         int i;
1079
1080         if (!nand_devices)
1081         {
1082                 command_print(CMD_CTX, "no NAND flash devices configured");
1083                 return ERROR_OK;
1084         }
1085
1086         for (p = nand_devices, i = 0; p; p = p->next, i++)
1087         {
1088                 if (p->device)
1089                         command_print(CMD_CTX, "#%i: %s (%s) "
1090                                 "pagesize: %i, buswidth: %i,\n\t"
1091                                 "blocksize: %i, blocks: %i",
1092                                 i, p->device->name, p->manufacturer->name,
1093                                 p->page_size, p->bus_width,
1094                                 p->erase_size, p->num_blocks);
1095                 else
1096                         command_print(CMD_CTX, "#%i: not probed", i);
1097         }
1098
1099         return ERROR_OK;
1100 }
1101
1102 COMMAND_HANDLER(handle_nand_info_command)
1103 {
1104         int i = 0;
1105         int j = 0;
1106         int first = -1;
1107         int last = -1;
1108
1109         struct nand_device *p;
1110         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1111         if (ERROR_OK != retval)
1112                 return retval;
1113
1114         switch (CMD_ARGC) {
1115         default:
1116                 return ERROR_COMMAND_SYNTAX_ERROR;
1117         case 1:
1118                 first = 0;
1119                 last = INT32_MAX;
1120                 break;
1121         case 2:
1122                 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], i);
1123                 first = last = i;
1124                 i = 0;
1125                 break;
1126         case 3:
1127                 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], first);
1128                 COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], last);
1129                 break;
1130         }
1131
1132         if (NULL == p->device)
1133         {
1134                 command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
1135                 return ERROR_OK;
1136         }
1137
1138         if (first >= p->num_blocks)
1139                 first = p->num_blocks - 1;
1140
1141         if (last >= p->num_blocks)
1142                 last = p->num_blocks - 1;
1143
1144         command_print(CMD_CTX, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1145                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1146
1147         for (j = first; j <= last; j++)
1148         {
1149                 char *erase_state, *bad_state;
1150
1151                 if (p->blocks[j].is_erased == 0)
1152                         erase_state = "not erased";
1153                 else if (p->blocks[j].is_erased == 1)
1154                         erase_state = "erased";
1155                 else
1156                         erase_state = "erase state unknown";
1157
1158                 if (p->blocks[j].is_bad == 0)
1159                         bad_state = "";
1160                 else if (p->blocks[j].is_bad == 1)
1161                         bad_state = " (marked bad)";
1162                 else
1163                         bad_state = " (block condition unknown)";
1164
1165                 command_print(CMD_CTX,
1166                               "\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s",
1167                               j,
1168                               p->blocks[j].offset,
1169                               p->blocks[j].size / 1024,
1170                               erase_state,
1171                               bad_state);
1172         }
1173
1174         return ERROR_OK;
1175 }
1176
1177 COMMAND_HANDLER(handle_nand_probe_command)
1178 {
1179         if (CMD_ARGC != 1)
1180         {
1181                 return ERROR_COMMAND_SYNTAX_ERROR;
1182         }
1183
1184         struct nand_device *p;
1185         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1186         if (ERROR_OK != retval)
1187                 return retval;
1188
1189         if ((retval = nand_probe(p)) == ERROR_OK)
1190         {
1191                 command_print(CMD_CTX, "NAND flash device '%s' found", p->device->name);
1192         }
1193         else if (retval == ERROR_NAND_OPERATION_FAILED)
1194         {
1195                 command_print(CMD_CTX, "probing failed for NAND flash device");
1196         }
1197         else
1198         {
1199                 command_print(CMD_CTX, "unknown error when probing NAND flash device");
1200         }
1201
1202         return ERROR_OK;
1203 }
1204
1205 COMMAND_HANDLER(handle_nand_erase_command)
1206 {
1207         if (CMD_ARGC != 1 && CMD_ARGC != 3)
1208         {
1209                 return ERROR_COMMAND_SYNTAX_ERROR;
1210
1211         }
1212
1213         struct nand_device *p;
1214         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1215         if (ERROR_OK != retval)
1216                 return retval;
1217
1218         unsigned long offset;
1219         unsigned long length;
1220
1221         /* erase specified part of the chip; or else everything */
1222         if (CMD_ARGC == 3) {
1223                 unsigned long size = p->erase_size * p->num_blocks;
1224
1225                 COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], offset);
1226                 if ((offset % p->erase_size) != 0 || offset >= size)
1227                         return ERROR_INVALID_ARGUMENTS;
1228
1229                 COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], length);
1230                 if ((length == 0) || (length % p->erase_size) != 0
1231                                 || (length + offset) > size)
1232                         return ERROR_INVALID_ARGUMENTS;
1233
1234                 offset /= p->erase_size;
1235                 length /= p->erase_size;
1236         } else {
1237                 offset = 0;
1238                 length = p->num_blocks;
1239         }
1240
1241         retval = nand_erase(p, offset, offset + length - 1);
1242         if (retval == ERROR_OK)
1243         {
1244                 command_print(CMD_CTX, "erased blocks %lu to %lu "
1245                                 "on NAND flash device #%s '%s'",
1246                                 offset, offset + length,
1247                                 CMD_ARGV[0], p->device->name);
1248         }
1249         else if (retval == ERROR_NAND_OPERATION_FAILED)
1250         {
1251                 command_print(CMD_CTX, "erase failed");
1252         }
1253         else
1254         {
1255                 command_print(CMD_CTX, "unknown error when erasing NAND flash device");
1256         }
1257
1258         return ERROR_OK;
1259 }
1260
1261 COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
1262 {
1263         int first = -1;
1264         int last = -1;
1265
1266         if ((CMD_ARGC < 1) || (CMD_ARGC > 3) || (CMD_ARGC == 2))
1267         {
1268                 return ERROR_COMMAND_SYNTAX_ERROR;
1269
1270         }
1271
1272         struct nand_device *p;
1273         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1274         if (ERROR_OK != retval)
1275                 return retval;
1276
1277         if (CMD_ARGC == 3)
1278         {
1279                 unsigned long offset;
1280                 unsigned long length;
1281
1282                 COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], offset);
1283                 if (offset % p->erase_size)
1284                         return ERROR_INVALID_ARGUMENTS;
1285                 offset /= p->erase_size;
1286
1287                 COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], length);
1288                 if (length % p->erase_size)
1289                         return ERROR_INVALID_ARGUMENTS;
1290
1291                 length -= 1;
1292                 length /= p->erase_size;
1293
1294                 first = offset;
1295                 last = offset + length;
1296         }
1297
1298         retval = nand_build_bbt(p, first, last);
1299         if (retval == ERROR_OK)
1300         {
1301                 command_print(CMD_CTX, "checked NAND flash device for bad blocks, "
1302                                 "use \"nand info\" command to list blocks");
1303         }
1304         else if (retval == ERROR_NAND_OPERATION_FAILED)
1305         {
1306                 command_print(CMD_CTX, "error when checking for bad blocks on "
1307                                 "NAND flash device");
1308         }
1309         else
1310         {
1311                 command_print(CMD_CTX, "unknown error when checking for bad "
1312                                 "blocks on NAND flash device");
1313         }
1314
1315         return ERROR_OK;
1316 }
1317
1318 struct nand_fileio_state {
1319         uint32_t address;
1320         uint32_t size;
1321
1322         uint8_t *page;
1323         uint32_t page_size;
1324
1325         enum oob_formats oob_format;
1326         uint8_t *oob;
1327         uint32_t oob_size;
1328
1329         const int *eccpos;
1330
1331         bool file_opened;
1332         struct fileio fileio;
1333
1334         struct duration bench;
1335 };
1336
1337 static void nand_fileio_init(struct nand_fileio_state *state)
1338 {
1339         memset(state, 0, sizeof(*state));
1340         state->oob_format = NAND_OOB_NONE;
1341 }
1342
1343 static int nand_fileio_start(struct command_context *cmd_ctx,
1344                 struct nand_device *nand, const char *filename, int filemode,
1345                 struct nand_fileio_state *state)
1346 {
1347         if (state->address % nand->page_size)
1348         {
1349                 command_print(cmd_ctx, "only page-aligned addresses are supported");
1350                 return ERROR_COMMAND_SYNTAX_ERROR;
1351         }
1352
1353         duration_start(&state->bench);
1354
1355         if (NULL != filename)
1356         {
1357                 int retval = fileio_open(&state->fileio, filename, filemode, FILEIO_BINARY);
1358                 if (ERROR_OK != retval)
1359                 {
1360                         const char *msg = (FILEIO_READ == filemode) ? "read" : "write";
1361                         command_print(cmd_ctx, "failed to open '%s' for %s access",
1362                                         filename, msg);
1363                         return retval;
1364                 }
1365                 state->file_opened = true;
1366         }
1367
1368         if (!(state->oob_format & NAND_OOB_ONLY))
1369         {
1370                 state->page_size = nand->page_size;
1371                 state->page = malloc(nand->page_size);
1372         }
1373
1374         if (state->oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW))
1375         {
1376                 if (nand->page_size == 512)
1377                 {
1378                         state->oob_size = 16;
1379                         state->eccpos = nand_oob_16.eccpos;
1380                 }
1381                 else if (nand->page_size == 2048)
1382                 {
1383                         state->oob_size = 64;
1384                         state->eccpos = nand_oob_64.eccpos;
1385                 }
1386                 state->oob = malloc(state->oob_size);
1387         }
1388
1389         return ERROR_OK;
1390 }
1391 static int nand_fileio_cleanup(struct nand_fileio_state *state)
1392 {
1393         if (state->file_opened)
1394                 fileio_close(&state->fileio);
1395
1396         if (state->oob)
1397         {
1398                 free(state->oob);
1399                 state->oob = NULL;
1400         }
1401         if (state->page)
1402         {
1403                 free(state->page);
1404                 state->page = NULL;
1405         }
1406         return ERROR_OK;
1407 }
1408 static int nand_fileio_finish(struct nand_fileio_state *state)
1409 {
1410         nand_fileio_cleanup(state);
1411         return duration_measure(&state->bench);
1412 }
1413
1414 static COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
1415                 struct nand_device **dev, enum fileio_access filemode,
1416                 bool need_size, bool sw_ecc)
1417 {
1418         nand_fileio_init(state);
1419
1420         unsigned minargs = need_size ? 4 : 3;
1421         if (CMD_ARGC < minargs)
1422                 return ERROR_COMMAND_SYNTAX_ERROR;
1423
1424         struct nand_device *nand;
1425         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &nand);
1426         if (ERROR_OK != retval)
1427                 return retval;
1428
1429         if (NULL == nand->device)
1430         {
1431                 command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
1432                 return ERROR_OK;
1433         }
1434
1435         COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], state->address);
1436         if (need_size)
1437         {
1438                         COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], state->size);
1439                         if (state->size % nand->page_size)
1440                         {
1441                                 command_print(CMD_CTX, "only page-aligned sizes are supported");
1442                                 return ERROR_COMMAND_SYNTAX_ERROR;
1443                         }
1444         }
1445
1446         if (CMD_ARGC > minargs)
1447         {
1448                 for (unsigned i = minargs; i < CMD_ARGC; i++)
1449                 {
1450                         if (!strcmp(CMD_ARGV[i], "oob_raw"))
1451                                 state->oob_format |= NAND_OOB_RAW;
1452                         else if (!strcmp(CMD_ARGV[i], "oob_only"))
1453                                 state->oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1454                         else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc"))
1455                                 state->oob_format |= NAND_OOB_SW_ECC;
1456                         else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc_kw"))
1457                                 state->oob_format |= NAND_OOB_SW_ECC_KW;
1458                         else
1459                         {
1460                                 command_print(CMD_CTX, "unknown option: %s", CMD_ARGV[i]);
1461                                 return ERROR_COMMAND_SYNTAX_ERROR;
1462                         }
1463                 }
1464         }
1465
1466         retval = nand_fileio_start(CMD_CTX, nand, CMD_ARGV[1], filemode, state);
1467         if (ERROR_OK != retval)
1468                 return retval;
1469
1470         if (!need_size)
1471                 state->size = state->fileio.size;
1472
1473         *dev = nand;
1474
1475         return ERROR_OK;
1476 }
1477
1478 /**
1479  * @returns If no error occurred, returns number of bytes consumed;
1480  * otherwise, returns a negative error code.)
1481  */
1482 static int nand_fileio_read(struct nand_device *nand,
1483                 struct nand_fileio_state *s)
1484 {
1485         size_t total_read = 0;
1486         size_t one_read;
1487
1488         if (NULL != s->page)
1489         {
1490                 fileio_read(&s->fileio, s->page_size, s->page, &one_read);
1491                 if (one_read < s->page_size)
1492                         memset(s->page + one_read, 0xff, s->page_size - one_read);
1493                 total_read += one_read;
1494         }
1495
1496         if (s->oob_format & NAND_OOB_SW_ECC)
1497         {
1498                 uint8_t ecc[3];
1499                 memset(s->oob, 0xff, s->oob_size);
1500                 for (uint32_t i = 0, j = 0; i < s->page_size; i += 256)
1501                 {
1502                         nand_calculate_ecc(nand, s->page + i, ecc);
1503                         s->oob[s->eccpos[j++]] = ecc[0];
1504                         s->oob[s->eccpos[j++]] = ecc[1];
1505                         s->oob[s->eccpos[j++]] = ecc[2];
1506                 }
1507         }
1508         else if (s->oob_format & NAND_OOB_SW_ECC_KW)
1509         {
1510                 /*
1511                  * In this case eccpos is not used as
1512                  * the ECC data is always stored contigously
1513                  * at the end of the OOB area.  It consists
1514                  * of 10 bytes per 512-byte data block.
1515                  */
1516                 uint8_t *ecc = s->oob + s->oob_size - s->page_size / 512 * 10;
1517                 memset(s->oob, 0xff, s->oob_size);
1518                 for (uint32_t i = 0; i < s->page_size; i += 512)
1519                 {
1520                         nand_calculate_ecc_kw(nand, s->page + i, ecc);
1521                         ecc += 10;
1522                 }
1523         }
1524         else if (NULL != s->oob)
1525         {
1526                 fileio_read(&s->fileio, s->oob_size, s->oob, &one_read);
1527                 if (one_read < s->oob_size)
1528                         memset(s->oob + one_read, 0xff, s->oob_size - one_read);
1529                 total_read += one_read;
1530         }
1531         return total_read;
1532 }
1533
1534 COMMAND_HANDLER(handle_nand_write_command)
1535 {
1536         struct nand_device *nand = NULL;
1537         struct nand_fileio_state s;
1538         int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
1539                         &s, &nand, FILEIO_READ, false, true);
1540         if (ERROR_OK != retval)
1541                 return retval;
1542
1543         uint32_t total_bytes = s.size;
1544         while (s.size > 0)
1545         {
1546                 int bytes_read = nand_fileio_read(nand, &s);
1547                 if (bytes_read <= 0)
1548                 {
1549                         command_print(CMD_CTX, "error while reading file");
1550                         return nand_fileio_cleanup(&s);
1551                 }
1552                 s.size -= bytes_read;
1553
1554                 retval = nand_write_page(nand, s.address / nand->page_size,
1555                                 s.page, s.page_size, s.oob, s.oob_size);
1556                 if (ERROR_OK != retval)
1557                 {
1558                         command_print(CMD_CTX, "failed writing file %s "
1559                                 "to NAND flash %s at offset 0x%8.8" PRIx32,
1560                                 CMD_ARGV[1], CMD_ARGV[0], s.address);
1561                         return nand_fileio_cleanup(&s);
1562                 }
1563                 s.address += s.page_size;
1564         }
1565
1566         if (nand_fileio_finish(&s))
1567         {
1568                 command_print(CMD_CTX, "wrote file %s to NAND flash %s up to "
1569                                 "offset 0x%8.8" PRIx32 " in %fs (%0.3f kb/s)",
1570                                 CMD_ARGV[1], CMD_ARGV[0], s.address, duration_elapsed(&s.bench),
1571                                 duration_kbps(&s.bench, total_bytes));
1572         }
1573         return ERROR_OK;
1574 }
1575
1576 COMMAND_HANDLER(handle_nand_verify_command)
1577 {
1578         struct nand_device *nand = NULL;
1579         struct nand_fileio_state file;
1580         int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
1581                         &file, &nand, FILEIO_READ, false, true);
1582         if (ERROR_OK != retval)
1583                 return retval;
1584
1585         struct nand_fileio_state dev;
1586         nand_fileio_init(&dev);
1587         dev.address = file.address;
1588         dev.size = file.size;
1589         dev.oob_format = file.oob_format;
1590         retval = nand_fileio_start(CMD_CTX, nand, NULL, FILEIO_NONE, &dev);
1591         if (ERROR_OK != retval)
1592                 return retval;
1593
1594         while (file.size > 0)
1595         {
1596                 int retval = nand_read_page(nand, dev.address / dev.page_size,
1597                                 dev.page, dev.page_size, dev.oob, dev.oob_size);
1598                 if (ERROR_OK != retval)
1599                 {
1600                         command_print(CMD_CTX, "reading NAND flash page failed");
1601                         nand_fileio_cleanup(&dev);
1602                         return nand_fileio_cleanup(&file);
1603                 }
1604
1605                 int bytes_read = nand_fileio_read(nand, &file);
1606                 if (bytes_read <= 0)
1607                 {
1608                         command_print(CMD_CTX, "error while reading file");
1609                         nand_fileio_cleanup(&dev);
1610                         return nand_fileio_cleanup(&file);
1611                 }
1612
1613                 if ((dev.page && memcmp(dev.page, file.page, dev.page_size)) ||
1614                     (dev.oob && memcmp(dev.oob, file.oob, dev.oob_size)) )
1615                 {
1616                         command_print(CMD_CTX, "NAND flash contents differ "
1617                                                 "at 0x%8.8" PRIx32, dev.address);
1618                         nand_fileio_cleanup(&dev);
1619                         return nand_fileio_cleanup(&file);
1620                 }
1621
1622                 file.size -= bytes_read;
1623                 dev.address += nand->page_size;
1624         }
1625
1626         if (nand_fileio_finish(&file) == ERROR_OK)
1627         {
1628                 command_print(CMD_CTX, "verified file %s in NAND flash %s "
1629                                 "up to offset 0x%8.8" PRIx32 " in %fs (%0.3f kb/s)",
1630                                 CMD_ARGV[1], CMD_ARGV[0], dev.address, duration_elapsed(&file.bench),
1631                                 duration_kbps(&file.bench, dev.size));
1632         }
1633
1634         return nand_fileio_cleanup(&dev);
1635 }
1636
1637 COMMAND_HANDLER(handle_nand_dump_command)
1638 {
1639         struct nand_device *nand = NULL;
1640         struct nand_fileio_state s;
1641         int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
1642                         &s, &nand, FILEIO_WRITE, true, false);
1643         if (ERROR_OK != retval)
1644                 return retval;
1645
1646         while (s.size > 0)
1647         {
1648                 size_t size_written;
1649                 int retval = nand_read_page(nand, s.address / nand->page_size,
1650                                 s.page, s.page_size, s.oob, s.oob_size);
1651                 if (ERROR_OK != retval)
1652                 {
1653                         command_print(CMD_CTX, "reading NAND flash page failed");
1654                         return nand_fileio_cleanup(&s);
1655                 }
1656
1657                 if (NULL != s.page)
1658                         fileio_write(&s.fileio, s.page_size, s.page, &size_written);
1659
1660                 if (NULL != s.oob)
1661                         fileio_write(&s.fileio, s.oob_size, s.oob, &size_written);
1662
1663                 s.size -= nand->page_size;
1664                 s.address += nand->page_size;
1665         }
1666
1667         if (nand_fileio_finish(&s) == ERROR_OK)
1668         {
1669                 command_print(CMD_CTX, "dumped %zu bytes in %fs (%0.3f kb/s)",
1670                                 s.fileio.size, duration_elapsed(&s.bench),
1671                                 duration_kbps(&s.bench, s.fileio.size));
1672         }
1673         return ERROR_OK;
1674 }
1675
1676 COMMAND_HANDLER(handle_nand_raw_access_command)
1677 {
1678         if ((CMD_ARGC < 1) || (CMD_ARGC > 2))
1679         {
1680                 return ERROR_COMMAND_SYNTAX_ERROR;
1681         }
1682
1683         struct nand_device *p;
1684         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1685         if (ERROR_OK != retval)
1686                 return retval;
1687
1688         if (NULL == p->device)
1689         {
1690                 command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
1691                 return ERROR_OK;
1692         }
1693
1694         if (CMD_ARGC == 2)
1695                 COMMAND_PARSE_ENABLE(CMD_ARGV[1], p->use_raw);
1696
1697         const char *msg = p->use_raw ? "enabled" : "disabled";
1698         command_print(CMD_CTX, "raw access is %s", msg);
1699
1700         return ERROR_OK;
1701 }
1702
1703 int nand_init(struct command_context *cmd_ctx)
1704 {
1705         if (!nand_devices)
1706                 return ERROR_OK;
1707
1708         register_command(cmd_ctx, nand_cmd, "list",
1709                         handle_nand_list_command, COMMAND_EXEC,
1710                         "list configured NAND flash devices");
1711         register_command(cmd_ctx, nand_cmd, "info",
1712                         handle_nand_info_command, COMMAND_EXEC,
1713                         "print info about NAND flash device <num>");
1714         register_command(cmd_ctx, nand_cmd, "probe",
1715                         handle_nand_probe_command, COMMAND_EXEC,
1716                         "identify NAND flash device <num>");
1717
1718         register_command(cmd_ctx, nand_cmd, "check_bad_blocks",
1719                         handle_nand_check_bad_blocks_command, COMMAND_EXEC,
1720                         "check NAND flash device <num> for bad blocks [<offset> <length>]");
1721         register_command(cmd_ctx, nand_cmd, "erase",
1722                         handle_nand_erase_command, COMMAND_EXEC,
1723                         "erase blocks on NAND flash device <num> [<offset> <length>]");
1724         register_command(cmd_ctx, nand_cmd, "dump",
1725                         handle_nand_dump_command, COMMAND_EXEC,
1726                         "dump from NAND flash device <num> <filename> "
1727                          "<offset> <length> [oob_raw | oob_only]");
1728         register_command(cmd_ctx, nand_cmd, "verify",
1729                         &handle_nand_verify_command, COMMAND_EXEC,
1730                         "verify NAND flash device <num> <filename> <offset> "
1731                         "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]");
1732         register_command(cmd_ctx, nand_cmd, "write",
1733                         handle_nand_write_command, COMMAND_EXEC,
1734                         "write to NAND flash device <num> <filename> <offset> "
1735                         "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]");
1736
1737         register_command(cmd_ctx, nand_cmd, "raw_access",
1738                         handle_nand_raw_access_command, COMMAND_EXEC,
1739                         "raw access to NAND flash device <num> ['enable'|'disable']");
1740
1741         return ERROR_OK;
1742 }