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   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
   6  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program; if not, write to the                         *
  20  *   Free Software Foundation, Inc.,                                       *
  21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  22  ***************************************************************************/
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "nand.h"
  28 #include "time_support.h"
  29 #include "fileio.h"
  30
  31 static int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  32 static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  33 static int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  34 static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  35 static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  36 static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  37 static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  38
  39 static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  40
  41 static int nand_read_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
  42 //static int nand_read_plain(struct nand_device_s *device, uint32_t address, uint8_t *data, uint32_t data_size);
  43
  44 static int nand_write_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
  45
  46 /* NAND flash controller
  47  */
  48 extern nand_flash_controller_t davinci_nand_controller;
  49 extern nand_flash_controller_t lpc3180_nand_controller;
  50 extern nand_flash_controller_t orion_nand_controller;
  51 extern nand_flash_controller_t s3c2410_nand_controller;
  52 extern nand_flash_controller_t s3c2412_nand_controller;
  53 extern nand_flash_controller_t s3c2440_nand_controller;
  54 extern nand_flash_controller_t s3c2443_nand_controller;
  55 extern nand_flash_controller_t imx31_nand_flash_controller;
  56
  57 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
  58
  59 static nand_flash_controller_t *nand_flash_controllers[] =
  60 {
  61         &davinci_nand_controller,
  62         &lpc3180_nand_controller,
  63         &orion_nand_controller,
  64         &s3c2410_nand_controller,
  65         &s3c2412_nand_controller,
  66         &s3c2440_nand_controller,
  67         &s3c2443_nand_controller,
  68         &imx31_nand_flash_controller,
  69 /*      &boundary_scan_nand_controller, */
  70         NULL
  71 };
  72
  73 /* configured NAND devices and NAND Flash command handler */
  74 static nand_device_t *nand_devices = NULL;
  75 static command_t *nand_cmd;
  76
  77 /*      Chip ID list
  78  *
  79  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  80  *      options
  81  *
  82  *      Pagesize; 0, 256, 512
  83  *      0       get this information from the extended chip ID
  84  *      256     256 Byte page size
  85  *      512     512 Byte page size
  86  */
  87 static nand_info_t nand_flash_ids[] =
  88 {
  89         /* start "museum" IDs */
  90         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
  91         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
  92         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
  93         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
  94         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
  95         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
  96         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
  97         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
  98         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
  99         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
 100
 101         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
 102         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
 103         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 104         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 105         /* end "museum" IDs */
 106
 107         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
 108         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
 109         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 110         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 111
 112         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
 113         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
 114         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 115         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 116
 117         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
 118         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
 119         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 120         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 121
 122         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
 123         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
 124         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
 125         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 126         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 127         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 128         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 129
 130         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
 131
 132         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
 133         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
 134         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
 135         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
 136
 137         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
 138         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
 139         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
 140         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
 141
 142         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
 143         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
 144         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
 145         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
 146
 147         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
 148         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
 149         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
 150         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
 151
 152         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
 153         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
 154         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
 155         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
 156
 157         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
 158         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
 159         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
 160         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
 161
 162         {NULL, 0, 0, 0, 0, 0 }
 163 };
 164
 165 /* Manufacturer ID list
 166  */
 167 static nand_manufacturer_t nand_manuf_ids[] =
 168 {
 169         {0x0, "unknown"},
 170         {NAND_MFR_TOSHIBA, "Toshiba"},
 171         {NAND_MFR_SAMSUNG, "Samsung"},
 172         {NAND_MFR_FUJITSU, "Fujitsu"},
 173         {NAND_MFR_NATIONAL, "National"},
 174         {NAND_MFR_RENESAS, "Renesas"},
 175         {NAND_MFR_STMICRO, "ST Micro"},
 176         {NAND_MFR_HYNIX, "Hynix"},
 177         {NAND_MFR_MICRON, "Micron"},
 178         {0x0, NULL},
 179 };
 180
 181 /*
 182  * Define default oob placement schemes for large and small page devices
 183  */
 184
 185 #if 0
 186 static nand_ecclayout_t nand_oob_8 = {
 187         .eccbytes = 3,
 188         .eccpos = {0, 1, 2},
 189         .oobfree = {
 190                 {.offset = 3,
 191                  .length = 2},
 192                 {.offset = 6,
 193                  .length = 2}}
 194 };
 195 #endif
 196
 197 static nand_ecclayout_t nand_oob_16 = {
 198         .eccbytes = 6,
 199         .eccpos = {0, 1, 2, 3, 6, 7},
 200         .oobfree = {
 201                 {.offset = 8,
 202                  . length = 8}}
 203 };
 204
 205 static nand_ecclayout_t nand_oob_64 = {
 206         .eccbytes = 24,
 207         .eccpos = {
 208                    40, 41, 42, 43, 44, 45, 46, 47,
 209                    48, 49, 50, 51, 52, 53, 54, 55,
 210                    56, 57, 58, 59, 60, 61, 62, 63},
 211         .oobfree = {
 212                 {.offset = 2,
 213                  .length = 38}}
 214 };
 215
 216 /* nand device <nand_controller> [controller options]
 217  */
 218 static int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 219 {
 220         int i;
 221         int retval;
 222
 223         if (argc < 1)
 224         {
 225                 LOG_WARNING("incomplete flash device nand configuration");
 226                 return ERROR_FLASH_BANK_INVALID;
 227         }
 228
 229         for (i = 0; nand_flash_controllers[i]; i++)
 230         {
 231                 nand_device_t *p, *c;
 232
 233                 if (strcmp(args[0], nand_flash_controllers[i]->name) == 0)
 234                 {
 235                         /* register flash specific commands */
 236                         if ((retval = nand_flash_controllers[i]->register_commands(cmd_ctx)) != ERROR_OK)
 237                         {
 238                                 LOG_ERROR("couldn't register '%s' commands", args[0]);
 239                                 return retval;
 240                         }
 241
 242                         c = malloc(sizeof(nand_device_t));
 243
 244                         c->controller = nand_flash_controllers[i];
 245                         c->controller_priv = NULL;
 246                         c->manufacturer = NULL;
 247                         c->device = NULL;
 248                         c->bus_width = 0;
 249                         c->address_cycles = 0;
 250                         c->page_size = 0;
 251                         c->use_raw = 0;
 252                         c->next = NULL;
 253
 254                         if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK)
 255                         {
 256                                 LOG_ERROR("'%s' driver rejected nand flash", c->controller->name);
 257                                 free(c);
 258                                 return ERROR_OK;
 259                         }
 260
 261                         /* put NAND device in linked list */
 262                         if (nand_devices)
 263                         {
 264                                 /* find last flash device */
 265                                 for (p = nand_devices; p && p->next; p = p->next);
 266                                 if (p)
 267                                         p->next = c;
 268                         }
 269                         else
 270                         {
 271                                 nand_devices = c;
 272                         }
 273
 274                         return ERROR_OK;
 275                 }
 276         }
 277
 278         /* no valid NAND controller was found (i.e. the configuration option,
 279          * didn't match one of the compiled-in controllers)
 280          */
 281         LOG_ERROR("No valid NAND flash controller found (%s)", args[0]);
 282         LOG_ERROR("compiled-in NAND flash controllers:");
 283         for (i = 0; nand_flash_controllers[i]; i++)
 284         {
 285                 LOG_ERROR("%i: %s", i, nand_flash_controllers[i]->name);
 286         }
 287
 288         return ERROR_OK;
 289 }
 290
 291 int nand_register_commands(struct command_context_s *cmd_ctx)
 292 {
 293         nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, "NAND specific commands");
 294
 295         register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL);
 296
 297         return ERROR_OK;
 298 }
 299
 300 int nand_init(struct command_context_s *cmd_ctx)
 301 {
 302         if (nand_devices)
 303         {
 304                 register_command(cmd_ctx, nand_cmd, "list", handle_nand_list_command, COMMAND_EXEC,
 305                                                  "list configured NAND flash devices");
 306                 register_command(cmd_ctx, nand_cmd, "info", handle_nand_info_command, COMMAND_EXEC,
 307                                                  "print info about NAND flash device <num>");
 308                 register_command(cmd_ctx, nand_cmd, "probe", handle_nand_probe_command, COMMAND_EXEC,
 309                                                  "identify NAND flash device <num>");
 310                 register_command(cmd_ctx, nand_cmd, "check_bad_blocks", handle_nand_check_bad_blocks_command, COMMAND_EXEC,
 311                                                  "check NAND flash device <num> for bad blocks [<offset> <length>]");
 312                 register_command(cmd_ctx, nand_cmd, "erase",
 313                                 handle_nand_erase_command, COMMAND_EXEC,
 314                                 "erase blocks on NAND flash device <num> [<offset> <length>]");
 315                 register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
 316                                                  "dump from NAND flash device <num> <filename> "
 317                                                  "<offset> <length> [oob_raw | oob_only]");
 318                 register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
 319                                                  "write to NAND flash device <num> <filename> <offset> [oob_raw | oob_only | oob_softecc | oob_softecc_kw]");
 320                 register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
 321                                                  "raw access to NAND flash device <num> ['enable'|'disable']");
 322         }
 323
 324         return ERROR_OK;
 325 }
 326
 327 nand_device_t *get_nand_device_by_num(int num)
 328 {
 329         nand_device_t *p;
 330         int i = 0;
 331
 332         for (p = nand_devices; p; p = p->next)
 333         {
 334                 if (i++ == num)
 335                 {
 336                         return p;
 337                 }
 338         }
 339
 340         return NULL;
 341 }
 342
 343 static int nand_build_bbt(struct nand_device_s *device, int first, int last)
 344 {
 345         uint32_t page = 0x0;
 346         int i;
 347         uint8_t oob[6];
 348
 349         if ((first < 0) || (first >= device->num_blocks))
 350                 first = 0;
 351
 352         if ((last >= device->num_blocks) || (last == -1))
 353                 last = device->num_blocks - 1;
 354
 355         for (i = first; i < last; i++)
 356         {
 357                 nand_read_page(device, page, NULL, 0, oob, 6);
 358
 359                 if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 360                         || (((device->page_size == 512) && (oob[5] != 0xff)) ||
 361                                 ((device->page_size == 2048) && (oob[0] != 0xff))))
 362                 {
 363                         LOG_WARNING("bad block: %i", i);
 364                         device->blocks[i].is_bad = 1;
 365                 }
 366                 else
 367                 {
 368                         device->blocks[i].is_bad = 0;
 369                 }
 370
 371                 page += (device->erase_size / device->page_size);
 372         }
 373
 374         return ERROR_OK;
 375 }
 376
 377 int nand_read_status(struct nand_device_s *device, uint8_t *status)
 378 {
 379         if (!device->device)
 380                 return ERROR_NAND_DEVICE_NOT_PROBED;
 381
 382         /* Send read status command */
 383         device->controller->command(device, NAND_CMD_STATUS);
 384
 385         alive_sleep(1);
 386
 387         /* read status */
 388         if (device->device->options & NAND_BUSWIDTH_16)
 389         {
 390                 uint16_t data;
 391                 device->controller->read_data(device, &data);
 392                 *status = data & 0xff;
 393         }
 394         else
 395         {
 396                 device->controller->read_data(device, status);
 397         }
 398
 399         return ERROR_OK;
 400 }
 401
 402 static int nand_poll_ready(struct nand_device_s *device, int timeout)
 403 {
 404         uint8_t status;
 405
 406         device->controller->command(device, NAND_CMD_STATUS);
 407         do {
 408                 if (device->device->options & NAND_BUSWIDTH_16) {
 409                         uint16_t data;
 410                         device->controller->read_data(device, &data);
 411                         status = data & 0xff;
 412                 } else {
 413                         device->controller->read_data(device, &status);
 414                 }
 415                 if (status & NAND_STATUS_READY)
 416                         break;
 417                 alive_sleep(1);
 418         } while (timeout--);
 419
 420         return (status & NAND_STATUS_READY) != 0;
 421 }
 422
 423 int nand_probe(struct nand_device_s *device)
 424 {
 425         uint8_t manufacturer_id, device_id;
 426         uint8_t id_buff[6];
 427         int retval;
 428         int i;
 429
 430         /* clear device data */
 431         device->device = NULL;
 432         device->manufacturer = NULL;
 433
 434         /* clear device parameters */
 435         device->bus_width = 0;
 436         device->address_cycles = 0;
 437         device->page_size = 0;
 438         device->erase_size = 0;
 439
 440         /* initialize controller (device parameters are zero, use controller default) */
 441         if ((retval = device->controller->init(device) != ERROR_OK))
 442         {
 443                 switch (retval)
 444                 {
 445                         case ERROR_NAND_OPERATION_FAILED:
 446                                 LOG_DEBUG("controller initialization failed");
 447                                 return ERROR_NAND_OPERATION_FAILED;
 448                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 449                                 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
 450                                 return ERROR_NAND_OPERATION_FAILED;
 451                         default:
 452                                 LOG_ERROR("BUG: unknown controller initialization failure");
 453                                 return ERROR_NAND_OPERATION_FAILED;
 454                 }
 455         }
 456
 457         device->controller->command(device, NAND_CMD_RESET);
 458         device->controller->reset(device);
 459
 460         device->controller->command(device, NAND_CMD_READID);
 461         device->controller->address(device, 0x0);
 462
 463         if (device->bus_width == 8)
 464         {
 465                 device->controller->read_data(device, &manufacturer_id);
 466                 device->controller->read_data(device, &device_id);
 467         }
 468         else
 469         {
 470                 uint16_t data_buf;
 471                 device->controller->read_data(device, &data_buf);
 472                 manufacturer_id = data_buf & 0xff;
 473                 device->controller->read_data(device, &data_buf);
 474                 device_id = data_buf & 0xff;
 475         }
 476
 477         for (i = 0; nand_flash_ids[i].name; i++)
 478         {
 479                 if (nand_flash_ids[i].id == device_id)
 480                 {
 481                         device->device = &nand_flash_ids[i];
 482                         break;
 483                 }
 484         }
 485
 486         for (i = 0; nand_manuf_ids[i].name; i++)
 487         {
 488                 if (nand_manuf_ids[i].id == manufacturer_id)
 489                 {
 490                         device->manufacturer = &nand_manuf_ids[i];
 491                         break;
 492                 }
 493         }
 494
 495         if (!device->manufacturer)
 496         {
 497                 device->manufacturer = &nand_manuf_ids[0];
 498                 device->manufacturer->id = manufacturer_id;
 499         }
 500
 501         if (!device->device)
 502         {
 503                 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 504                         manufacturer_id, device_id);
 505                 return ERROR_NAND_OPERATION_FAILED;
 506         }
 507
 508         LOG_DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
 509
 510         /* initialize device parameters */
 511
 512         /* bus width */
 513         if (device->device->options & NAND_BUSWIDTH_16)
 514                 device->bus_width = 16;
 515         else
 516                 device->bus_width = 8;
 517
 518         /* Do we need extended device probe information? */
 519         if (device->device->page_size == 0 ||
 520             device->device->erase_size == 0)
 521         {
 522                 if (device->bus_width == 8)
 523                 {
 524                         device->controller->read_data(device, id_buff + 3);
 525                         device->controller->read_data(device, id_buff + 4);
 526                         device->controller->read_data(device, id_buff + 5);
 527                 }
 528                 else
 529                 {
 530                         uint16_t data_buf;
 531
 532                         device->controller->read_data(device, &data_buf);
 533                         id_buff[3] = data_buf;
 534
 535                         device->controller->read_data(device, &data_buf);
 536                         id_buff[4] = data_buf;
 537
 538                         device->controller->read_data(device, &data_buf);
 539                         id_buff[5] = data_buf >> 8;
 540                 }
 541         }
 542
 543         /* page size */
 544         if (device->device->page_size == 0)
 545         {
 546                 device->page_size = 1 << (10 + (id_buff[4] & 3));
 547         }
 548         else if (device->device->page_size == 256)
 549         {
 550                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
 551                 return ERROR_NAND_OPERATION_FAILED;
 552         }
 553         else
 554         {
 555                 device->page_size = device->device->page_size;
 556         }
 557
 558         /* number of address cycles */
 559         if (device->page_size <= 512)
 560         {
 561                 /* small page devices */
 562                 if (device->device->chip_size <= 32)
 563                         device->address_cycles = 3;
 564                 else if (device->device->chip_size <= 8*1024)
 565                         device->address_cycles = 4;
 566                 else
 567                 {
 568                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 569                         device->address_cycles = 5;
 570                 }
 571         }
 572         else
 573         {
 574                 /* large page devices */
 575                 if (device->device->chip_size <= 128)
 576                         device->address_cycles = 4;
 577                 else if (device->device->chip_size <= 32*1024)
 578                         device->address_cycles = 5;
 579                 else
 580                 {
 581                         LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 582                         device->address_cycles = 6;
 583                 }
 584         }
 585
 586         /* erase size */
 587         if (device->device->erase_size == 0)
 588         {
 589                 switch ((id_buff[4] >> 4) & 3) {
 590                 case 0:
 591                         device->erase_size = 64 << 10;
 592                         break;
 593                 case 1:
 594                         device->erase_size = 128 << 10;
 595                         break;
 596                 case 2:
 597                         device->erase_size = 256 << 10;
 598                         break;
 599                 case 3:
 600                         device->erase_size =512 << 10;
 601                         break;
 602                 }
 603         }
 604         else
 605         {
 606                 device->erase_size = device->device->erase_size;
 607         }
 608
 609         /* initialize controller, but leave parameters at the controllers default */
 610         if ((retval = device->controller->init(device) != ERROR_OK))
 611         {
 612                 switch (retval)
 613                 {
 614                         case ERROR_NAND_OPERATION_FAILED:
 615                                 LOG_DEBUG("controller initialization failed");
 616                                 return ERROR_NAND_OPERATION_FAILED;
 617                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 618                                 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 619                                         device->bus_width, device->address_cycles, device->page_size);
 620                                 return ERROR_NAND_OPERATION_FAILED;
 621                         default:
 622                                 LOG_ERROR("BUG: unknown controller initialization failure");
 623                                 return ERROR_NAND_OPERATION_FAILED;
 624                 }
 625         }
 626
 627         device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024);
 628         device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks);
 629
 630         for (i = 0; i < device->num_blocks; i++)
 631         {
 632                 device->blocks[i].size = device->erase_size;
 633                 device->blocks[i].offset = i * device->erase_size;
 634                 device->blocks[i].is_erased = -1;
 635                 device->blocks[i].is_bad = -1;
 636         }
 637
 638         return ERROR_OK;
 639 }
 640
 641 static int nand_erase(struct nand_device_s *device, int first_block, int last_block)
 642 {
 643         int i;
 644         uint32_t page;
 645         uint8_t status;
 646         int retval;
 647
 648         if (!device->device)
 649                 return ERROR_NAND_DEVICE_NOT_PROBED;
 650
 651         if ((first_block < 0) || (last_block > device->num_blocks))
 652                 return ERROR_INVALID_ARGUMENTS;
 653
 654         /* make sure we know if a block is bad before erasing it */
 655         for (i = first_block; i <= last_block; i++)
 656         {
 657                 if (device->blocks[i].is_bad == -1)
 658                 {
 659                         nand_build_bbt(device, i, last_block);
 660                         break;
 661                 }
 662         }
 663
 664         for (i = first_block; i <= last_block; i++)
 665         {
 666                 /* Send erase setup command */
 667                 device->controller->command(device, NAND_CMD_ERASE1);
 668
 669                 page = i * (device->erase_size / device->page_size);
 670
 671                 /* Send page address */
 672                 if (device->page_size <= 512)
 673                 {
 674                         /* row */
 675                         device->controller->address(device, page & 0xff);
 676                         device->controller->address(device, (page >> 8) & 0xff);
 677
 678                         /* 3rd cycle only on devices with more than 32 MiB */
 679                         if (device->address_cycles >= 4)
 680                                 device->controller->address(device, (page >> 16) & 0xff);
 681
 682                         /* 4th cycle only on devices with more than 8 GiB */
 683                         if (device->address_cycles >= 5)
 684                                 device->controller->address(device, (page >> 24) & 0xff);
 685                 }
 686                 else
 687                 {
 688                         /* row */
 689                         device->controller->address(device, page & 0xff);
 690                         device->controller->address(device, (page >> 8) & 0xff);
 691
 692                         /* 3rd cycle only on devices with more than 128 MiB */
 693                         if (device->address_cycles >= 5)
 694                                 device->controller->address(device, (page >> 16) & 0xff);
 695                 }
 696
 697                 /* Send erase confirm command */
 698                 device->controller->command(device, NAND_CMD_ERASE2);
 699
 700                 retval = device->controller->nand_ready ?
 701                                 device->controller->nand_ready(device, 1000) :
 702                                 nand_poll_ready(device, 1000);
 703                 if (!retval) {
 704                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 705                         return ERROR_NAND_OPERATION_TIMEOUT;
 706                 }
 707
 708                 if ((retval = nand_read_status(device, &status)) != ERROR_OK)
 709                 {
 710                         LOG_ERROR("couldn't read status");
 711                         return ERROR_NAND_OPERATION_FAILED;
 712                 }
 713
 714                 if (status & 0x1)
 715                 {
 716                         LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
 717                                         (device->blocks[i].is_bad == 1)
 718                                                 ? "bad " : "",
 719                                         i, status);
 720                         /* continue; other blocks might still be erasable */
 721                 }
 722
 723                 device->blocks[i].is_erased = 1;
 724         }
 725
 726         return ERROR_OK;
 727 }
 728
 729 #if 0
 730 static int nand_read_plain(struct nand_device_s *device, uint32_t address, uint8_t *data, uint32_t data_size)
 731 {
 732         uint8_t *page;
 733
 734         if (!device->device)
 735                 return ERROR_NAND_DEVICE_NOT_PROBED;
 736
 737         if (address % device->page_size)
 738         {
 739                 LOG_ERROR("reads need to be page aligned");
 740                 return ERROR_NAND_OPERATION_FAILED;
 741         }
 742
 743         page = malloc(device->page_size);
 744
 745         while (data_size > 0)
 746         {
 747                 uint32_t thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 748                 uint32_t page_address;
 749
 750
 751                 page_address = address / device->page_size;
 752
 753                 nand_read_page(device, page_address, page, device->page_size, NULL, 0);
 754
 755                 memcpy(data, page, thisrun_size);
 756
 757                 address += thisrun_size;
 758                 data += thisrun_size;
 759                 data_size -= thisrun_size;
 760         }
 761
 762         free(page);
 763
 764         return ERROR_OK;
 765 }
 766
 767 static int nand_write_plain(struct nand_device_s *device, uint32_t address, uint8_t *data, uint32_t data_size)
 768 {
 769         uint8_t *page;
 770
 771         if (!device->device)
 772                 return ERROR_NAND_DEVICE_NOT_PROBED;
 773
 774         if (address % device->page_size)
 775         {
 776                 LOG_ERROR("writes need to be page aligned");
 777                 return ERROR_NAND_OPERATION_FAILED;
 778         }
 779
 780         page = malloc(device->page_size);
 781
 782         while (data_size > 0)
 783         {
 784                 uint32_t thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 785                 uint32_t page_address;
 786
 787                 memset(page, 0xff, device->page_size);
 788                 memcpy(page, data, thisrun_size);
 789
 790                 page_address = address / device->page_size;
 791
 792                 nand_write_page(device, page_address, page, device->page_size, NULL, 0);
 793
 794                 address += thisrun_size;
 795                 data += thisrun_size;
 796                 data_size -= thisrun_size;
 797         }
 798
 799         free(page);
 800
 801         return ERROR_OK;
 802 }
 803 #endif
 804
 805 int nand_write_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 806 {
 807         uint32_t block;
 808
 809         if (!device->device)
 810                 return ERROR_NAND_DEVICE_NOT_PROBED;
 811
 812         block = page / (device->erase_size / device->page_size);
 813         if (device->blocks[block].is_erased == 1)
 814                 device->blocks[block].is_erased = 0;
 815
 816         if (device->use_raw || device->controller->write_page == NULL)
 817                 return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
 818         else
 819                 return device->controller->write_page(device, page, data, data_size, oob, oob_size);
 820 }
 821
 822 static int nand_read_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 823 {
 824         if (!device->device)
 825                 return ERROR_NAND_DEVICE_NOT_PROBED;
 826
 827         if (device->use_raw || device->controller->read_page == NULL)
 828                 return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
 829         else
 830                 return device->controller->read_page(device, page, data, data_size, oob, oob_size);
 831 }
 832
 833 int nand_read_page_raw(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 834 {
 835         uint32_t i;
 836
 837         if (!device->device)
 838                 return ERROR_NAND_DEVICE_NOT_PROBED;
 839
 840         if (device->page_size <= 512)
 841         {
 842                 /* small page device */
 843                 if (data)
 844                         device->controller->command(device, NAND_CMD_READ0);
 845                 else
 846                         device->controller->command(device, NAND_CMD_READOOB);
 847
 848                 /* column (always 0, we start at the beginning of a page/OOB area) */
 849                 device->controller->address(device, 0x0);
 850
 851                 /* row */
 852                 device->controller->address(device, page & 0xff);
 853                 device->controller->address(device, (page >> 8) & 0xff);
 854
 855                 /* 4th cycle only on devices with more than 32 MiB */
 856                 if (device->address_cycles >= 4)
 857                         device->controller->address(device, (page >> 16) & 0xff);
 858
 859                 /* 5th cycle only on devices with more than 8 GiB */
 860                 if (device->address_cycles >= 5)
 861                         device->controller->address(device, (page >> 24) & 0xff);
 862         }
 863         else
 864         {
 865                 /* large page device */
 866                 device->controller->command(device, NAND_CMD_READ0);
 867
 868                 /* column (0 when we start at the beginning of a page,
 869                  * or 2048 for the beginning of OOB area)
 870                  */
 871                 device->controller->address(device, 0x0);
 872                 if (data)
 873                         device->controller->address(device, 0x0);
 874                 else
 875                         device->controller->address(device, 0x8);
 876
 877                 /* row */
 878                 device->controller->address(device, page & 0xff);
 879                 device->controller->address(device, (page >> 8) & 0xff);
 880
 881                 /* 5th cycle only on devices with more than 128 MiB */
 882                 if (device->address_cycles >= 5)
 883                         device->controller->address(device, (page >> 16) & 0xff);
 884
 885                 /* large page devices need a start command */
 886                 device->controller->command(device, NAND_CMD_READSTART);
 887         }
 888
 889         if (device->controller->nand_ready) {
 890                 if (!device->controller->nand_ready(device, 100))
 891                         return ERROR_NAND_OPERATION_TIMEOUT;
 892         } else {
 893                 alive_sleep(1);
 894         }
 895
 896         if (data)
 897         {
 898                 if (device->controller->read_block_data != NULL)
 899                         (device->controller->read_block_data)(device, data, data_size);
 900                 else
 901                 {
 902                         for (i = 0; i < data_size;)
 903                         {
 904                                 if (device->device->options & NAND_BUSWIDTH_16)
 905                                 {
 906                                         device->controller->read_data(device, data);
 907                                         data += 2;
 908                                         i += 2;
 909                                 }
 910                                 else
 911                                 {
 912                                         device->controller->read_data(device, data);
 913                                         data += 1;
 914                                         i += 1;
 915                                 }
 916                         }
 917                 }
 918         }
 919
 920         if (oob)
 921         {
 922                 if (device->controller->read_block_data != NULL)
 923                         (device->controller->read_block_data)(device, oob, oob_size);
 924                 else
 925                 {
 926                         for (i = 0; i < oob_size;)
 927                         {
 928                                 if (device->device->options & NAND_BUSWIDTH_16)
 929                                 {
 930                                         device->controller->read_data(device, oob);
 931                                         oob += 2;
 932                                         i += 2;
 933                                 }
 934                                 else
 935                                 {
 936                                         device->controller->read_data(device, oob);
 937                                         oob += 1;
 938                                         i += 1;
 939                                 }
 940                         }
 941                 }
 942         }
 943
 944         return ERROR_OK;
 945 }
 946
 947 int nand_write_page_raw(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 948 {
 949         uint32_t i;
 950         int retval;
 951         uint8_t status;
 952
 953         if (!device->device)
 954                 return ERROR_NAND_DEVICE_NOT_PROBED;
 955
 956         device->controller->command(device, NAND_CMD_SEQIN);
 957
 958         if (device->page_size <= 512)
 959         {
 960                 /* column (always 0, we start at the beginning of a page/OOB area) */
 961                 device->controller->address(device, 0x0);
 962
 963                 /* row */
 964                 device->controller->address(device, page & 0xff);
 965                 device->controller->address(device, (page >> 8) & 0xff);
 966
 967                 /* 4th cycle only on devices with more than 32 MiB */
 968                 if (device->address_cycles >= 4)
 969                         device->controller->address(device, (page >> 16) & 0xff);
 970
 971                 /* 5th cycle only on devices with more than 8 GiB */
 972                 if (device->address_cycles >= 5)
 973                         device->controller->address(device, (page >> 24) & 0xff);
 974         }
 975         else
 976         {
 977                 /* column (0 when we start at the beginning of a page,
 978                  * or 2048 for the beginning of OOB area)
 979                  */
 980                 device->controller->address(device, 0x0);
 981                 if (data)
 982                         device->controller->address(device, 0x0);
 983                 else
 984                         device->controller->address(device, 0x8);
 985
 986                 /* row */
 987                 device->controller->address(device, page & 0xff);
 988                 device->controller->address(device, (page >> 8) & 0xff);
 989
 990                 /* 5th cycle only on devices with more than 128 MiB */
 991                 if (device->address_cycles >= 5)
 992                         device->controller->address(device, (page >> 16) & 0xff);
 993         }
 994
 995         if (data)
 996         {
 997                 if (device->controller->write_block_data != NULL)
 998                         (device->controller->write_block_data)(device, data, data_size);
 999                 else
1000                 {
1001                         for (i = 0; i < data_size;)
1002                         {
1003                                 if (device->device->options & NAND_BUSWIDTH_16)
1004                                 {
1005                                         uint16_t data_buf = le_to_h_u16(data);
1006                                         device->controller->write_data(device, data_buf);
1007                                         data += 2;
1008                                         i += 2;
1009                                 }
1010                                 else
1011                                 {
1012                                         device->controller->write_data(device, *data);
1013                                         data += 1;
1014                                         i += 1;
1015                                 }
1016                         }
1017                 }
1018         }
1019
1020         if (oob)
1021         {
1022                 if (device->controller->write_block_data != NULL)
1023                         (device->controller->write_block_data)(device, oob, oob_size);
1024                 else
1025                 {
1026                         for (i = 0; i < oob_size;)
1027                         {
1028                                 if (device->device->options & NAND_BUSWIDTH_16)
1029                                 {
1030                                         uint16_t oob_buf = le_to_h_u16(data);
1031                                         device->controller->write_data(device, oob_buf);
1032                                         oob += 2;
1033                                         i += 2;
1034                                 }
1035                                 else
1036                                 {
1037                                         device->controller->write_data(device, *oob);
1038                                         oob += 1;
1039                                         i += 1;
1040                                 }
1041                         }
1042                 }
1043         }
1044
1045         device->controller->command(device, NAND_CMD_PAGEPROG);
1046
1047         retval = device->controller->nand_ready ?
1048                         device->controller->nand_ready(device, 100) :
1049                         nand_poll_ready(device, 100);
1050         if (!retval)
1051                 return ERROR_NAND_OPERATION_TIMEOUT;
1052
1053         if ((retval = nand_read_status(device, &status)) != ERROR_OK)
1054         {
1055                 LOG_ERROR("couldn't read status");
1056                 return ERROR_NAND_OPERATION_FAILED;
1057         }
1058
1059         if (status & NAND_STATUS_FAIL)
1060         {
1061                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
1062                 return ERROR_NAND_OPERATION_FAILED;
1063         }
1064
1065         return ERROR_OK;
1066 }
1067
1068 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1069 {
1070         nand_device_t *p;
1071         int i;
1072
1073         if (!nand_devices)
1074         {
1075                 command_print(cmd_ctx, "no NAND flash devices configured");
1076                 return ERROR_OK;
1077         }
1078
1079         for (p = nand_devices, i = 0; p; p = p->next, i++)
1080         {
1081                 if (p->device)
1082                         command_print(cmd_ctx, "#%i: %s (%s) "
1083                                 "pagesize: %i, buswidth: %i,\n\t"
1084                                 "blocksize: %i, blocks: %i",
1085                                 i, p->device->name, p->manufacturer->name,
1086                                 p->page_size, p->bus_width,
1087                                 p->erase_size, p->num_blocks);
1088                 else
1089                         command_print(cmd_ctx, "#%i: not probed", i);
1090         }
1091
1092         return ERROR_OK;
1093 }
1094
1095 static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1096 {
1097         nand_device_t *p;
1098         int i = 0;
1099         int j = 0;
1100         int first = -1;
1101         int last = -1;
1102
1103         switch (argc) {
1104         default:
1105                 return ERROR_COMMAND_SYNTAX_ERROR;
1106         case 1:
1107                 first = 0;
1108                 last = INT32_MAX;
1109                 break;
1110         case 2:
1111                 first = last = strtoul(args[1], NULL, 0);
1112                 break;
1113         case 3:
1114                 first = strtoul(args[1], NULL, 0);
1115                 last = strtoul(args[2], NULL, 0);
1116                 break;
1117         }
1118
1119         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1120         if (p)
1121         {
1122                 if (p->device)
1123                 {
1124                         if (first >= p->num_blocks)
1125                                 first = p->num_blocks - 1;
1126
1127                         if (last >= p->num_blocks)
1128                                 last = p->num_blocks - 1;
1129
1130                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1131                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1132
1133                         for (j = first; j <= last; j++)
1134                         {
1135                                 char *erase_state, *bad_state;
1136
1137                                 if (p->blocks[j].is_erased == 0)
1138                                         erase_state = "not erased";
1139                                 else if (p->blocks[j].is_erased == 1)
1140                                         erase_state = "erased";
1141                                 else
1142                                         erase_state = "erase state unknown";
1143
1144                                 if (p->blocks[j].is_bad == 0)
1145                                         bad_state = "";
1146                                 else if (p->blocks[j].is_bad == 1)
1147                                         bad_state = " (marked bad)";
1148                                 else
1149                                         bad_state = " (block condition unknown)";
1150
1151                                 command_print(cmd_ctx,
1152                                               "\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s",
1153                                               j,
1154                                               p->blocks[j].offset,
1155                                               p->blocks[j].size / 1024,
1156                                               erase_state,
1157                                               bad_state);
1158                         }
1159                 }
1160                 else
1161                 {
1162                         command_print(cmd_ctx, "#%s: not probed", args[0]);
1163                 }
1164         }
1165
1166         return ERROR_OK;
1167 }
1168
1169 static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1170 {
1171         nand_device_t *p;
1172         int retval;
1173
1174         if (argc != 1)
1175         {
1176                 return ERROR_COMMAND_SYNTAX_ERROR;
1177         }
1178
1179         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1180         if (p)
1181         {
1182                 if ((retval = nand_probe(p)) == ERROR_OK)
1183                 {
1184                         command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name);
1185                 }
1186                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1187                 {
1188                         command_print(cmd_ctx, "probing failed for NAND flash device");
1189                 }
1190                 else
1191                 {
1192                         command_print(cmd_ctx, "unknown error when probing NAND flash device");
1193                 }
1194         }
1195         else
1196         {
1197                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1198         }
1199
1200         return ERROR_OK;
1201 }
1202
1203 static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1204 {
1205         nand_device_t *p;
1206         int retval;
1207
1208         if (argc != 1 && argc != 3)
1209         {
1210                 return ERROR_COMMAND_SYNTAX_ERROR;
1211
1212         }
1213
1214         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1215         if (p)
1216         {
1217                 char *cp;
1218                 unsigned long offset;
1219                 unsigned long length;
1220
1221                 /* erase specified part of the chip; or else everything */
1222                 if (argc == 3) {
1223                         unsigned long size = p->erase_size * p->num_blocks;
1224
1225                         offset = strtoul(args[1], &cp, 0);
1226                         if (*cp || (offset == ULONG_MAX)
1227                                         || (offset % p->erase_size) != 0
1228                                         || offset >= size)
1229                                 return ERROR_INVALID_ARGUMENTS;
1230
1231                         length = strtoul(args[2], &cp, 0);
1232                         if (*cp || (length == ULONG_MAX)
1233                                         || (length == 0)
1234                                         || (length % p->erase_size) != 0
1235                                         || (length + offset) > size)
1236                                 return ERROR_INVALID_ARGUMENTS;
1237
1238                         offset /= p->erase_size;
1239                         length /= p->erase_size;
1240                 } else {
1241                         offset = 0;
1242                         length = p->num_blocks;
1243                 }
1244
1245                 retval = nand_erase(p, offset, offset + length - 1);
1246                 if (retval == ERROR_OK)
1247                 {
1248                         command_print(cmd_ctx, "erased blocks %lu to %lu "
1249                                         "on NAND flash device #%s '%s'",
1250                                         offset, offset + length,
1251                                         args[0], p->device->name);
1252                 }
1253                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1254                 {
1255                         command_print(cmd_ctx, "erase failed");
1256                 }
1257                 else
1258                 {
1259                         command_print(cmd_ctx, "unknown error when erasing NAND flash device");
1260                 }
1261         }
1262         else
1263         {
1264                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1265         }
1266
1267         return ERROR_OK;
1268 }
1269
1270 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1271 {
1272         nand_device_t *p;
1273         int retval;
1274         int first = -1;
1275         int last = -1;
1276
1277         if ((argc < 1) || (argc > 3) || (argc == 2))
1278         {
1279                 return ERROR_COMMAND_SYNTAX_ERROR;
1280
1281         }
1282
1283         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1284         if (!p) {
1285                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds",
1286                                 args[0]);
1287                 return ERROR_INVALID_ARGUMENTS;
1288         }
1289
1290         if (argc == 3)
1291         {
1292                 char *cp;
1293                 unsigned long offset;
1294                 unsigned long length;
1295
1296                 offset = strtoul(args[1], &cp, 0);
1297                 if (*cp || offset == ULONG_MAX || offset % p->erase_size)
1298                 {
1299                         return ERROR_INVALID_ARGUMENTS;
1300                 }
1301                 offset /= p->erase_size;
1302
1303                 length = strtoul(args[2], &cp, 0);
1304                 if (*cp || length == ULONG_MAX || length % p->erase_size)
1305                 {
1306                         return ERROR_INVALID_ARGUMENTS;
1307                 }
1308                 length -= 1;
1309                 length /= p->erase_size;
1310
1311                 first = offset;
1312                 last = offset + length;
1313         }
1314
1315         retval = nand_build_bbt(p, first, last);
1316         if (retval == ERROR_OK)
1317         {
1318                 command_print(cmd_ctx, "checked NAND flash device for bad blocks, "
1319                                 "use \"nand info\" command to list blocks");
1320         }
1321         else if (retval == ERROR_NAND_OPERATION_FAILED)
1322         {
1323                 command_print(cmd_ctx, "error when checking for bad blocks on "
1324                                 "NAND flash device");
1325         }
1326         else
1327         {
1328                 command_print(cmd_ctx, "unknown error when checking for bad "
1329                                 "blocks on NAND flash device");
1330         }
1331
1332         return ERROR_OK;
1333 }
1334
1335 static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1336 {
1337         uint32_t offset;
1338         uint32_t binary_size;
1339         uint32_t buf_cnt;
1340         enum oob_formats oob_format = NAND_OOB_NONE;
1341
1342         fileio_t fileio;
1343
1344         duration_t duration;
1345         char *duration_text;
1346
1347         nand_device_t *p;
1348
1349         if (argc < 3)
1350         {
1351                 return ERROR_COMMAND_SYNTAX_ERROR;
1352
1353         }
1354
1355         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1356         if (p)
1357         {
1358                 uint8_t *page = NULL;
1359                 uint32_t page_size = 0;
1360                 uint8_t *oob = NULL;
1361                 uint32_t oob_size = 0;
1362                 const int *eccpos = NULL;
1363
1364                 offset = strtoul(args[2], NULL, 0);
1365
1366                 if (argc > 3)
1367                 {
1368                         int i;
1369                         for (i = 3; i < argc; i++)
1370                         {
1371                                 if (!strcmp(args[i], "oob_raw"))
1372                                         oob_format |= NAND_OOB_RAW;
1373                                 else if (!strcmp(args[i], "oob_only"))
1374                                         oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1375                                 else if (!strcmp(args[i], "oob_softecc"))
1376                                         oob_format |= NAND_OOB_SW_ECC;
1377                                 else if (!strcmp(args[i], "oob_softecc_kw"))
1378                                         oob_format |= NAND_OOB_SW_ECC_KW;
1379                                 else
1380                                 {
1381                                         command_print(cmd_ctx, "unknown option: %s", args[i]);
1382                                         return ERROR_COMMAND_SYNTAX_ERROR;
1383                                 }
1384                         }
1385                 }
1386
1387                 duration_start_measure(&duration);
1388
1389                 if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK)
1390                 {
1391                         return ERROR_OK;
1392                 }
1393
1394                 buf_cnt = binary_size = fileio.size;
1395
1396                 if (!(oob_format & NAND_OOB_ONLY))
1397                 {
1398                         page_size = p->page_size;
1399                         page = malloc(p->page_size);
1400                 }
1401
1402                 if (oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW))
1403                 {
1404                         if (p->page_size == 512) {
1405                                 oob_size = 16;
1406                                 eccpos = nand_oob_16.eccpos;
1407                         } else if (p->page_size == 2048) {
1408                                 oob_size = 64;
1409                                 eccpos = nand_oob_64.eccpos;
1410                         }
1411                         oob = malloc(oob_size);
1412                 }
1413
1414                 if (offset % p->page_size)
1415                 {
1416                         command_print(cmd_ctx, "only page size aligned offsets and sizes are supported");
1417                         fileio_close(&fileio);
1418                         free(oob);
1419                         free(page);
1420                         return ERROR_OK;
1421                 }
1422
1423                 while (buf_cnt > 0)
1424                 {
1425                         uint32_t size_read;
1426
1427                         if (NULL != page)
1428                         {
1429                                 fileio_read(&fileio, page_size, page, &size_read);
1430                                 buf_cnt -= size_read;
1431                                 if (size_read < page_size)
1432                                 {
1433                                         memset(page + size_read, 0xff, page_size - size_read);
1434                                 }
1435                         }
1436
1437                         if (oob_format & NAND_OOB_SW_ECC)
1438                         {
1439                                 uint32_t i, j;
1440                                 uint8_t ecc[3];
1441                                 memset(oob, 0xff, oob_size);
1442                                 for (i = 0, j = 0; i < page_size; i += 256) {
1443                                         nand_calculate_ecc(p, page + i, ecc);
1444                                         oob[eccpos[j++]] = ecc[0];
1445                                         oob[eccpos[j++]] = ecc[1];
1446                                         oob[eccpos[j++]] = ecc[2];
1447                                 }
1448                         } else if (oob_format & NAND_OOB_SW_ECC_KW)
1449                         {
1450                                 /*
1451                                  * In this case eccpos is not used as
1452                                  * the ECC data is always stored contigously
1453                                  * at the end of the OOB area.  It consists
1454                                  * of 10 bytes per 512-byte data block.
1455                                  */
1456                                 uint32_t i;
1457                                 uint8_t *ecc = oob + oob_size - page_size/512 * 10;
1458                                 memset(oob, 0xff, oob_size);
1459                                 for (i = 0; i < page_size; i += 512) {
1460                                         nand_calculate_ecc_kw(p, page + i, ecc);
1461                                         ecc += 10;
1462                                 }
1463                         }
1464                         else if (NULL != oob)
1465                         {
1466                                 fileio_read(&fileio, oob_size, oob, &size_read);
1467                                 buf_cnt -= size_read;
1468                                 if (size_read < oob_size)
1469                                 {
1470                                         memset(oob + size_read, 0xff, oob_size - size_read);
1471                                 }
1472                         }
1473
1474                         if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK)
1475                         {
1476                                 command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8" PRIx32 "",
1477                                         args[1], args[0], offset);
1478
1479                                 fileio_close(&fileio);
1480                                 free(oob);
1481                                 free(page);
1482
1483                                 return ERROR_OK;
1484                         }
1485                         offset += page_size;
1486                 }
1487
1488                 fileio_close(&fileio);
1489                 free(oob);
1490                 free(page);
1491                 oob = NULL;
1492                 page = NULL;
1493                 duration_stop_measure(&duration, &duration_text);
1494                 command_print(cmd_ctx, "wrote file %s to NAND flash %s up to offset 0x%8.8" PRIx32 " in %s",
1495                         args[1], args[0], offset, duration_text);
1496                 free(duration_text);
1497                 duration_text = NULL;
1498         }
1499         else
1500         {
1501                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1502         }
1503
1504         return ERROR_OK;
1505 }
1506
1507 static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1508 {
1509         nand_device_t *p;
1510
1511         if (argc < 4)
1512         {
1513                 return ERROR_COMMAND_SYNTAX_ERROR;
1514         }
1515
1516         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1517         if (p)
1518         {
1519                 if (p->device)
1520                 {
1521                         fileio_t fileio;
1522                         duration_t duration;
1523                         char *duration_text;
1524                         int retval;
1525
1526                         uint8_t *page = NULL;
1527                         uint32_t page_size = 0;
1528                         uint8_t *oob = NULL;
1529                         uint32_t oob_size = 0;
1530                         uint32_t address = strtoul(args[2], NULL, 0);
1531                         uint32_t size = strtoul(args[3], NULL, 0);
1532                         uint32_t bytes_done = 0;
1533                         enum oob_formats oob_format = NAND_OOB_NONE;
1534
1535                         if (argc > 4)
1536                         {
1537                                 int i;
1538                                 for (i = 4; i < argc; i++)
1539                                 {
1540                                         if (!strcmp(args[i], "oob_raw"))
1541                                                 oob_format |= NAND_OOB_RAW;
1542                                         else if (!strcmp(args[i], "oob_only"))
1543                                                 oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1544                                         else
1545                                                 command_print(cmd_ctx, "unknown option: '%s'", args[i]);
1546                                 }
1547                         }
1548
1549                         if ((address % p->page_size) || (size % p->page_size))
1550                         {
1551                                 command_print(cmd_ctx, "only page size aligned addresses and sizes are supported");
1552                                 return ERROR_OK;
1553                         }
1554
1555                         if (!(oob_format & NAND_OOB_ONLY))
1556                         {
1557                                 page_size = p->page_size;
1558                                 page = malloc(p->page_size);
1559                         }
1560
1561                         if (oob_format & NAND_OOB_RAW)
1562                         {
1563                                 if (p->page_size == 512)
1564                                         oob_size = 16;
1565                                 else if (p->page_size == 2048)
1566                                         oob_size = 64;
1567                                 oob = malloc(oob_size);
1568                         }
1569
1570                         if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK)
1571                         {
1572                                 return ERROR_OK;
1573                         }
1574
1575                         duration_start_measure(&duration);
1576
1577                         while (size > 0)
1578                         {
1579                                 uint32_t size_written;
1580                                 if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK)
1581                                 {
1582                                         command_print(cmd_ctx, "reading NAND flash page failed");
1583                                         free(page);
1584                                         free(oob);
1585                                         fileio_close(&fileio);
1586                                         return ERROR_OK;
1587                                 }
1588
1589                                 if (NULL != page)
1590                                 {
1591                                         fileio_write(&fileio, page_size, page, &size_written);
1592                                         bytes_done += page_size;
1593                                 }
1594
1595                                 if (NULL != oob)
1596                                 {
1597                                         fileio_write(&fileio, oob_size, oob, &size_written);
1598                                         bytes_done += oob_size;
1599                                 }
1600
1601                                 size -= p->page_size;
1602                                 address += p->page_size;
1603                         }
1604
1605                         free(page);
1606                         page = NULL;
1607                         free(oob);
1608                         oob = NULL;
1609                         fileio_close(&fileio);
1610
1611                         duration_stop_measure(&duration, &duration_text);
1612                         command_print(cmd_ctx, "dumped %lld byte in %s", fileio.size, duration_text);
1613                         free(duration_text);
1614                         duration_text = NULL;
1615                 }
1616                 else
1617                 {
1618                         command_print(cmd_ctx, "#%s: not probed", args[0]);
1619                 }
1620         }
1621         else
1622         {
1623                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1624         }
1625
1626         return ERROR_OK;
1627 }
1628
1629 static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1630 {
1631         nand_device_t *p;
1632
1633         if ((argc < 1) || (argc > 2))
1634         {
1635                 return ERROR_COMMAND_SYNTAX_ERROR;
1636         }
1637
1638         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1639         if (p)
1640         {
1641                 if (p->device)
1642                 {
1643                         if (argc == 2)
1644                         {
1645                                 if (strcmp("enable", args[1]) == 0)
1646                                 {
1647                                         p->use_raw = 1;
1648                                 }
1649                                 else if (strcmp("disable", args[1]) == 0)
1650                                 {
1651                                         p->use_raw = 0;
1652                                 }
1653                                 else
1654                                 {
1655                                         return ERROR_COMMAND_SYNTAX_ERROR;
1656                                 }
1657                         }
1658
1659                         command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled");
1660                 }
1661                 else
1662                 {
1663                         command_print(cmd_ctx, "#%s: not probed", args[0]);
1664                 }
1665         }
1666         else
1667         {
1668                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1669         }
1670
1671         return ERROR_OK;
1672 }