1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
6 * drivers/mtd/nand_ids.c *
8 * Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de) *
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
24 ***************************************************************************/
29 #include "replacements.h"
39 #include "time_support.h"
43 int nand_register_commands(struct command_context_s *cmd_ctx);
44 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
45 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
46 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
47 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
48 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
49 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
50 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
51 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
53 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
55 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
56 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
57 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
59 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
60 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
62 /* NAND flash controller
64 extern nand_flash_controller_t lpc3180_nand_controller;
65 /* extern nand_flash_controller_t s3c2410_nand_controller; */
66 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
68 nand_flash_controller_t *nand_flash_controllers[] =
70 &lpc3180_nand_controller,
71 /* &s3c2410_nand_controller, */
72 /* &boundary_scan_nand_controller, */
76 /* configured NAND devices and NAND Flash command handler */
77 nand_device_t *nand_devices = NULL;
78 static command_t *nand_cmd;
82 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
85 * Pagesize; 0, 256, 512
86 * 0 get this information from the extended chip ID
87 * 256 256 Byte page size
88 * 512 512 Byte page size
90 nand_info_t nand_flash_ids[] =
92 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
93 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
94 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
95 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
96 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
97 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
98 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
99 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
100 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
101 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
103 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
104 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
105 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
106 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
108 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
109 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
110 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
111 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
113 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
114 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
115 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
116 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
118 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
119 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
120 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
121 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
123 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
124 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
125 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
126 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
127 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
128 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
129 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
131 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
133 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS},
134 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS},
135 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16},
136 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16},
138 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS},
139 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS},
140 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16},
141 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16},
143 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS},
144 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS},
145 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16},
146 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16},
148 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS},
149 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS},
150 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16},
151 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16},
153 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS},
154 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS},
155 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16},
156 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16},
158 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS},
159 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS},
160 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16},
161 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
166 /* Manufacturer ID list
168 nand_manufacturer_t nand_manuf_ids[] =
171 {NAND_MFR_TOSHIBA, "Toshiba"},
172 {NAND_MFR_SAMSUNG, "Samsung"},
173 {NAND_MFR_FUJITSU, "Fujitsu"},
174 {NAND_MFR_NATIONAL, "National"},
175 {NAND_MFR_RENESAS, "Renesas"},
176 {NAND_MFR_STMICRO, "ST Micro"},
177 {NAND_MFR_HYNIX, "Hynix"},
181 /* nand device <nand_controller> [controller options]
183 int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
190 WARNING("incomplete flash device nand configuration");
191 return ERROR_FLASH_BANK_INVALID;
194 for (i = 0; nand_flash_controllers[i]; i++)
196 nand_device_t *p, *c;
198 if (strcmp(args[0], nand_flash_controllers[i]->name) == 0)
200 /* register flash specific commands */
201 if (nand_flash_controllers[i]->register_commands(cmd_ctx) != ERROR_OK)
203 ERROR("couldn't register '%s' commands", args[0]);
207 c = malloc(sizeof(nand_device_t));
209 c->controller = nand_flash_controllers[i];
210 c->controller_priv = NULL;
211 c->manufacturer = NULL;
214 c->address_cycles = 0;
219 if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK)
221 ERROR("'%s' driver rejected nand flash", c->controller->name);
226 /* put NAND device in linked list */
229 /* find last flash device */
230 for (p = nand_devices; p && p->next; p = p->next);
243 /* no valid NAND controller was found (i.e. the configuration option,
244 * didn't match one of the compiled-in controllers)
246 ERROR("No valid NAND flash controller found (%s)", args[0]);
247 ERROR("compiled-in NAND flash controllers:");
248 for (i = 0; nand_flash_controllers[i]; i++)
250 ERROR("%i: %s", i, nand_flash_controllers[i]->name);
256 int nand_register_commands(struct command_context_s *cmd_ctx)
258 nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, NULL);
260 register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL);
265 int nand_init(struct command_context_s *cmd_ctx)
269 register_command(cmd_ctx, nand_cmd, "list", handle_nand_list_command, COMMAND_EXEC,
270 "list configured NAND flash devices");
271 register_command(cmd_ctx, nand_cmd, "info", handle_nand_info_command, COMMAND_EXEC,
272 "print info about NAND flash device <num>");
273 register_command(cmd_ctx, nand_cmd, "probe", handle_nand_probe_command, COMMAND_EXEC,
274 "identify NAND flash device <num>");
275 register_command(cmd_ctx, nand_cmd, "check_bad_blocks", handle_nand_check_bad_blocks_command, COMMAND_EXEC,
276 "check NAND flash device <num> for bad blocks [<first> <last>]");
277 register_command(cmd_ctx, nand_cmd, "erase", handle_nand_erase_command, COMMAND_EXEC,
278 "erase blocks on NAND flash device <num> <first> <last>");
279 register_command(cmd_ctx, nand_cmd, "copy", handle_nand_copy_command, COMMAND_EXEC,
280 "copy from NAND flash device <num> <offset> <length> <ram-address>");
281 register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
282 "dump from NAND flash device <num> <filename> <offset> <size> [options]");
283 register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
284 "write to NAND flash device <num> <filename> <offset> [options]");
285 register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
286 "raw access to NAND flash device <num> ['enable'|'disable']");
292 nand_device_t *get_nand_device_by_num(int num)
297 for (p = nand_devices; p; p = p->next)
308 int nand_build_bbt(struct nand_device_s *device, int first, int last)
316 if ((first < 0) || (first >= device->num_blocks))
319 if ((last >= device->num_blocks) || (last == -1))
320 last = device->num_blocks - 1;
322 for (i = first; i < last; i++)
324 nand_read_page(device, page, NULL, 0, oob, 6);
326 if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
327 || (((device->page_size == 512) && (oob[5] != 0xff)) ||
328 ((device->page_size == 2048) && (oob[0] != 0xff))))
330 WARNING("invalid block: %i", i);
331 device->blocks[i].is_bad = 1;
335 device->blocks[i].is_bad = 0;
338 page += (device->erase_size / device->page_size);
344 int nand_read_status(struct nand_device_s *device, u8 *status)
347 return ERROR_NAND_DEVICE_NOT_PROBED;
349 /* Send read status command */
350 device->controller->command(device, NAND_CMD_STATUS);
355 if (device->device->options & NAND_BUSWIDTH_16)
358 device->controller->read_data(device, &data);
359 *status = data & 0xff;
363 device->controller->read_data(device, status);
369 int nand_probe(struct nand_device_s *device)
371 u8 manufacturer_id, device_id;
375 /* clear device data */
376 device->device = NULL;
377 device->manufacturer = NULL;
379 /* clear device parameters */
380 device->bus_width = 0;
381 device->address_cycles = 0;
382 device->page_size = 0;
383 device->erase_size = 0;
385 /* initialize controller (device parameters are zero, use controller default) */
386 if ((retval = device->controller->init(device) != ERROR_OK))
390 case ERROR_NAND_OPERATION_FAILED:
391 DEBUG("controller initialization failed");
392 return ERROR_NAND_OPERATION_FAILED;
393 case ERROR_NAND_OPERATION_NOT_SUPPORTED:
394 ERROR("BUG: controller reported that it doesn't support default parameters");
395 return ERROR_NAND_OPERATION_FAILED;
397 ERROR("BUG: unknown controller initialization failure");
398 return ERROR_NAND_OPERATION_FAILED;
402 device->controller->command(device, NAND_CMD_RESET);
403 device->controller->reset(device);
405 device->controller->command(device, NAND_CMD_READID);
406 device->controller->address(device, 0x0);
408 if (device->bus_width == 8)
410 device->controller->read_data(device, &manufacturer_id);
411 device->controller->read_data(device, &device_id);
416 device->controller->read_data(device, &data_buf);
417 manufacturer_id = data_buf & 0xff;
418 device->controller->read_data(device, &data_buf);
419 device_id = data_buf & 0xff;
422 for (i = 0; nand_flash_ids[i].name; i++)
424 if (nand_flash_ids[i].id == device_id)
426 device->device = &nand_flash_ids[i];
431 for (i = 0; nand_manuf_ids[i].name; i++)
433 if (nand_manuf_ids[i].id == manufacturer_id)
435 device->manufacturer = &nand_manuf_ids[i];
440 if (!device->manufacturer)
442 device->manufacturer = &nand_manuf_ids[0];
443 device->manufacturer->id = manufacturer_id;
448 ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
449 manufacturer_id, device_id);
450 return ERROR_NAND_OPERATION_FAILED;
453 DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
455 /* initialize device parameters */
458 if (device->device->options & NAND_BUSWIDTH_16)
459 device->bus_width = 16;
461 device->bus_width = 8;
464 if (device->device->page_size == 0)
466 /* TODO: support reading extended chip id to determine page size */
467 return ERROR_NAND_OPERATION_FAILED;
469 else if (device->device->page_size == 256)
471 ERROR("NAND flashes with 256 byte pagesize are not supported");
472 return ERROR_NAND_OPERATION_FAILED;
476 device->page_size = device->device->page_size;
479 /* number of address cycles */
480 if (device->page_size <= 512)
482 /* small page devices */
483 if (device->device->chip_size <= 32)
484 device->address_cycles = 3;
485 else if (device->device->chip_size <= 8*1024)
486 device->address_cycles = 4;
489 ERROR("BUG: small page NAND device with more than 8 GiB encountered");
490 device->address_cycles = 5;
495 /* large page devices */
496 if (device->device->chip_size <= 128)
497 device->address_cycles = 4;
498 else if (device->device->chip_size <= 32*1024)
499 device->address_cycles = 5;
502 ERROR("BUG: small page NAND device with more than 32 GiB encountered");
503 device->address_cycles = 6;
508 if (device->device->erase_size == 0)
510 /* TODO: support reading extended chip id to determine erase size */
514 device->erase_size = device->device->erase_size;
517 /* initialize controller, but leave parameters at the controllers default */
518 if ((retval = device->controller->init(device) != ERROR_OK))
522 case ERROR_NAND_OPERATION_FAILED:
523 DEBUG("controller initialization failed");
524 return ERROR_NAND_OPERATION_FAILED;
525 case ERROR_NAND_OPERATION_NOT_SUPPORTED:
526 ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
527 device->bus_width, device->address_cycles, device->page_size);
528 return ERROR_NAND_OPERATION_FAILED;
530 ERROR("BUG: unknown controller initialization failure");
531 return ERROR_NAND_OPERATION_FAILED;
535 device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024);
536 device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks);
538 for (i = 0; i < device->num_blocks; i++)
540 device->blocks[i].size = device->erase_size;
541 device->blocks[i].offset = i * device->erase_size;
542 device->blocks[i].is_erased = -1;
543 device->blocks[i].is_bad = -1;
549 int nand_erase(struct nand_device_s *device, int first_block, int last_block)
557 return ERROR_NAND_DEVICE_NOT_PROBED;
559 if ((first_block < 0) || (last_block > device->num_blocks))
560 return ERROR_INVALID_ARGUMENTS;
562 /* make sure we know if a block is bad before erasing it */
563 for (i = first_block; i <= last_block; i++)
565 if (device->blocks[i].is_bad == -1)
567 nand_build_bbt(device, i, last_block);
572 for (i = first_block; i <= last_block; i++)
574 /* Send erase setup command */
575 device->controller->command(device, NAND_CMD_ERASE1);
577 page = i * (device->erase_size / device->page_size);
579 /* Send page address */
580 if (device->page_size <= 512)
583 device->controller->address(device, page & 0xff);
584 device->controller->address(device, (page >> 8) & 0xff);
586 /* 3rd cycle only on devices with more than 32 MiB */
587 if (device->address_cycles >= 4)
588 device->controller->address(device, (page >> 16) & 0xff);
590 /* 4th cycle only on devices with more than 8 GiB */
591 if (device->address_cycles >= 5)
592 device->controller->address(device, (page >> 24) & 0xff);
597 device->controller->address(device, page & 0xff);
598 device->controller->address(device, (page >> 8) & 0xff);
600 /* 3rd cycle only on devices with more than 128 MiB */
601 if (device->address_cycles >= 5)
602 device->controller->address(device, (page >> 16) & 0xff);
605 /* Send erase confirm command */
606 device->controller->command(device, NAND_CMD_ERASE2);
608 if (!device->controller->nand_ready(device, 1000))
610 ERROR("timeout waiting for NAND flash block erase to complete");
611 return ERROR_NAND_OPERATION_TIMEOUT;
614 if ((retval = nand_read_status(device, &status)) != ERROR_OK)
616 ERROR("couldn't read status");
617 return ERROR_NAND_OPERATION_FAILED;
622 ERROR("erase operation didn't pass, status: 0x%2.2x", status);
623 return ERROR_NAND_OPERATION_FAILED;
630 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
635 return ERROR_NAND_DEVICE_NOT_PROBED;
637 if (address % device->page_size)
639 ERROR("reads need to be page aligned");
640 return ERROR_NAND_OPERATION_FAILED;
643 page = malloc(device->page_size);
645 while (data_size > 0 )
647 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
651 page_address = address / device->page_size;
653 nand_read_page(device, page_address, page, device->page_size, NULL, 0);
655 memcpy(data, page, thisrun_size);
657 address += thisrun_size;
658 data += thisrun_size;
659 data_size -= thisrun_size;
667 int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
672 return ERROR_NAND_DEVICE_NOT_PROBED;
674 if (address % device->page_size)
676 ERROR("writes need to be page aligned");
677 return ERROR_NAND_OPERATION_FAILED;
680 page = malloc(device->page_size);
682 while (data_size > 0 )
684 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
687 memset(page, 0xff, device->page_size);
688 memcpy(page, data, thisrun_size);
690 page_address = address / device->page_size;
692 nand_write_page(device, page_address, page, device->page_size, NULL, 0);
694 address += thisrun_size;
695 data += thisrun_size;
696 data_size -= thisrun_size;
704 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
707 return ERROR_NAND_DEVICE_NOT_PROBED;
710 return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
712 return device->controller->write_page(device, page, data, data_size, oob, oob_size);
715 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
718 return ERROR_NAND_DEVICE_NOT_PROBED;
721 return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
723 return device->controller->read_page(device, page, data, data_size, oob, oob_size);
726 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
731 return ERROR_NAND_DEVICE_NOT_PROBED;
733 if (device->page_size <= 512)
735 /* small page device */
737 device->controller->command(device, NAND_CMD_READ0);
739 device->controller->command(device, NAND_CMD_READOOB);
741 /* column (always 0, we start at the beginning of a page/OOB area) */
742 device->controller->address(device, 0x0);
745 device->controller->address(device, page & 0xff);
746 device->controller->address(device, (page >> 8) & 0xff);
748 /* 4th cycle only on devices with more than 32 MiB */
749 if (device->address_cycles >= 4)
750 device->controller->address(device, (page >> 16) & 0xff);
752 /* 5th cycle only on devices with more than 8 GiB */
753 if (device->address_cycles >= 5)
754 device->controller->address(device, (page >> 24) & 0xff);
758 /* large page device */
759 device->controller->command(device, NAND_CMD_READ0);
761 /* column (0 when we start at the beginning of a page,
762 * or 2048 for the beginning of OOB area)
764 device->controller->address(device, 0x0);
765 device->controller->address(device, 0x8);
768 device->controller->address(device, page & 0xff);
769 device->controller->address(device, (page >> 8) & 0xff);
771 /* 5th cycle only on devices with more than 128 MiB */
772 if (device->address_cycles >= 5)
773 device->controller->address(device, (page >> 16) & 0xff);
775 /* large page devices need a start command */
776 device->controller->command(device, NAND_CMD_READSTART);
779 if (!device->controller->nand_ready(device, 100))
780 return ERROR_NAND_OPERATION_TIMEOUT;
784 for (i = 0; i < data_size;)
786 if (device->device->options & NAND_BUSWIDTH_16)
788 device->controller->read_data(device, data);
794 device->controller->read_data(device, data);
803 for (i = 0; i < oob_size;)
805 if (device->device->options & NAND_BUSWIDTH_16)
807 device->controller->read_data(device, oob);
813 device->controller->read_data(device, oob);
823 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
830 return ERROR_NAND_DEVICE_NOT_PROBED;
832 device->controller->command(device, NAND_CMD_SEQIN);
834 if (device->page_size <= 512)
836 /* column (always 0, we start at the beginning of a page/OOB area) */
837 device->controller->address(device, 0x0);
840 device->controller->address(device, page & 0xff);
841 device->controller->address(device, (page >> 8) & 0xff);
843 /* 4th cycle only on devices with more than 32 MiB */
844 if (device->address_cycles >= 4)
845 device->controller->address(device, (page >> 16) & 0xff);
847 /* 5th cycle only on devices with more than 8 GiB */
848 if (device->address_cycles >= 5)
849 device->controller->address(device, (page >> 24) & 0xff);
853 /* column (0 when we start at the beginning of a page,
854 * or 2048 for the beginning of OOB area)
856 device->controller->address(device, 0x0);
857 device->controller->address(device, 0x8);
860 device->controller->address(device, page & 0xff);
861 device->controller->address(device, (page >> 8) & 0xff);
863 /* 5th cycle only on devices with more than 128 MiB */
864 if (device->address_cycles >= 5)
865 device->controller->address(device, (page >> 16) & 0xff);
870 for (i = 0; i < data_size;)
872 if (device->device->options & NAND_BUSWIDTH_16)
874 u16 data_buf = le_to_h_u16(data);
875 device->controller->write_data(device, data_buf);
881 device->controller->write_data(device, *data);
890 for (i = 0; i < oob_size;)
892 if (device->device->options & NAND_BUSWIDTH_16)
894 u16 oob_buf = le_to_h_u16(data);
895 device->controller->write_data(device, oob_buf);
901 device->controller->write_data(device, *oob);
908 device->controller->command(device, NAND_CMD_PAGEPROG);
910 if (!device->controller->nand_ready(device, 100))
911 return ERROR_NAND_OPERATION_TIMEOUT;
913 if ((retval = nand_read_status(device, &status)) != ERROR_OK)
915 ERROR("couldn't read status");
916 return ERROR_NAND_OPERATION_FAILED;
919 if (status & NAND_STATUS_FAIL)
921 ERROR("write operation didn't pass, status: 0x%2.2x", status);
922 return ERROR_NAND_OPERATION_FAILED;
928 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
935 command_print(cmd_ctx, "no NAND flash devices configured");
939 for (p = nand_devices; p; p = p->next)
942 command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
943 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
945 command_print(cmd_ctx, "#%i: not probed");
951 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
959 if ((argc < 1) || (argc > 3))
961 command_print(cmd_ctx, "usage: nand info <num> [<first> <last>]");
967 first = last = strtoul(args[1], NULL, 0);
971 first = strtoul(args[1], NULL, 0);
972 last = strtoul(args[2], NULL, 0);
975 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
980 if (first >= p->num_blocks)
981 first = p->num_blocks - 1;
983 if (last >= p->num_blocks)
984 last = p->num_blocks - 1;
986 command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
987 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
989 for (j = first; j <= last; j++)
991 char *erase_state, *bad_state;
993 if (p->blocks[j].is_erased == 0)
994 erase_state = "not erased";
995 else if (p->blocks[j].is_erased == 1)
996 erase_state = "erased";
998 erase_state = "erase state unknown";
1000 if (p->blocks[j].is_bad == 0)
1002 else if (p->blocks[j].is_bad == 1)
1003 bad_state = " (marked bad)";
1005 bad_state = " (block condition unknown)";
1007 command_print(cmd_ctx, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1008 j, p->blocks[j].offset, p->blocks[j].size / 1024,
1009 erase_state, bad_state);
1014 command_print(cmd_ctx, "#%i: not probed");
1021 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1028 command_print(cmd_ctx, "usage: nand probe <num>");
1032 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1035 if ((retval = nand_probe(p)) == ERROR_OK)
1037 command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name);
1039 else if (retval == ERROR_NAND_OPERATION_FAILED)
1041 command_print(cmd_ctx, "probing failed for NAND flash device");
1045 command_print(cmd_ctx, "unknown error when probing NAND flash device");
1050 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1056 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1063 command_print(cmd_ctx, "usage: nand erase <num> <first> <last>");
1067 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1070 int first = strtoul(args[1], NULL, 0);
1071 int last = strtoul(args[2], NULL, 0);
1073 if ((retval = nand_erase(p, first, last)) == ERROR_OK)
1075 command_print(cmd_ctx, "successfully erased blocks %i to %i on NAND flash device '%s'", first, last, p->device->name);
1077 else if (retval == ERROR_NAND_OPERATION_FAILED)
1079 command_print(cmd_ctx, "erase failed");
1083 command_print(cmd_ctx, "unknown error when erasing NAND flash device");
1088 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1094 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1101 if ((argc < 1) || (argc > 3) || (argc == 2))
1103 command_print(cmd_ctx, "usage: nand check_bad_blocks <num> [<first> <last>]");
1109 first = strtoul(args[1], NULL, 0);
1110 last = strtoul(args[2], NULL, 0);
1113 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1116 if ((retval = nand_build_bbt(p, first, last)) == ERROR_OK)
1118 command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p->device->name);
1120 else if (retval == ERROR_NAND_OPERATION_FAILED)
1122 command_print(cmd_ctx, "error when checking for bad blocks on NAND flash device");
1126 command_print(cmd_ctx, "unknown error when checking for bad blocks on NAND flash device");
1131 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1137 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1143 command_print(cmd_ctx, "usage: nand copy <num> <offset> <length> <ram-address>");
1147 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1154 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1160 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1165 enum oob_formats oob_format = NAND_OOB_NONE;
1168 int image_type_identified = 0;
1170 duration_t duration;
1171 char *duration_text;
1177 command_print(cmd_ctx, "usage: nand write <num> <file> <offset> [options]");
1181 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1189 duration_start_measure(&duration);
1190 strtoul(args[2], NULL, 0);
1195 for (i = 3; i < argc; i++)
1197 if (!strcmp(args[i], "oob_raw"))
1198 oob_format |= NAND_OOB_RAW;
1199 else if (!strcmp(args[i], "oob_only"))
1200 oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1203 if (identify_image_type(&image.type, args[i]) == ERROR_OK)
1205 image_type_identified = 1;
1209 command_print(cmd_ctx, "unknown option: %s", args[i]);
1215 /* if no image type option was encountered, set the default */
1216 if (!image_type_identified)
1219 identify_image_type(&image.type, NULL);
1220 image_type_identified = 1;
1223 image.base_address_set = 1;
1224 image.base_address = strtoul(args[2], NULL, 0);
1225 image.start_address_set = 0;
1227 if (image_open(&image, args[1], FILEIO_READ) != ERROR_OK)
1229 command_print(cmd_ctx, "flash write error: %s", image.error_str);
1233 /* the offset might have been overwritten by the image base address */
1234 offset = image.base_address;
1236 buf_cnt = binary_size = image.size;
1238 if (!(oob_format & NAND_OOB_ONLY))
1240 page_size = p->page_size;
1241 page = malloc(p->page_size);
1244 if (oob_format & NAND_OOB_RAW)
1246 if (p->page_size == 512)
1248 else if (p->page_size == 2048)
1250 oob = malloc(oob_size);
1253 if (offset % p->page_size)
1255 command_print(cmd_ctx, "only page size aligned offsets and sizes are supported");
1265 image_read(&image, page_size, page, &size_read);
1266 buf_cnt -= size_read;
1267 if (size_read < page_size)
1269 memset(page + size_read, 0xff, page_size - size_read);
1275 image_read(&image, oob_size, oob, &size_read);
1276 buf_cnt -= size_read;
1277 if (size_read < oob_size)
1279 memset(oob + size_read, 0xff, oob_size - size_read);
1283 if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK)
1285 command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1286 args[1], args[0], offset);
1289 offset += page_size;
1292 duration_stop_measure(&duration, &duration_text);
1293 command_print(cmd_ctx, "wrote file %s to NAND flash %s at offset 0x%8.8x in %s",
1294 args[1], args[0], image.base_address, duration_text);
1295 free(duration_text);
1299 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1305 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1311 command_print(cmd_ctx, "usage: nand dump <num> <filename> <address> <size> [options]");
1315 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1321 duration_t duration;
1322 char *duration_text;
1329 u32 address = strtoul(args[2], NULL, 0);
1330 u32 size = strtoul(args[3], NULL, 0);
1332 enum oob_formats oob_format = NAND_OOB_NONE;
1337 for (i = 4; i < argc; i++)
1339 if (!strcmp(args[i], "oob_raw"))
1340 oob_format |= NAND_OOB_RAW;
1341 else if (!strcmp(args[i], "oob_only"))
1342 oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1344 command_print(cmd_ctx, "unknown option: '%s'", args[i]);
1348 if ((address % p->page_size) || (size % p->page_size))
1350 command_print(cmd_ctx, "only page size aligned addresses and sizes are supported");
1354 if (!(oob_format & NAND_OOB_ONLY))
1356 page_size = p->page_size;
1357 page = malloc(p->page_size);
1360 if (oob_format & NAND_OOB_RAW)
1362 if (p->page_size == 512)
1364 else if (p->page_size == 2048)
1366 oob = malloc(oob_size);
1369 if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK)
1371 command_print(cmd_ctx, "dump_image error: %s", fileio.error_str);
1375 duration_start_measure(&duration);
1380 if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK)
1382 command_print(cmd_ctx, "reading NAND flash page failed");
1388 fileio_write(&fileio, page_size, page, &size_written);
1389 bytes_done += page_size;
1394 fileio_write(&fileio, oob_size, oob, &size_written);
1395 bytes_done += oob_size;
1398 size -= p->page_size;
1399 address += p->page_size;
1408 fileio_close(&fileio);
1410 duration_stop_measure(&duration, &duration_text);
1411 command_print(cmd_ctx, "dumped %lli byte in %s", fileio.size, duration_text);
1412 free(duration_text);
1416 command_print(cmd_ctx, "#%i: not probed");
1421 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1427 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1431 if ((argc < 1) || (argc > 2))
1433 command_print(cmd_ctx, "usage: nand raw_access <num> ['enable'|'disable']");
1437 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1444 if (strcmp("enable", args[1]) == 0)
1448 else if (strcmp("disable", args[1]) == 0)
1454 command_print(cmd_ctx, "usage: nand raw_access ['enable'|disable']");
1458 command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled");
1462 command_print(cmd_ctx, "#%i: not probed");
1467 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);