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   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
   6  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program; if not, write to the                         *
  20  *   Free Software Foundation, Inc.,                                       *
  21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  22  ***************************************************************************/
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "nand.h"
  28 #include "common.h"
  29 #include <helper/time_support.h>
  30 #include <helper/fileio.h>
  31
  32 static int nand_read_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
  33 //static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size);
  34
  35 static int nand_write_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
  36
  37 /* NAND flash controller
  38  */
  39 extern struct nand_flash_controller nonce_nand_controller;
  40 extern struct nand_flash_controller davinci_nand_controller;
  41 extern struct nand_flash_controller lpc3180_nand_controller;
  42 extern struct nand_flash_controller orion_nand_controller;
  43 extern struct nand_flash_controller s3c2410_nand_controller;
  44 extern struct nand_flash_controller s3c2412_nand_controller;
  45 extern struct nand_flash_controller s3c2440_nand_controller;
  46 extern struct nand_flash_controller s3c2443_nand_controller;
  47 extern struct nand_flash_controller imx31_nand_flash_controller;
  48
  49 /* extern struct nand_flash_controller boundary_scan_nand_controller; */
  50
  51 static struct nand_flash_controller *nand_flash_controllers[] =
  52 {
  53         &nonce_nand_controller,
  54         &davinci_nand_controller,
  55         &lpc3180_nand_controller,
  56         &orion_nand_controller,
  57         &s3c2410_nand_controller,
  58         &s3c2412_nand_controller,
  59         &s3c2440_nand_controller,
  60         &s3c2443_nand_controller,
  61         &imx31_nand_flash_controller,
  62 /*      &boundary_scan_nand_controller, */
  63         NULL
  64 };
  65
  66 /* configured NAND devices and NAND Flash command handler */
  67 static struct nand_device *nand_devices = NULL;
  68
  69 /*      Chip ID list
  70  *
  71  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  72  *      options
  73  *
  74  *      Pagesize; 0, 256, 512
  75  *      0       get this information from the extended chip ID
  76  *      256     256 Byte page size
  77  *      512     512 Byte page size
  78  */
  79 static struct nand_info nand_flash_ids[] =
  80 {
  81         /* start "museum" IDs */
  82         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
  83         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
  84         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
  85         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
  86         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
  87         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
  88         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
  89         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
  90         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
  91         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
  92
  93         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
  94         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
  95         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
  96         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
  97         /* end "museum" IDs */
  98
  99         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
 100         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
 101         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 102         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 103
 104         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
 105         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
 106         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 107         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 108
 109         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
 110         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
 111         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 112         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 113
 114         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
 115         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
 116         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
 117         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 118         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 119         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 120         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 121
 122         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
 123
 124         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
 125         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
 126         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
 127         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
 128
 129         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
 130         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
 131         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
 132         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
 133
 134         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
 135         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
 136         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
 137         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
 138
 139         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
 140         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
 141         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
 142         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
 143
 144         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
 145         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
 146         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
 147         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
 148
 149         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
 150         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
 151         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
 152         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
 153
 154         {NULL, 0, 0, 0, 0, 0 }
 155 };
 156
 157 /* Manufacturer ID list
 158  */
 159 static struct nand_manufacturer nand_manuf_ids[] =
 160 {
 161         {0x0, "unknown"},
 162         {NAND_MFR_TOSHIBA, "Toshiba"},
 163         {NAND_MFR_SAMSUNG, "Samsung"},
 164         {NAND_MFR_FUJITSU, "Fujitsu"},
 165         {NAND_MFR_NATIONAL, "National"},
 166         {NAND_MFR_RENESAS, "Renesas"},
 167         {NAND_MFR_STMICRO, "ST Micro"},
 168         {NAND_MFR_HYNIX, "Hynix"},
 169         {NAND_MFR_MICRON, "Micron"},
 170         {0x0, NULL},
 171 };
 172
 173 /*
 174  * Define default oob placement schemes for large and small page devices
 175  */
 176
 177 #if 0
 178 static struct nand_ecclayout nand_oob_8 = {
 179         .eccbytes = 3,
 180         .eccpos = {0, 1, 2},
 181         .oobfree = {
 182                 {.offset = 3,
 183                  .length = 2},
 184                 {.offset = 6,
 185                  .length = 2}}
 186 };
 187 #endif
 188
 189 static struct nand_ecclayout nand_oob_16 = {
 190         .eccbytes = 6,
 191         .eccpos = {0, 1, 2, 3, 6, 7},
 192         .oobfree = {
 193                 {.offset = 8,
 194                  . length = 8}}
 195 };
 196
 197 static struct nand_ecclayout nand_oob_64 = {
 198         .eccbytes = 24,
 199         .eccpos = {
 200                    40, 41, 42, 43, 44, 45, 46, 47,
 201                    48, 49, 50, 51, 52, 53, 54, 55,
 202                    56, 57, 58, 59, 60, 61, 62, 63},
 203         .oobfree = {
 204                 {.offset = 2,
 205                  .length = 38}}
 206 };
 207
 208 COMMAND_HANDLER(handle_nand_list_drivers)
 209 {
 210         command_print(CMD_CTX, "Available NAND flash controller drivers:");
 211         for (unsigned i = 0; nand_flash_controllers[i]; i++)
 212                 command_print(CMD_CTX, "  %s", nand_flash_controllers[i]->name);
 213         return ERROR_OK;
 214 }
 215
 216 static COMMAND_HELPER(create_nand_device, const char *bank_name,
 217                 struct nand_flash_controller *controller)
 218 {
 219         if (NULL != controller->commands)
 220         {
 221                 int retval = register_commands(CMD_CTX, NULL,
 222                                 controller->commands);
 223                 if (ERROR_OK != retval)
 224                         return retval;
 225         }
 226         struct nand_device *c = malloc(sizeof(struct nand_device));
 227
 228         c->name = strdup(bank_name);
 229         c->controller = controller;
 230         c->controller_priv = NULL;
 231         c->manufacturer = NULL;
 232         c->device = NULL;
 233         c->bus_width = 0;
 234         c->address_cycles = 0;
 235         c->page_size = 0;
 236         c->use_raw = 0;
 237         c->next = NULL;
 238
 239         int retval = CALL_COMMAND_HANDLER(controller->nand_device_command, c);
 240         if (ERROR_OK != retval)
 241         {
 242                 LOG_ERROR("'%s' driver rejected nand flash", controller->name);
 243                 free(c);
 244                 return ERROR_OK;
 245         }
 246
 247         if (nand_devices) {
 248                 struct nand_device *p = nand_devices;
 249                 while (p && p->next) p = p->next;
 250                 p->next = c;
 251         } else
 252                 nand_devices = c;
 253
 254         return ERROR_OK;
 255 }
 256
 257 COMMAND_HANDLER(handle_nand_device_command)
 258 {
 259         if (CMD_ARGC < 1)
 260         {
 261                 LOG_ERROR("incomplete nand device configuration");
 262                 return ERROR_FLASH_BANK_INVALID;
 263         }
 264
 265         // save name and increment (for compatibility) with drivers
 266         const char *bank_name = *CMD_ARGV++;
 267         CMD_ARGC--;
 268
 269         const char *driver_name = CMD_ARGV[0];
 270         for (unsigned i = 0; nand_flash_controllers[i]; i++)
 271         {
 272                 struct nand_flash_controller *controller = nand_flash_controllers[i];
 273                 if (strcmp(driver_name, controller->name) != 0)
 274                         continue;
 275
 276                 return CALL_COMMAND_HANDLER(create_nand_device,
 277                                 bank_name, controller);
 278         }
 279
 280         LOG_ERROR("No valid NAND flash driver found (%s)", driver_name);
 281         return CALL_COMMAND_HANDLER(handle_nand_list_drivers);
 282 }
 283
 284
 285 COMMAND_HANDLER(handle_nand_init_command);
 286
 287 static const struct command_registration nand_config_command_handlers[] = {
 288         {
 289                 .name = "device",
 290                 .handler = &handle_nand_device_command,
 291                 .mode = COMMAND_CONFIG,
 292                 .help = "defines a new NAND bank",
 293         },
 294         {
 295                 .name = "drivers",
 296                 .handler = &handle_nand_list_drivers,
 297                 .mode = COMMAND_ANY,
 298                 .help = "lists available NAND drivers",
 299         },
 300         {
 301                 .name = "init",
 302                 .mode = COMMAND_CONFIG,
 303                 .handler = &handle_nand_init_command,
 304                 .help = "initialize NAND devices",
 305         },
 306         COMMAND_REGISTRATION_DONE
 307 };
 308 static const struct command_registration nand_command_handlers[] = {
 309         {
 310                 .name = "nand",
 311                 .mode = COMMAND_ANY,
 312                 .help = "NAND flash command group",
 313                 .chain = nand_config_command_handlers,
 314         },
 315         COMMAND_REGISTRATION_DONE
 316 };
 317
 318 int nand_register_commands(struct command_context *cmd_ctx)
 319 {
 320         return register_commands(cmd_ctx, NULL, nand_command_handlers);
 321 }
 322
 323 struct nand_device *get_nand_device_by_name(const char *name)
 324 {
 325         unsigned requested = get_flash_name_index(name);
 326         unsigned found = 0;
 327
 328         struct nand_device *nand;
 329         for (nand = nand_devices; NULL != nand; nand = nand->next)
 330         {
 331                 if (strcmp(nand->name, name) == 0)
 332                         return nand;
 333                 if (!flash_driver_name_matches(nand->controller->name, name))
 334                         continue;
 335                 if (++found < requested)
 336                         continue;
 337                 return nand;
 338         }
 339         return NULL;
 340 }
 341
 342 struct nand_device *get_nand_device_by_num(int num)
 343 {
 344         struct nand_device *p;
 345         int i = 0;
 346
 347         for (p = nand_devices; p; p = p->next)
 348         {
 349                 if (i++ == num)
 350                 {
 351                         return p;
 352                 }
 353         }
 354
 355         return NULL;
 356 }
 357
 358 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 359                 struct nand_device **nand)
 360 {
 361         const char *str = CMD_ARGV[name_index];
 362         *nand = get_nand_device_by_name(str);
 363         if (*nand)
 364                 return ERROR_OK;
 365
 366         unsigned num;
 367         COMMAND_PARSE_NUMBER(uint, str, num);
 368         *nand = get_nand_device_by_num(num);
 369         if (!*nand) {
 370                 command_print(CMD_CTX, "NAND flash device '%s' not found", str);
 371                 return ERROR_INVALID_ARGUMENTS;
 372         }
 373         return ERROR_OK;
 374 }
 375
 376 static int nand_build_bbt(struct nand_device *nand, int first, int last)
 377 {
 378         uint32_t page = 0x0;
 379         int i;
 380         uint8_t oob[6];
 381
 382         if ((first < 0) || (first >= nand->num_blocks))
 383                 first = 0;
 384
 385         if ((last >= nand->num_blocks) || (last == -1))
 386                 last = nand->num_blocks - 1;
 387
 388         for (i = first; i < last; i++)
 389         {
 390                 nand_read_page(nand, page, NULL, 0, oob, 6);
 391
 392                 if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 393                         || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
 394                                 ((nand->page_size == 2048) && (oob[0] != 0xff))))
 395                 {
 396                         LOG_WARNING("bad block: %i", i);
 397                         nand->blocks[i].is_bad = 1;
 398                 }
 399                 else
 400                 {
 401                         nand->blocks[i].is_bad = 0;
 402                 }
 403
 404                 page += (nand->erase_size / nand->page_size);
 405         }
 406
 407         return ERROR_OK;
 408 }
 409
 410 int nand_read_status(struct nand_device *nand, uint8_t *status)
 411 {
 412         if (!nand->device)
 413                 return ERROR_NAND_DEVICE_NOT_PROBED;
 414
 415         /* Send read status command */
 416         nand->controller->command(nand, NAND_CMD_STATUS);
 417
 418         alive_sleep(1);
 419
 420         /* read status */
 421         if (nand->device->options & NAND_BUSWIDTH_16)
 422         {
 423                 uint16_t data;
 424                 nand->controller->read_data(nand, &data);
 425                 *status = data & 0xff;
 426         }
 427         else
 428         {
 429                 nand->controller->read_data(nand, status);
 430         }
 431
 432         return ERROR_OK;
 433 }
 434
 435 static int nand_poll_ready(struct nand_device *nand, int timeout)
 436 {
 437         uint8_t status;
 438
 439         nand->controller->command(nand, NAND_CMD_STATUS);
 440         do {
 441                 if (nand->device->options & NAND_BUSWIDTH_16) {
 442                         uint16_t data;
 443                         nand->controller->read_data(nand, &data);
 444                         status = data & 0xff;
 445                 } else {
 446                         nand->controller->read_data(nand, &status);
 447                 }
 448                 if (status & NAND_STATUS_READY)
 449                         break;
 450                 alive_sleep(1);
 451         } while (timeout--);
 452
 453         return (status & NAND_STATUS_READY) != 0;
 454 }
 455
 456 int nand_probe(struct nand_device *nand)
 457 {
 458         uint8_t manufacturer_id, device_id;
 459         uint8_t id_buff[6];
 460         int retval;
 461         int i;
 462
 463         /* clear device data */
 464         nand->device = NULL;
 465         nand->manufacturer = NULL;
 466
 467         /* clear device parameters */
 468         nand->bus_width = 0;
 469         nand->address_cycles = 0;
 470         nand->page_size = 0;
 471         nand->erase_size = 0;
 472
 473         /* initialize controller (device parameters are zero, use controller default) */
 474         if ((retval = nand->controller->init(nand) != ERROR_OK))
 475         {
 476                 switch (retval)
 477                 {
 478                         case ERROR_NAND_OPERATION_FAILED:
 479                                 LOG_DEBUG("controller initialization failed");
 480                                 return ERROR_NAND_OPERATION_FAILED;
 481                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 482                                 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
 483                                 return ERROR_NAND_OPERATION_FAILED;
 484                         default:
 485                                 LOG_ERROR("BUG: unknown controller initialization failure");
 486                                 return ERROR_NAND_OPERATION_FAILED;
 487                 }
 488         }
 489
 490         nand->controller->command(nand, NAND_CMD_RESET);
 491         nand->controller->reset(nand);
 492
 493         nand->controller->command(nand, NAND_CMD_READID);
 494         nand->controller->address(nand, 0x0);
 495
 496         if (nand->bus_width == 8)
 497         {
 498                 nand->controller->read_data(nand, &manufacturer_id);
 499                 nand->controller->read_data(nand, &device_id);
 500         }
 501         else
 502         {
 503                 uint16_t data_buf;
 504                 nand->controller->read_data(nand, &data_buf);
 505                 manufacturer_id = data_buf & 0xff;
 506                 nand->controller->read_data(nand, &data_buf);
 507                 device_id = data_buf & 0xff;
 508         }
 509
 510         for (i = 0; nand_flash_ids[i].name; i++)
 511         {
 512                 if (nand_flash_ids[i].id == device_id)
 513                 {
 514                         nand->device = &nand_flash_ids[i];
 515                         break;
 516                 }
 517         }
 518
 519         for (i = 0; nand_manuf_ids[i].name; i++)
 520         {
 521                 if (nand_manuf_ids[i].id == manufacturer_id)
 522                 {
 523                         nand->manufacturer = &nand_manuf_ids[i];
 524                         break;
 525                 }
 526         }
 527
 528         if (!nand->manufacturer)
 529         {
 530                 nand->manufacturer = &nand_manuf_ids[0];
 531                 nand->manufacturer->id = manufacturer_id;
 532         }
 533
 534         if (!nand->device)
 535         {
 536                 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 537                         manufacturer_id, device_id);
 538                 return ERROR_NAND_OPERATION_FAILED;
 539         }
 540
 541         LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
 542
 543         /* initialize device parameters */
 544
 545         /* bus width */
 546         if (nand->device->options & NAND_BUSWIDTH_16)
 547                 nand->bus_width = 16;
 548         else
 549                 nand->bus_width = 8;
 550
 551         /* Do we need extended device probe information? */
 552         if (nand->device->page_size == 0 ||
 553             nand->device->erase_size == 0)
 554         {
 555                 if (nand->bus_width == 8)
 556                 {
 557                         nand->controller->read_data(nand, id_buff + 3);
 558                         nand->controller->read_data(nand, id_buff + 4);
 559                         nand->controller->read_data(nand, id_buff + 5);
 560                 }
 561                 else
 562                 {
 563                         uint16_t data_buf;
 564
 565                         nand->controller->read_data(nand, &data_buf);
 566                         id_buff[3] = data_buf;
 567
 568                         nand->controller->read_data(nand, &data_buf);
 569                         id_buff[4] = data_buf;
 570
 571                         nand->controller->read_data(nand, &data_buf);
 572                         id_buff[5] = data_buf >> 8;
 573                 }
 574         }
 575
 576         /* page size */
 577         if (nand->device->page_size == 0)
 578         {
 579                 nand->page_size = 1 << (10 + (id_buff[4] & 3));
 580         }
 581         else if (nand->device->page_size == 256)
 582         {
 583                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
 584                 return ERROR_NAND_OPERATION_FAILED;
 585         }
 586         else
 587         {
 588                 nand->page_size = nand->device->page_size;
 589         }
 590
 591         /* number of address cycles */
 592         if (nand->page_size <= 512)
 593         {
 594                 /* small page devices */
 595                 if (nand->device->chip_size <= 32)
 596                         nand->address_cycles = 3;
 597                 else if (nand->device->chip_size <= 8*1024)
 598                         nand->address_cycles = 4;
 599                 else
 600                 {
 601                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 602                         nand->address_cycles = 5;
 603                 }
 604         }
 605         else
 606         {
 607                 /* large page devices */
 608                 if (nand->device->chip_size <= 128)
 609                         nand->address_cycles = 4;
 610                 else if (nand->device->chip_size <= 32*1024)
 611                         nand->address_cycles = 5;
 612                 else
 613                 {
 614                         LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 615                         nand->address_cycles = 6;
 616                 }
 617         }
 618
 619         /* erase size */
 620         if (nand->device->erase_size == 0)
 621         {
 622                 switch ((id_buff[4] >> 4) & 3) {
 623                 case 0:
 624                         nand->erase_size = 64 << 10;
 625                         break;
 626                 case 1:
 627                         nand->erase_size = 128 << 10;
 628                         break;
 629                 case 2:
 630                         nand->erase_size = 256 << 10;
 631                         break;
 632                 case 3:
 633                         nand->erase_size =512 << 10;
 634                         break;
 635                 }
 636         }
 637         else
 638         {
 639                 nand->erase_size = nand->device->erase_size;
 640         }
 641
 642         /* initialize controller, but leave parameters at the controllers default */
 643         if ((retval = nand->controller->init(nand) != ERROR_OK))
 644         {
 645                 switch (retval)
 646                 {
 647                         case ERROR_NAND_OPERATION_FAILED:
 648                                 LOG_DEBUG("controller initialization failed");
 649                                 return ERROR_NAND_OPERATION_FAILED;
 650                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 651                                 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 652                                         nand->bus_width, nand->address_cycles, nand->page_size);
 653                                 return ERROR_NAND_OPERATION_FAILED;
 654                         default:
 655                                 LOG_ERROR("BUG: unknown controller initialization failure");
 656                                 return ERROR_NAND_OPERATION_FAILED;
 657                 }
 658         }
 659
 660         nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
 661         nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
 662
 663         for (i = 0; i < nand->num_blocks; i++)
 664         {
 665                 nand->blocks[i].size = nand->erase_size;
 666                 nand->blocks[i].offset = i * nand->erase_size;
 667                 nand->blocks[i].is_erased = -1;
 668                 nand->blocks[i].is_bad = -1;
 669         }
 670
 671         return ERROR_OK;
 672 }
 673
 674 static int nand_erase(struct nand_device *nand, int first_block, int last_block)
 675 {
 676         int i;
 677         uint32_t page;
 678         uint8_t status;
 679         int retval;
 680
 681         if (!nand->device)
 682                 return ERROR_NAND_DEVICE_NOT_PROBED;
 683
 684         if ((first_block < 0) || (last_block > nand->num_blocks))
 685                 return ERROR_INVALID_ARGUMENTS;
 686
 687         /* make sure we know if a block is bad before erasing it */
 688         for (i = first_block; i <= last_block; i++)
 689         {
 690                 if (nand->blocks[i].is_bad == -1)
 691                 {
 692                         nand_build_bbt(nand, i, last_block);
 693                         break;
 694                 }
 695         }
 696
 697         for (i = first_block; i <= last_block; i++)
 698         {
 699                 /* Send erase setup command */
 700                 nand->controller->command(nand, NAND_CMD_ERASE1);
 701
 702                 page = i * (nand->erase_size / nand->page_size);
 703
 704                 /* Send page address */
 705                 if (nand->page_size <= 512)
 706                 {
 707                         /* row */
 708                         nand->controller->address(nand, page & 0xff);
 709                         nand->controller->address(nand, (page >> 8) & 0xff);
 710
 711                         /* 3rd cycle only on devices with more than 32 MiB */
 712                         if (nand->address_cycles >= 4)
 713                                 nand->controller->address(nand, (page >> 16) & 0xff);
 714
 715                         /* 4th cycle only on devices with more than 8 GiB */
 716                         if (nand->address_cycles >= 5)
 717                                 nand->controller->address(nand, (page >> 24) & 0xff);
 718                 }
 719                 else
 720                 {
 721                         /* row */
 722                         nand->controller->address(nand, page & 0xff);
 723                         nand->controller->address(nand, (page >> 8) & 0xff);
 724
 725                         /* 3rd cycle only on devices with more than 128 MiB */
 726                         if (nand->address_cycles >= 5)
 727                                 nand->controller->address(nand, (page >> 16) & 0xff);
 728                 }
 729
 730                 /* Send erase confirm command */
 731                 nand->controller->command(nand, NAND_CMD_ERASE2);
 732
 733                 retval = nand->controller->nand_ready ?
 734                                 nand->controller->nand_ready(nand, 1000) :
 735                                 nand_poll_ready(nand, 1000);
 736                 if (!retval) {
 737                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 738                         return ERROR_NAND_OPERATION_TIMEOUT;
 739                 }
 740
 741                 if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
 742                 {
 743                         LOG_ERROR("couldn't read status");
 744                         return ERROR_NAND_OPERATION_FAILED;
 745                 }
 746
 747                 if (status & 0x1)
 748                 {
 749                         LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
 750                                         (nand->blocks[i].is_bad == 1)
 751                                                 ? "bad " : "",
 752                                         i, status);
 753                         /* continue; other blocks might still be erasable */
 754                 }
 755
 756                 nand->blocks[i].is_erased = 1;
 757         }
 758
 759         return ERROR_OK;
 760 }
 761
 762 #if 0
 763 static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
 764 {
 765         uint8_t *page;
 766
 767         if (!nand->device)
 768                 return ERROR_NAND_DEVICE_NOT_PROBED;
 769
 770         if (address % nand->page_size)
 771         {
 772                 LOG_ERROR("reads need to be page aligned");
 773                 return ERROR_NAND_OPERATION_FAILED;
 774         }
 775
 776         page = malloc(nand->page_size);
 777
 778         while (data_size > 0)
 779         {
 780                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 781                 uint32_t page_address;
 782
 783
 784                 page_address = address / nand->page_size;
 785
 786                 nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
 787
 788                 memcpy(data, page, thisrun_size);
 789
 790                 address += thisrun_size;
 791                 data += thisrun_size;
 792                 data_size -= thisrun_size;
 793         }
 794
 795         free(page);
 796
 797         return ERROR_OK;
 798 }
 799
 800 static int nand_write_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
 801 {
 802         uint8_t *page;
 803
 804         if (!nand->device)
 805                 return ERROR_NAND_DEVICE_NOT_PROBED;
 806
 807         if (address % nand->page_size)
 808         {
 809                 LOG_ERROR("writes need to be page aligned");
 810                 return ERROR_NAND_OPERATION_FAILED;
 811         }
 812
 813         page = malloc(nand->page_size);
 814
 815         while (data_size > 0)
 816         {
 817                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 818                 uint32_t page_address;
 819
 820                 memset(page, 0xff, nand->page_size);
 821                 memcpy(page, data, thisrun_size);
 822
 823                 page_address = address / nand->page_size;
 824
 825                 nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
 826
 827                 address += thisrun_size;
 828                 data += thisrun_size;
 829                 data_size -= thisrun_size;
 830         }
 831
 832         free(page);
 833
 834         return ERROR_OK;
 835 }
 836 #endif
 837
 838 int nand_write_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 839 {
 840         uint32_t block;
 841
 842         if (!nand->device)
 843                 return ERROR_NAND_DEVICE_NOT_PROBED;
 844
 845         block = page / (nand->erase_size / nand->page_size);
 846         if (nand->blocks[block].is_erased == 1)
 847                 nand->blocks[block].is_erased = 0;
 848
 849         if (nand->use_raw || nand->controller->write_page == NULL)
 850                 return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
 851         else
 852                 return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
 853 }
 854
 855 static int nand_read_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 856 {
 857         if (!nand->device)
 858                 return ERROR_NAND_DEVICE_NOT_PROBED;
 859
 860         if (nand->use_raw || nand->controller->read_page == NULL)
 861                 return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
 862         else
 863                 return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
 864 }
 865
 866 int nand_page_command(struct nand_device *nand, uint32_t page,
 867                 uint8_t cmd, bool oob_only)
 868 {
 869         if (!nand->device)
 870                 return ERROR_NAND_DEVICE_NOT_PROBED;
 871
 872         if (oob_only && NAND_CMD_READ0 == cmd && nand->page_size <= 512)
 873                 cmd = NAND_CMD_READOOB;
 874
 875         nand->controller->command(nand, cmd);
 876
 877         if (nand->page_size <= 512) {
 878                 /* small page device */
 879
 880                 /* column (always 0, we start at the beginning of a page/OOB area) */
 881                 nand->controller->address(nand, 0x0);
 882
 883                 /* row */
 884                 nand->controller->address(nand, page & 0xff);
 885                 nand->controller->address(nand, (page >> 8) & 0xff);
 886
 887                 /* 4th cycle only on devices with more than 32 MiB */
 888                 if (nand->address_cycles >= 4)
 889                         nand->controller->address(nand, (page >> 16) & 0xff);
 890
 891                 /* 5th cycle only on devices with more than 8 GiB */
 892                 if (nand->address_cycles >= 5)
 893                         nand->controller->address(nand, (page >> 24) & 0xff);
 894         } else {
 895                 /* large page device */
 896
 897                 /* column (0 when we start at the beginning of a page,
 898                  * or 2048 for the beginning of OOB area)
 899                  */
 900                 nand->controller->address(nand, 0x0);
 901                 if (oob_only)
 902                         nand->controller->address(nand, 0x8);
 903                 else
 904                         nand->controller->address(nand, 0x0);
 905
 906                 /* row */
 907                 nand->controller->address(nand, page & 0xff);
 908                 nand->controller->address(nand, (page >> 8) & 0xff);
 909
 910                 /* 5th cycle only on devices with more than 128 MiB */
 911                 if (nand->address_cycles >= 5)
 912                         nand->controller->address(nand, (page >> 16) & 0xff);
 913
 914                 /* large page devices need a start command if reading */
 915                 if (NAND_CMD_READ0 == cmd)
 916                         nand->controller->command(nand, NAND_CMD_READSTART);
 917         }
 918
 919         if (nand->controller->nand_ready) {
 920                 if (!nand->controller->nand_ready(nand, 100))
 921                         return ERROR_NAND_OPERATION_TIMEOUT;
 922         } else {
 923                 alive_sleep(1);
 924         }
 925
 926         return ERROR_OK;
 927 }
 928
 929 int nand_read_page_raw(struct nand_device *nand, uint32_t page,
 930                 uint8_t *data, uint32_t data_size,
 931                 uint8_t *oob, uint32_t oob_size)
 932 {
 933         uint32_t i;
 934         int retval;
 935
 936         retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
 937         if (ERROR_OK != retval)
 938                 return retval;
 939
 940         if (data)
 941         {
 942                 if (nand->controller->read_block_data != NULL)
 943                         (nand->controller->read_block_data)(nand, data, data_size);
 944                 else
 945                 {
 946                         for (i = 0; i < data_size;)
 947                         {
 948                                 if (nand->device->options & NAND_BUSWIDTH_16)
 949                                 {
 950                                         nand->controller->read_data(nand, data);
 951                                         data += 2;
 952                                         i += 2;
 953                                 }
 954                                 else
 955                                 {
 956                                         nand->controller->read_data(nand, data);
 957                                         data += 1;
 958                                         i += 1;
 959                                 }
 960                         }
 961                 }
 962         }
 963
 964         if (oob)
 965         {
 966                 if (nand->controller->read_block_data != NULL)
 967                         (nand->controller->read_block_data)(nand, oob, oob_size);
 968                 else
 969                 {
 970                         for (i = 0; i < oob_size;)
 971                         {
 972                                 if (nand->device->options & NAND_BUSWIDTH_16)
 973                                 {
 974                                         nand->controller->read_data(nand, oob);
 975                                         oob += 2;
 976                                         i += 2;
 977                                 }
 978                                 else
 979                                 {
 980                                         nand->controller->read_data(nand, oob);
 981                                         oob += 1;
 982                                         i += 1;
 983                                 }
 984                         }
 985                 }
 986         }
 987
 988         return ERROR_OK;
 989 }
 990
 991 int nand_write_page_raw(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 992 {
 993         uint32_t i;
 994         int retval;
 995         uint8_t status;
 996
 997         retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
 998         if (ERROR_OK != retval)
 999                 return retval;
1000
1001         if (data)
1002         {
1003                 if (nand->controller->write_block_data != NULL)
1004                         (nand->controller->write_block_data)(nand, data, data_size);
1005                 else
1006                 {
1007                         for (i = 0; i < data_size;)
1008                         {
1009                                 if (nand->device->options & NAND_BUSWIDTH_16)
1010                                 {
1011                                         uint16_t data_buf = le_to_h_u16(data);
1012                                         nand->controller->write_data(nand, data_buf);
1013                                         data += 2;
1014                                         i += 2;
1015                                 }
1016                                 else
1017                                 {
1018                                         nand->controller->write_data(nand, *data);
1019                                         data += 1;
1020                                         i += 1;
1021                                 }
1022                         }
1023                 }
1024         }
1025
1026         if (oob)
1027         {
1028                 if (nand->controller->write_block_data != NULL)
1029                         (nand->controller->write_block_data)(nand, oob, oob_size);
1030                 else
1031                 {
1032                         for (i = 0; i < oob_size;)
1033                         {
1034                                 if (nand->device->options & NAND_BUSWIDTH_16)
1035                                 {
1036                                         uint16_t oob_buf = le_to_h_u16(data);
1037                                         nand->controller->write_data(nand, oob_buf);
1038                                         oob += 2;
1039                                         i += 2;
1040                                 }
1041                                 else
1042                                 {
1043                                         nand->controller->write_data(nand, *oob);
1044                                         oob += 1;
1045                                         i += 1;
1046                                 }
1047                         }
1048                 }
1049         }
1050
1051         nand->controller->command(nand, NAND_CMD_PAGEPROG);
1052
1053         retval = nand->controller->nand_ready ?
1054                         nand->controller->nand_ready(nand, 100) :
1055                         nand_poll_ready(nand, 100);
1056         if (!retval)
1057                 return ERROR_NAND_OPERATION_TIMEOUT;
1058
1059         if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
1060         {
1061                 LOG_ERROR("couldn't read status");
1062                 return ERROR_NAND_OPERATION_FAILED;
1063         }
1064
1065         if (status & NAND_STATUS_FAIL)
1066         {
1067                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
1068                 return ERROR_NAND_OPERATION_FAILED;
1069         }
1070
1071         return ERROR_OK;
1072 }
1073
1074 COMMAND_HANDLER(handle_nand_list_command)
1075 {
1076         struct nand_device *p;
1077         int i;
1078
1079         if (!nand_devices)
1080         {
1081                 command_print(CMD_CTX, "no NAND flash devices configured");
1082                 return ERROR_OK;
1083         }
1084
1085         for (p = nand_devices, i = 0; p; p = p->next, i++)
1086         {
1087                 if (p->device)
1088                         command_print(CMD_CTX, "#%i: %s (%s) "
1089                                 "pagesize: %i, buswidth: %i,\n\t"
1090                                 "blocksize: %i, blocks: %i",
1091                                 i, p->device->name, p->manufacturer->name,
1092                                 p->page_size, p->bus_width,
1093                                 p->erase_size, p->num_blocks);
1094                 else
1095                         command_print(CMD_CTX, "#%i: not probed", i);
1096         }
1097
1098         return ERROR_OK;
1099 }
1100
1101 COMMAND_HANDLER(handle_nand_info_command)
1102 {
1103         int i = 0;
1104         int j = 0;
1105         int first = -1;
1106         int last = -1;
1107
1108         switch (CMD_ARGC) {
1109         default:
1110                 return ERROR_COMMAND_SYNTAX_ERROR;
1111         case 1:
1112                 first = 0;
1113                 last = INT32_MAX;
1114                 break;
1115         case 2:
1116                 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], i);
1117                 first = last = i;
1118                 i = 0;
1119                 break;
1120         case 3:
1121                 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], first);
1122                 COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], last);
1123                 break;
1124         }
1125
1126         struct nand_device *p;
1127         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1128         if (ERROR_OK != retval)
1129                 return retval;
1130
1131         if (NULL == p->device)
1132         {
1133                 command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
1134                 return ERROR_OK;
1135         }
1136
1137         if (first >= p->num_blocks)
1138                 first = p->num_blocks - 1;
1139
1140         if (last >= p->num_blocks)
1141                 last = p->num_blocks - 1;
1142
1143         command_print(CMD_CTX, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1144                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1145
1146         for (j = first; j <= last; j++)
1147         {
1148                 char *erase_state, *bad_state;
1149
1150                 if (p->blocks[j].is_erased == 0)
1151                         erase_state = "not erased";
1152                 else if (p->blocks[j].is_erased == 1)
1153                         erase_state = "erased";
1154                 else
1155                         erase_state = "erase state unknown";
1156
1157                 if (p->blocks[j].is_bad == 0)
1158                         bad_state = "";
1159                 else if (p->blocks[j].is_bad == 1)
1160                         bad_state = " (marked bad)";
1161                 else
1162                         bad_state = " (block condition unknown)";
1163
1164                 command_print(CMD_CTX,
1165                               "\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s",
1166                               j,
1167                               p->blocks[j].offset,
1168                               p->blocks[j].size / 1024,
1169                               erase_state,
1170                               bad_state);
1171         }
1172
1173         return ERROR_OK;
1174 }
1175
1176 COMMAND_HANDLER(handle_nand_probe_command)
1177 {
1178         if (CMD_ARGC != 1)
1179         {
1180                 return ERROR_COMMAND_SYNTAX_ERROR;
1181         }
1182
1183         struct nand_device *p;
1184         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1185         if (ERROR_OK != retval)
1186                 return retval;
1187
1188         if ((retval = nand_probe(p)) == ERROR_OK)
1189         {
1190                 command_print(CMD_CTX, "NAND flash device '%s' found", p->device->name);
1191         }
1192         else if (retval == ERROR_NAND_OPERATION_FAILED)
1193         {
1194                 command_print(CMD_CTX, "probing failed for NAND flash device");
1195         }
1196         else
1197         {
1198                 command_print(CMD_CTX, "unknown error when probing NAND flash device");
1199         }
1200
1201         return ERROR_OK;
1202 }
1203
1204 COMMAND_HANDLER(handle_nand_erase_command)
1205 {
1206         if (CMD_ARGC != 1 && CMD_ARGC != 3)
1207         {
1208                 return ERROR_COMMAND_SYNTAX_ERROR;
1209
1210         }
1211
1212         struct nand_device *p;
1213         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1214         if (ERROR_OK != retval)
1215                 return retval;
1216
1217         unsigned long offset;
1218         unsigned long length;
1219
1220         /* erase specified part of the chip; or else everything */
1221         if (CMD_ARGC == 3) {
1222                 unsigned long size = p->erase_size * p->num_blocks;
1223
1224                 COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], offset);
1225                 if ((offset % p->erase_size) != 0 || offset >= size)
1226                         return ERROR_INVALID_ARGUMENTS;
1227
1228                 COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], length);
1229                 if ((length == 0) || (length % p->erase_size) != 0
1230                                 || (length + offset) > size)
1231                         return ERROR_INVALID_ARGUMENTS;
1232
1233                 offset /= p->erase_size;
1234                 length /= p->erase_size;
1235         } else {
1236                 offset = 0;
1237                 length = p->num_blocks;
1238         }
1239
1240         retval = nand_erase(p, offset, offset + length - 1);
1241         if (retval == ERROR_OK)
1242         {
1243                 command_print(CMD_CTX, "erased blocks %lu to %lu "
1244                                 "on NAND flash device #%s '%s'",
1245                                 offset, offset + length,
1246                                 CMD_ARGV[0], p->device->name);
1247         }
1248         else if (retval == ERROR_NAND_OPERATION_FAILED)
1249         {
1250                 command_print(CMD_CTX, "erase failed");
1251         }
1252         else
1253         {
1254                 command_print(CMD_CTX, "unknown error when erasing NAND flash device");
1255         }
1256
1257         return ERROR_OK;
1258 }
1259
1260 COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
1261 {
1262         int first = -1;
1263         int last = -1;
1264
1265         if ((CMD_ARGC < 1) || (CMD_ARGC > 3) || (CMD_ARGC == 2))
1266         {
1267                 return ERROR_COMMAND_SYNTAX_ERROR;
1268
1269         }
1270
1271         struct nand_device *p;
1272         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1273         if (ERROR_OK != retval)
1274                 return retval;
1275
1276         if (CMD_ARGC == 3)
1277         {
1278                 unsigned long offset;
1279                 unsigned long length;
1280
1281                 COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], offset);
1282                 if (offset % p->erase_size)
1283                         return ERROR_INVALID_ARGUMENTS;
1284                 offset /= p->erase_size;
1285
1286                 COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], length);
1287                 if (length % p->erase_size)
1288                         return ERROR_INVALID_ARGUMENTS;
1289
1290                 length -= 1;
1291                 length /= p->erase_size;
1292
1293                 first = offset;
1294                 last = offset + length;
1295         }
1296
1297         retval = nand_build_bbt(p, first, last);
1298         if (retval == ERROR_OK)
1299         {
1300                 command_print(CMD_CTX, "checked NAND flash device for bad blocks, "
1301                                 "use \"nand info\" command to list blocks");
1302         }
1303         else if (retval == ERROR_NAND_OPERATION_FAILED)
1304         {
1305                 command_print(CMD_CTX, "error when checking for bad blocks on "
1306                                 "NAND flash device");
1307         }
1308         else
1309         {
1310                 command_print(CMD_CTX, "unknown error when checking for bad "
1311                                 "blocks on NAND flash device");
1312         }
1313
1314         return ERROR_OK;
1315 }
1316
1317 struct nand_fileio_state {
1318         uint32_t address;
1319         uint32_t size;
1320
1321         uint8_t *page;
1322         uint32_t page_size;
1323
1324         enum oob_formats oob_format;
1325         uint8_t *oob;
1326         uint32_t oob_size;
1327
1328         const int *eccpos;
1329
1330         bool file_opened;
1331         struct fileio fileio;
1332
1333         struct duration bench;
1334 };
1335
1336 static void nand_fileio_init(struct nand_fileio_state *state)
1337 {
1338         memset(state, 0, sizeof(*state));
1339         state->oob_format = NAND_OOB_NONE;
1340 }
1341
1342 static int nand_fileio_start(struct command_context *cmd_ctx,
1343                 struct nand_device *nand, const char *filename, int filemode,
1344                 struct nand_fileio_state *state)
1345 {
1346         if (state->address % nand->page_size)
1347         {
1348                 command_print(cmd_ctx, "only page-aligned addresses are supported");
1349                 return ERROR_COMMAND_SYNTAX_ERROR;
1350         }
1351
1352         duration_start(&state->bench);
1353
1354         if (NULL != filename)
1355         {
1356                 int retval = fileio_open(&state->fileio, filename, filemode, FILEIO_BINARY);
1357                 if (ERROR_OK != retval)
1358                 {
1359                         const char *msg = (FILEIO_READ == filemode) ? "read" : "write";
1360                         command_print(cmd_ctx, "failed to open '%s' for %s access",
1361                                         filename, msg);
1362                         return retval;
1363                 }
1364                 state->file_opened = true;
1365         }
1366
1367         if (!(state->oob_format & NAND_OOB_ONLY))
1368         {
1369                 state->page_size = nand->page_size;
1370                 state->page = malloc(nand->page_size);
1371         }
1372
1373         if (state->oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW))
1374         {
1375                 if (nand->page_size == 512)
1376                 {
1377                         state->oob_size = 16;
1378                         state->eccpos = nand_oob_16.eccpos;
1379                 }
1380                 else if (nand->page_size == 2048)
1381                 {
1382                         state->oob_size = 64;
1383                         state->eccpos = nand_oob_64.eccpos;
1384                 }
1385                 state->oob = malloc(state->oob_size);
1386         }
1387
1388         return ERROR_OK;
1389 }
1390 static int nand_fileio_cleanup(struct nand_fileio_state *state)
1391 {
1392         if (state->file_opened)
1393                 fileio_close(&state->fileio);
1394
1395         if (state->oob)
1396         {
1397                 free(state->oob);
1398                 state->oob = NULL;
1399         }
1400         if (state->page)
1401         {
1402                 free(state->page);
1403                 state->page = NULL;
1404         }
1405         return ERROR_OK;
1406 }
1407 static int nand_fileio_finish(struct nand_fileio_state *state)
1408 {
1409         nand_fileio_cleanup(state);
1410         return duration_measure(&state->bench);
1411 }
1412
1413 static COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
1414                 struct nand_device **dev, enum fileio_access filemode,
1415                 bool need_size, bool sw_ecc)
1416 {
1417         nand_fileio_init(state);
1418
1419         unsigned minargs = need_size ? 4 : 3;
1420         if (CMD_ARGC < minargs)
1421                 return ERROR_COMMAND_SYNTAX_ERROR;
1422
1423         struct nand_device *nand;
1424         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &nand);
1425         if (ERROR_OK != retval)
1426                 return retval;
1427
1428         if (NULL == nand->device)
1429         {
1430                 command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
1431                 return ERROR_OK;
1432         }
1433
1434         COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], state->address);
1435         if (need_size)
1436         {
1437                         COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], state->size);
1438                         if (state->size % nand->page_size)
1439                         {
1440                                 command_print(CMD_CTX, "only page-aligned sizes are supported");
1441                                 return ERROR_COMMAND_SYNTAX_ERROR;
1442                         }
1443         }
1444
1445         if (CMD_ARGC > minargs)
1446         {
1447                 for (unsigned i = minargs; i < CMD_ARGC; i++)
1448                 {
1449                         if (!strcmp(CMD_ARGV[i], "oob_raw"))
1450                                 state->oob_format |= NAND_OOB_RAW;
1451                         else if (!strcmp(CMD_ARGV[i], "oob_only"))
1452                                 state->oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1453                         else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc"))
1454                                 state->oob_format |= NAND_OOB_SW_ECC;
1455                         else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc_kw"))
1456                                 state->oob_format |= NAND_OOB_SW_ECC_KW;
1457                         else
1458                         {
1459                                 command_print(CMD_CTX, "unknown option: %s", CMD_ARGV[i]);
1460                                 return ERROR_COMMAND_SYNTAX_ERROR;
1461                         }
1462                 }
1463         }
1464
1465         retval = nand_fileio_start(CMD_CTX, nand, CMD_ARGV[1], filemode, state);
1466         if (ERROR_OK != retval)
1467                 return retval;
1468
1469         if (!need_size)
1470                 state->size = state->fileio.size;
1471
1472         *dev = nand;
1473
1474         return ERROR_OK;
1475 }
1476
1477 /**
1478  * @returns If no error occurred, returns number of bytes consumed;
1479  * otherwise, returns a negative error code.)
1480  */
1481 static int nand_fileio_read(struct nand_device *nand,
1482                 struct nand_fileio_state *s)
1483 {
1484         size_t total_read = 0;
1485         size_t one_read;
1486
1487         if (NULL != s->page)
1488         {
1489                 fileio_read(&s->fileio, s->page_size, s->page, &one_read);
1490                 if (one_read < s->page_size)
1491                         memset(s->page + one_read, 0xff, s->page_size - one_read);
1492                 total_read += one_read;
1493         }
1494
1495         if (s->oob_format & NAND_OOB_SW_ECC)
1496         {
1497                 uint8_t ecc[3];
1498                 memset(s->oob, 0xff, s->oob_size);
1499                 for (uint32_t i = 0, j = 0; i < s->page_size; i += 256)
1500                 {
1501                         nand_calculate_ecc(nand, s->page + i, ecc);
1502                         s->oob[s->eccpos[j++]] = ecc[0];
1503                         s->oob[s->eccpos[j++]] = ecc[1];
1504                         s->oob[s->eccpos[j++]] = ecc[2];
1505                 }
1506         }
1507         else if (s->oob_format & NAND_OOB_SW_ECC_KW)
1508         {
1509                 /*
1510                  * In this case eccpos is not used as
1511                  * the ECC data is always stored contigously
1512                  * at the end of the OOB area.  It consists
1513                  * of 10 bytes per 512-byte data block.
1514                  */
1515                 uint8_t *ecc = s->oob + s->oob_size - s->page_size / 512 * 10;
1516                 memset(s->oob, 0xff, s->oob_size);
1517                 for (uint32_t i = 0; i < s->page_size; i += 512)
1518                 {
1519                         nand_calculate_ecc_kw(nand, s->page + i, ecc);
1520                         ecc += 10;
1521                 }
1522         }
1523         else if (NULL != s->oob)
1524         {
1525                 fileio_read(&s->fileio, s->oob_size, s->oob, &one_read);
1526                 if (one_read < s->oob_size)
1527                         memset(s->oob + one_read, 0xff, s->oob_size - one_read);
1528                 total_read += one_read;
1529         }
1530         return total_read;
1531 }
1532
1533 COMMAND_HANDLER(handle_nand_write_command)
1534 {
1535         struct nand_device *nand = NULL;
1536         struct nand_fileio_state s;
1537         int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
1538                         &s, &nand, FILEIO_READ, false, true);
1539         if (ERROR_OK != retval)
1540                 return retval;
1541
1542         uint32_t total_bytes = s.size;
1543         while (s.size > 0)
1544         {
1545                 int bytes_read = nand_fileio_read(nand, &s);
1546                 if (bytes_read <= 0)
1547                 {
1548                         command_print(CMD_CTX, "error while reading file");
1549                         return nand_fileio_cleanup(&s);
1550                 }
1551                 s.size -= bytes_read;
1552
1553                 retval = nand_write_page(nand, s.address / nand->page_size,
1554                                 s.page, s.page_size, s.oob, s.oob_size);
1555                 if (ERROR_OK != retval)
1556                 {
1557                         command_print(CMD_CTX, "failed writing file %s "
1558                                 "to NAND flash %s at offset 0x%8.8" PRIx32,
1559                                 CMD_ARGV[1], CMD_ARGV[0], s.address);
1560                         return nand_fileio_cleanup(&s);
1561                 }
1562                 s.address += s.page_size;
1563         }
1564
1565         if (nand_fileio_finish(&s))
1566         {
1567                 command_print(CMD_CTX, "wrote file %s to NAND flash %s up to "
1568                                 "offset 0x%8.8" PRIx32 " in %fs (%0.3f kb/s)",
1569                                 CMD_ARGV[1], CMD_ARGV[0], s.address, duration_elapsed(&s.bench),
1570                                 duration_kbps(&s.bench, total_bytes));
1571         }
1572         return ERROR_OK;
1573 }
1574
1575 COMMAND_HANDLER(handle_nand_verify_command)
1576 {
1577         struct nand_device *nand = NULL;
1578         struct nand_fileio_state file;
1579         int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
1580                         &file, &nand, FILEIO_READ, false, true);
1581         if (ERROR_OK != retval)
1582                 return retval;
1583
1584         struct nand_fileio_state dev;
1585         nand_fileio_init(&dev);
1586         dev.address = file.address;
1587         dev.size = file.size;
1588         dev.oob_format = file.oob_format;
1589         retval = nand_fileio_start(CMD_CTX, nand, NULL, FILEIO_NONE, &dev);
1590         if (ERROR_OK != retval)
1591                 return retval;
1592
1593         while (file.size > 0)
1594         {
1595                 int retval = nand_read_page(nand, dev.address / dev.page_size,
1596                                 dev.page, dev.page_size, dev.oob, dev.oob_size);
1597                 if (ERROR_OK != retval)
1598                 {
1599                         command_print(CMD_CTX, "reading NAND flash page failed");
1600                         nand_fileio_cleanup(&dev);
1601                         return nand_fileio_cleanup(&file);
1602                 }
1603
1604                 int bytes_read = nand_fileio_read(nand, &file);
1605                 if (bytes_read <= 0)
1606                 {
1607                         command_print(CMD_CTX, "error while reading file");
1608                         nand_fileio_cleanup(&dev);
1609                         return nand_fileio_cleanup(&file);
1610                 }
1611
1612                 if ((dev.page && memcmp(dev.page, file.page, dev.page_size)) ||
1613                     (dev.oob && memcmp(dev.oob, file.oob, dev.oob_size)) )
1614                 {
1615                         command_print(CMD_CTX, "NAND flash contents differ "
1616                                                 "at 0x%8.8" PRIx32, dev.address);
1617                         nand_fileio_cleanup(&dev);
1618                         return nand_fileio_cleanup(&file);
1619                 }
1620
1621                 file.size -= bytes_read;
1622                 dev.address += nand->page_size;
1623         }
1624
1625         if (nand_fileio_finish(&file) == ERROR_OK)
1626         {
1627                 command_print(CMD_CTX, "verified file %s in NAND flash %s "
1628                                 "up to offset 0x%8.8" PRIx32 " in %fs (%0.3f kb/s)",
1629                                 CMD_ARGV[1], CMD_ARGV[0], dev.address, duration_elapsed(&file.bench),
1630                                 duration_kbps(&file.bench, dev.size));
1631         }
1632
1633         return nand_fileio_cleanup(&dev);
1634 }
1635
1636 COMMAND_HANDLER(handle_nand_dump_command)
1637 {
1638         struct nand_device *nand = NULL;
1639         struct nand_fileio_state s;
1640         int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
1641                         &s, &nand, FILEIO_WRITE, true, false);
1642         if (ERROR_OK != retval)
1643                 return retval;
1644
1645         while (s.size > 0)
1646         {
1647                 size_t size_written;
1648                 int retval = nand_read_page(nand, s.address / nand->page_size,
1649                                 s.page, s.page_size, s.oob, s.oob_size);
1650                 if (ERROR_OK != retval)
1651                 {
1652                         command_print(CMD_CTX, "reading NAND flash page failed");
1653                         return nand_fileio_cleanup(&s);
1654                 }
1655
1656                 if (NULL != s.page)
1657                         fileio_write(&s.fileio, s.page_size, s.page, &size_written);
1658
1659                 if (NULL != s.oob)
1660                         fileio_write(&s.fileio, s.oob_size, s.oob, &size_written);
1661
1662                 s.size -= nand->page_size;
1663                 s.address += nand->page_size;
1664         }
1665
1666         if (nand_fileio_finish(&s) == ERROR_OK)
1667         {
1668                 command_print(CMD_CTX, "dumped %zu bytes in %fs (%0.3f kb/s)",
1669                                 s.fileio.size, duration_elapsed(&s.bench),
1670                                 duration_kbps(&s.bench, s.fileio.size));
1671         }
1672         return ERROR_OK;
1673 }
1674
1675 COMMAND_HANDLER(handle_nand_raw_access_command)
1676 {
1677         if ((CMD_ARGC < 1) || (CMD_ARGC > 2))
1678         {
1679                 return ERROR_COMMAND_SYNTAX_ERROR;
1680         }
1681
1682         struct nand_device *p;
1683         int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
1684         if (ERROR_OK != retval)
1685                 return retval;
1686
1687         if (NULL == p->device)
1688         {
1689                 command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
1690                 return ERROR_OK;
1691         }
1692
1693         if (CMD_ARGC == 2)
1694                 COMMAND_PARSE_ENABLE(CMD_ARGV[1], p->use_raw);
1695
1696         const char *msg = p->use_raw ? "enabled" : "disabled";
1697         command_print(CMD_CTX, "raw access is %s", msg);
1698
1699         return ERROR_OK;
1700 }
1701
1702 static const struct command_registration nand_exec_command_handlers[] = {
1703         {
1704                 .name = "list",
1705                 .handler = &handle_nand_list_command,
1706                 .mode = COMMAND_EXEC,
1707                 .help = "list configured NAND flash devices",
1708         },
1709         {
1710                 .name = "info",
1711                 .handler = &handle_nand_info_command,
1712                 .mode = COMMAND_EXEC,
1713                 .usage = "<bank>",
1714                 .help = "print info about a NAND flash device",
1715         },
1716         {
1717                 .name = "probe",
1718                 .handler = &handle_nand_probe_command,
1719                 .mode = COMMAND_EXEC,
1720                 .usage = "<bank>",
1721                 .help = "identify NAND flash device <num>",
1722
1723         },
1724         {
1725                 .name = "check_bad_blocks",
1726                 .handler = &handle_nand_check_bad_blocks_command,
1727                 .mode = COMMAND_EXEC,
1728                 .usage = "<bank> [<offset> <length>]",
1729                 .help = "check NAND flash device <num> for bad blocks",
1730         },
1731         {
1732                 .name = "erase",
1733                 .handler = &handle_nand_erase_command,
1734                 .mode = COMMAND_EXEC,
1735                 .usage = "<bank> [<offset> <length>]",
1736                 .help = "erase blocks on NAND flash device",
1737         },
1738         {
1739                 .name = "dump",
1740                 .handler = &handle_nand_dump_command,
1741                 .mode = COMMAND_EXEC,
1742                 .usage = "<bank> <filename> <offset> <length> "
1743                         "[oob_raw | oob_only]",
1744                 .help = "dump from NAND flash device",
1745         },
1746         {
1747                 .name = "verify",
1748                 .handler = &handle_nand_verify_command,
1749                 .mode = COMMAND_EXEC,
1750                 .usage = "<bank> <filename> <offset> "
1751                         "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]",
1752                 .help = "verify NAND flash device",
1753         },
1754         {
1755                 .name = "write",
1756                 .handler = &handle_nand_write_command,
1757                 .mode = COMMAND_EXEC,
1758                 .usage = "<bank> <filename> <offset> "
1759                         "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]",
1760                 .help = "write to NAND flash device",
1761         },
1762         {
1763                 .name = "raw_access",
1764                 .handler = &handle_nand_raw_access_command,
1765                 .mode = COMMAND_EXEC,
1766                 .usage = "<num> ['enable'|'disable']",
1767                 .help = "raw access to NAND flash device",
1768         },
1769         COMMAND_REGISTRATION_DONE
1770 };
1771
1772 int nand_init(struct command_context *cmd_ctx)
1773 {
1774         if (!nand_devices)
1775                 return ERROR_OK;
1776         struct command *parent = command_find_in_context(cmd_ctx, "nand");
1777         return register_commands(cmd_ctx, parent, nand_exec_command_handlers);
1778 }
1779
1780 COMMAND_HANDLER(handle_nand_init_command)
1781 {
1782         if (CMD_ARGC != 0)
1783                 return ERROR_COMMAND_SYNTAX_ERROR;
1784
1785         static bool nand_initialized = false;
1786         if (nand_initialized)
1787         {
1788                 LOG_INFO("'nand init' has already been called");
1789                 return ERROR_OK;
1790         }
1791         nand_initialized = true;
1792
1793         LOG_DEBUG("Initializing NAND devices...");
1794         return nand_init(CMD_CTX);
1795 }