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   1 /***************************************************************************
   2  *   Copyright (C) 2010 by Spencer Oliver                                  *
   3  *   spen@spen-soft.co.uk                                                  *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  19  ***************************************************************************/
  20
  21 /*
  22  * NAND controller interface for Nuvoton NUC910
  23  */
  24
  25 #ifndef NUC910_H
  26 #define NUC910_H
  27
  28 #define NUC910_FMICSR   0xB000D000
  29 #define NUC910_SMCSR    0xB000D0A0
  30 #define NUC910_SMTCR    0xB000D0A4
  31 #define NUC910_SMIER    0xB000D0A8
  32 #define NUC910_SMISR    0xB000D0AC
  33 #define NUC910_SMCMD    0xB000D0B0
  34 #define NUC910_SMADDR   0xB000D0B4
  35 #define NUC910_SMDATA   0xB000D0B8
  36
  37 #define NUC910_SMECC0   0xB000D0BC
  38 #define NUC910_SMECC1   0xB000D0C0
  39 #define NUC910_SMECC2   0xB000D0C4
  40 #define NUC910_SMECC3   0xB000D0C8
  41 #define NUC910_ECC4ST   0xB000D114
  42
  43 /* Global Control and Status Register (FMICSR) */
  44 #define NUC910_FMICSR_SM_EN     (1<<3)
  45
  46 /* NAND Flash Address Port Register (SMADDR) */
  47 #define NUC910_SMADDR_EOA (1<<31)
  48
  49 /* NAND Flash Control and Status Register (SMCSR) */
  50 #define NUC910_SMCSR_PSIZE      (1<<3)
  51 #define NUC910_SMCSR_DBW        (1<<4)
  52
  53 /* NAND Flash Interrupt Status Register (SMISR) */
  54 #define NUC910_SMISR_ECC_IF     (1<<2)
  55 #define NUC910_SMISR_RB_        (1<<18)
  56
  57 /* ECC4 Correction Status (ECC4ST) */
  58
  59 #endif /* NUC910_H */
  60