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   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de>              *
   3  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
   4  *   Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net>             *
   5  *                                                                         *
   6  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  20  ***************************************************************************/
  21
  22 #ifdef HAVE_CONFIG_H
  23 #include "config.h"
  24 #endif
  25
  26 #include "imp.h"
  27
  28 /* configured NAND devices and NAND Flash command handler */
  29 struct nand_device *nand_devices;
  30
  31 void nand_device_add(struct nand_device *c)
  32 {
  33         if (nand_devices) {
  34                 struct nand_device *p = nand_devices;
  35                 while (p && p->next)
  36                         p = p->next;
  37                 p->next = c;
  38         } else
  39                 nand_devices = c;
  40 }
  41
  42
  43 /*      Chip ID list
  44  *
  45  *      Manufacturer, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  46  *      options, name
  47  *
  48  *      Pagesize; 0, 256, 512
  49  *      0       get this information from the extended chip ID
  50  *      256     256 Byte page size
  51  *      512     512 Byte page size
  52  */
  53 static struct nand_info nand_flash_ids[] = {
  54         /* Vendor Specific Entries */
  55         { NAND_MFR_SAMSUNG,     0xD5, 8192, 2048, 0x100000, LP_OPTIONS,
  56           "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
  57         { NAND_MFR_SAMSUNG,     0xD7, 8192, 4096, 0x100000, LP_OPTIONS,
  58           "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"},
  59
  60         /* start "museum" IDs */
  61         { 0x0,                  0x6e, 256, 1, 0x1000, 0,                "NAND 1MiB 5V 8-bit"},
  62         { 0x0,                  0x64, 256, 2, 0x1000, 0,                "NAND 2MiB 5V 8-bit"},
  63         { 0x0,                  0x6b, 512, 4, 0x2000, 0,                "NAND 4MiB 5V 8-bit"},
  64         { 0x0,                  0xe8, 256, 1, 0x1000, 0,                "NAND 1MiB 3.3V 8-bit"},
  65         { 0x0,                  0xec, 256, 1, 0x1000, 0,                "NAND 1MiB 3.3V 8-bit"},
  66         { 0x0,                  0xea, 256, 2, 0x1000, 0,                "NAND 2MiB 3.3V 8-bit"},
  67         { 0x0,                  0xd5, 512, 4, 0x2000, 0,                "NAND 4MiB 3.3V 8-bit"},
  68         { 0x0,                  0xe3, 512, 4, 0x2000, 0,                "NAND 4MiB 3.3V 8-bit"},
  69         { 0x0,                  0xe5, 512, 4, 0x2000, 0,                "NAND 4MiB 3.3V 8-bit"},
  70         { 0x0,                  0xd6, 512, 8, 0x2000, 0,                "NAND 8MiB 3.3V 8-bit"},
  71
  72         { 0x0,                  0x39, 512, 8, 0x2000, 0,                "NAND 8MiB 1.8V 8-bit"},
  73         { 0x0,                  0xe6, 512, 8, 0x2000, 0,                "NAND 8MiB 3.3V 8-bit"},
  74         { 0x0,                  0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
  75         { 0x0,                  0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
  76         /* end "museum" IDs */
  77
  78         { 0x0,                  0x33, 512, 16, 0x4000, 0,               "NAND 16MiB 1.8V 8-bit"},
  79         { 0x0,                  0x73, 512, 16, 0x4000, 0,               "NAND 16MiB 3.3V 8-bit"},
  80         { 0x0,                  0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 1.8V 16-bit"},
  81         { 0x0,                  0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 3.3V 16-bit"},
  82
  83         { 0x0,                  0x35, 512, 32, 0x4000, 0,               "NAND 32MiB 1.8V 8-bit"},
  84         { 0x0,                  0x75, 512, 32, 0x4000, 0,               "NAND 32MiB 3.3V 8-bit"},
  85         { 0x0,                  0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 1.8V 16-bit"},
  86         { 0x0,                  0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 3.3V 16-bit"},
  87
  88         { 0x0,                  0x36, 512, 64, 0x4000, 0,               "NAND 64MiB 1.8V 8-bit"},
  89         { 0x0,                  0x76, 512, 64, 0x4000, 0,               "NAND 64MiB 3.3V 8-bit"},
  90         { 0x0,                  0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 1.8V 16-bit"},
  91         { 0x0,                  0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 3.3V 16-bit"},
  92
  93         { 0x0,                  0x78, 512, 128, 0x4000, 0,              "NAND 128MiB 1.8V 8-bit"},
  94         { 0x0,                  0x39, 512, 128, 0x4000, 0,              "NAND 128MiB 1.8V 8-bit"},
  95         { 0x0,                  0x79, 512, 128, 0x4000, 0,              "NAND 128MiB 3.3V 8-bit"},
  96         { 0x0,                  0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
  97         { 0x0,                  0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
  98         { 0x0,                  0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
  99         { 0x0,                  0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
 100
 101         { 0x0,                  0x71, 512, 256, 0x4000, 0,              "NAND 256MiB 3.3V 8-bit"},
 102
 103         { 0x0,                  0xA2, 0,  64, 0, LP_OPTIONS,            "NAND 64MiB 1.8V 8-bit"},
 104         { 0x0,                  0xF2, 0,  64, 0, LP_OPTIONS,            "NAND 64MiB 3.3V 8-bit"},
 105         { 0x0,                  0xB2, 0,  64, 0, LP_OPTIONS16,          "NAND 64MiB 1.8V 16-bit"},
 106         { 0x0,                  0xC2, 0,  64, 0, LP_OPTIONS16,          "NAND 64MiB 3.3V 16-bit"},
 107
 108         { 0x0,                  0xA1, 0, 128, 0, LP_OPTIONS,            "NAND 128MiB 1.8V 8-bit"},
 109         { 0x0,                  0xF1, 0, 128, 0, LP_OPTIONS,            "NAND 128MiB 3.3V 8-bit"},
 110         { 0x0,                  0xB1, 0, 128, 0, LP_OPTIONS16,          "NAND 128MiB 1.8V 16-bit"},
 111         { 0x0,                  0xC1, 0, 128, 0, LP_OPTIONS16,          "NAND 128MiB 3.3V 16-bit"},
 112
 113         { 0x0,                  0xAA, 0, 256, 0, LP_OPTIONS,            "NAND 256MiB 1.8V 8-bit"},
 114         { 0x0,                  0xDA, 0, 256, 0, LP_OPTIONS,            "NAND 256MiB 3.3V 8-bit"},
 115         { 0x0,                  0xBA, 0, 256, 0, LP_OPTIONS16,          "NAND 256MiB 1.8V 16-bit"},
 116         { 0x0,                  0xCA, 0, 256, 0, LP_OPTIONS16,          "NAND 256MiB 3.3V 16-bit"},
 117
 118         { 0x0,                  0xAC, 0, 512, 0, LP_OPTIONS,            "NAND 512MiB 1.8V 8-bit"},
 119         { 0x0,                  0xDC, 0, 512, 0, LP_OPTIONS,            "NAND 512MiB 3.3V 8-bit"},
 120         { 0x0,                  0xBC, 0, 512, 0, LP_OPTIONS16,          "NAND 512MiB 1.8V 16-bit"},
 121         { 0x0,                  0xCC, 0, 512, 0, LP_OPTIONS16,          "NAND 512MiB 3.3V 16-bit"},
 122
 123         { 0x0,                  0xA3, 0, 1024, 0, LP_OPTIONS,           "NAND 1GiB 1.8V 8-bit"},
 124         { 0x0,                  0xD3, 0, 1024, 0, LP_OPTIONS,           "NAND 1GiB 3.3V 8-bit"},
 125         { 0x0,                  0xB3, 0, 1024, 0, LP_OPTIONS16,         "NAND 1GiB 1.8V 16-bit"},
 126         { 0x0,                  0xC3, 0, 1024, 0, LP_OPTIONS16,         "NAND 1GiB 3.3V 16-bit"},
 127
 128         { 0x0,                  0xA5, 0, 2048, 0, LP_OPTIONS,           "NAND 2GiB 1.8V 8-bit"},
 129         { 0x0,                  0xD5, 0, 8192, 0, LP_OPTIONS,           "NAND 2GiB 3.3V 8-bit"},
 130         { 0x0,                  0xB5, 0, 2048, 0, LP_OPTIONS16,         "NAND 2GiB 1.8V 16-bit"},
 131         { 0x0,                  0xC5, 0, 2048, 0, LP_OPTIONS16,         "NAND 2GiB 3.3V 16-bit"},
 132
 133         { 0x0,                  0x48, 0, 2048, 0, LP_OPTIONS,           "NAND 2GiB 3.3V 8-bit"},
 134
 135         {0, 0, 0, 0, 0, 0, NULL}
 136 };
 137
 138 /* Manufacturer ID list
 139  */
 140 static struct nand_manufacturer nand_manuf_ids[] = {
 141         {0x0, "unknown"},
 142         {NAND_MFR_TOSHIBA, "Toshiba"},
 143         {NAND_MFR_SAMSUNG, "Samsung"},
 144         {NAND_MFR_FUJITSU, "Fujitsu"},
 145         {NAND_MFR_NATIONAL, "National"},
 146         {NAND_MFR_RENESAS, "Renesas"},
 147         {NAND_MFR_STMICRO, "ST Micro"},
 148         {NAND_MFR_HYNIX, "Hynix"},
 149         {NAND_MFR_MICRON, "Micron"},
 150         {0x0, NULL},
 151 };
 152
 153 /*
 154  * Define default oob placement schemes for large and small page devices
 155  */
 156
 157 #if 0
 158 static struct nand_ecclayout nand_oob_8 = {
 159         .eccbytes = 3,
 160         .eccpos = {0, 1, 2},
 161         .oobfree = {
 162                 {.offset = 3,
 163                  .length = 2},
 164                 {.offset = 6,
 165                  .length = 2}
 166         }
 167 };
 168 #endif
 169
 170 /**
 171  * Returns the flash bank specified by @a name, which matches the
 172  * driver name and a suffix (option) specify the driver-specific
 173  * bank number. The suffix consists of the '.' and the driver-specific
 174  * bank number: when two davinci banks are defined, then 'davinci.1' refers
 175  * to the second (e.g. DM355EVM).
 176  */
 177 static struct nand_device *get_nand_device_by_name(const char *name)
 178 {
 179         unsigned requested = get_flash_name_index(name);
 180         unsigned found = 0;
 181
 182         struct nand_device *nand;
 183         for (nand = nand_devices; NULL != nand; nand = nand->next) {
 184                 if (strcmp(nand->name, name) == 0)
 185                         return nand;
 186                 if (!flash_driver_name_matches(nand->controller->name, name))
 187                         continue;
 188                 if (++found < requested)
 189                         continue;
 190                 return nand;
 191         }
 192         return NULL;
 193 }
 194
 195 struct nand_device *get_nand_device_by_num(int num)
 196 {
 197         struct nand_device *p;
 198         int i = 0;
 199
 200         for (p = nand_devices; p; p = p->next) {
 201                 if (i++ == num)
 202                         return p;
 203         }
 204
 205         return NULL;
 206 }
 207
 208 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 209         struct nand_device **nand)
 210 {
 211         const char *str = CMD_ARGV[name_index];
 212         *nand = get_nand_device_by_name(str);
 213         if (*nand)
 214                 return ERROR_OK;
 215
 216         unsigned num;
 217         COMMAND_PARSE_NUMBER(uint, str, num);
 218         *nand = get_nand_device_by_num(num);
 219         if (!*nand) {
 220                 command_print(CMD, "NAND flash device '%s' not found", str);
 221                 return ERROR_COMMAND_SYNTAX_ERROR;
 222         }
 223         return ERROR_OK;
 224 }
 225
 226 int nand_build_bbt(struct nand_device *nand, int first, int last)
 227 {
 228         uint32_t page;
 229         int i;
 230         int pages_per_block = (nand->erase_size / nand->page_size);
 231         uint8_t oob[6];
 232         int ret;
 233
 234         if ((first < 0) || (first >= nand->num_blocks))
 235                 first = 0;
 236
 237         if ((last >= nand->num_blocks) || (last == -1))
 238                 last = nand->num_blocks - 1;
 239
 240         page = first * pages_per_block;
 241         for (i = first; i <= last; i++) {
 242                 ret = nand_read_page(nand, page, NULL, 0, oob, 6);
 243                 if (ret != ERROR_OK)
 244                         return ret;
 245
 246                 if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 247                                 || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
 248                                 ((nand->page_size == 2048) && (oob[0] != 0xff)))) {
 249                         LOG_WARNING("bad block: %i", i);
 250                         nand->blocks[i].is_bad = 1;
 251                 } else
 252                         nand->blocks[i].is_bad = 0;
 253
 254                 page += pages_per_block;
 255         }
 256
 257         return ERROR_OK;
 258 }
 259
 260 int nand_read_status(struct nand_device *nand, uint8_t *status)
 261 {
 262         if (!nand->device)
 263                 return ERROR_NAND_DEVICE_NOT_PROBED;
 264
 265         /* Send read status command */
 266         /* FIXME: errors returned from nand->controller are mostly ignored! */
 267         nand->controller->command(nand, NAND_CMD_STATUS);
 268
 269         alive_sleep(1);
 270
 271         /* read status */
 272         if (nand->device->options & NAND_BUSWIDTH_16) {
 273                 uint16_t data;
 274                 nand->controller->read_data(nand, &data);
 275                 *status = data & 0xff;
 276         } else
 277                 nand->controller->read_data(nand, status);
 278
 279         return ERROR_OK;
 280 }
 281
 282 static int nand_poll_ready(struct nand_device *nand, int timeout)
 283 {
 284         uint8_t status;
 285
 286         nand->controller->command(nand, NAND_CMD_STATUS);
 287         do {
 288                 if (nand->device->options & NAND_BUSWIDTH_16) {
 289                         uint16_t data;
 290                         nand->controller->read_data(nand, &data);
 291                         status = data & 0xff;
 292                 } else
 293                         nand->controller->read_data(nand, &status);
 294                 if (status & NAND_STATUS_READY)
 295                         break;
 296                 alive_sleep(1);
 297         } while (timeout--);
 298
 299         return (status & NAND_STATUS_READY) != 0;
 300 }
 301
 302 int nand_probe(struct nand_device *nand)
 303 {
 304         uint8_t manufacturer_id, device_id;
 305         uint8_t id_buff[6] = { 0 };     /* zero buff to silence false warning
 306                                          * from clang static analyzer */
 307         int retval;
 308         int i;
 309
 310         /* clear device data */
 311         nand->device = NULL;
 312         nand->manufacturer = NULL;
 313
 314         /* clear device parameters */
 315         nand->bus_width = 0;
 316         nand->address_cycles = 0;
 317         nand->page_size = 0;
 318         nand->erase_size = 0;
 319
 320         /* initialize controller (device parameters are zero, use controller default) */
 321         retval = nand->controller->init(nand);
 322         if (retval != ERROR_OK) {
 323                 switch (retval) {
 324                         case ERROR_NAND_OPERATION_FAILED:
 325                                 LOG_DEBUG("controller initialization failed");
 326                                 return ERROR_NAND_OPERATION_FAILED;
 327                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 328                                 LOG_ERROR(
 329                                 "BUG: controller reported that it doesn't support default parameters");
 330                                 return ERROR_NAND_OPERATION_FAILED;
 331                         default:
 332                                 LOG_ERROR("BUG: unknown controller initialization failure");
 333                                 return ERROR_NAND_OPERATION_FAILED;
 334                 }
 335         }
 336
 337         nand->controller->command(nand, NAND_CMD_RESET);
 338         nand->controller->reset(nand);
 339
 340         nand->controller->command(nand, NAND_CMD_READID);
 341         nand->controller->address(nand, 0x0);
 342
 343         if (nand->bus_width == 8) {
 344                 nand->controller->read_data(nand, &manufacturer_id);
 345                 nand->controller->read_data(nand, &device_id);
 346         } else {
 347                 uint16_t data_buf;
 348                 nand->controller->read_data(nand, &data_buf);
 349                 manufacturer_id = data_buf & 0xff;
 350                 nand->controller->read_data(nand, &data_buf);
 351                 device_id = data_buf & 0xff;
 352         }
 353
 354         for (i = 0; nand_flash_ids[i].name; i++) {
 355                 if (nand_flash_ids[i].id == device_id &&
 356                                 (nand_flash_ids[i].mfr_id == manufacturer_id ||
 357                                 nand_flash_ids[i].mfr_id == 0)) {
 358                         nand->device = &nand_flash_ids[i];
 359                         break;
 360                 }
 361         }
 362
 363         for (i = 0; nand_manuf_ids[i].name; i++) {
 364                 if (nand_manuf_ids[i].id == manufacturer_id) {
 365                         nand->manufacturer = &nand_manuf_ids[i];
 366                         break;
 367                 }
 368         }
 369
 370         if (!nand->manufacturer) {
 371                 nand->manufacturer = &nand_manuf_ids[0];
 372                 nand->manufacturer->id = manufacturer_id;
 373         }
 374
 375         if (!nand->device) {
 376                 LOG_ERROR(
 377                         "unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 378                         manufacturer_id,
 379                         device_id);
 380                 return ERROR_NAND_OPERATION_FAILED;
 381         }
 382
 383         LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
 384
 385         /* initialize device parameters */
 386
 387         /* bus width */
 388         if (nand->device->options & NAND_BUSWIDTH_16)
 389                 nand->bus_width = 16;
 390         else
 391                 nand->bus_width = 8;
 392
 393         /* Do we need extended device probe information? */
 394         if (nand->device->page_size == 0 ||
 395                         nand->device->erase_size == 0) {
 396                 if (nand->bus_width == 8) {
 397                         retval = nand->controller->read_data(nand, id_buff + 3);
 398                         if (retval != ERROR_OK)
 399                                 return retval;
 400
 401                         retval = nand->controller->read_data(nand, id_buff + 4);
 402                         if (retval != ERROR_OK)
 403                                 return retval;
 404
 405                         retval = nand->controller->read_data(nand, id_buff + 5);
 406                         if (retval != ERROR_OK)
 407                                 return retval;
 408
 409                 } else {
 410                         uint16_t data_buf;
 411
 412                         retval = nand->controller->read_data(nand, &data_buf);
 413                         if (retval != ERROR_OK)
 414                                 return retval;
 415                         id_buff[3] = data_buf;
 416
 417                         retval = nand->controller->read_data(nand, &data_buf);
 418                         if (retval != ERROR_OK)
 419                                 return retval;
 420                         id_buff[4] = data_buf;
 421
 422                         retval = nand->controller->read_data(nand, &data_buf);
 423                         if (retval != ERROR_OK)
 424                                 return retval;
 425                         id_buff[5] = data_buf >> 8;
 426                 }
 427         }
 428
 429         /* page size */
 430         if (nand->device->page_size == 0)
 431                 nand->page_size = 1 << (10 + (id_buff[4] & 3));
 432         else if (nand->device->page_size == 256) {
 433                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
 434                 return ERROR_NAND_OPERATION_FAILED;
 435         } else
 436                 nand->page_size = nand->device->page_size;
 437
 438         /* number of address cycles */
 439         if (nand->page_size <= 512) {
 440                 /* small page devices */
 441                 if (nand->device->chip_size <= 32)
 442                         nand->address_cycles = 3;
 443                 else if (nand->device->chip_size <= 8*1024)
 444                         nand->address_cycles = 4;
 445                 else {
 446                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 447                         nand->address_cycles = 5;
 448                 }
 449         } else {
 450                 /* large page devices */
 451                 if (nand->device->chip_size <= 128)
 452                         nand->address_cycles = 4;
 453                 else if (nand->device->chip_size <= 32*1024)
 454                         nand->address_cycles = 5;
 455                 else {
 456                         LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 457                         nand->address_cycles = 6;
 458                 }
 459         }
 460
 461         /* erase size */
 462         if (nand->device->erase_size == 0) {
 463                 switch ((id_buff[4] >> 4) & 3) {
 464                         case 0:
 465                                 nand->erase_size = 64 << 10;
 466                                 break;
 467                         case 1:
 468                                 nand->erase_size = 128 << 10;
 469                                 break;
 470                         case 2:
 471                                 nand->erase_size = 256 << 10;
 472                                 break;
 473                         case 3:
 474                                 nand->erase_size = 512 << 10;
 475                                 break;
 476                 }
 477         } else
 478                 nand->erase_size = nand->device->erase_size;
 479
 480         /* initialize controller, but leave parameters at the controllers default */
 481         retval = nand->controller->init(nand);
 482         if (retval != ERROR_OK) {
 483                 switch (retval) {
 484                         case ERROR_NAND_OPERATION_FAILED:
 485                                 LOG_DEBUG("controller initialization failed");
 486                                 return ERROR_NAND_OPERATION_FAILED;
 487                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 488                                 LOG_ERROR(
 489                                 "controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 490                                 nand->bus_width,
 491                                 nand->address_cycles,
 492                                 nand->page_size);
 493                                 return ERROR_NAND_OPERATION_FAILED;
 494                         default:
 495                                 LOG_ERROR("BUG: unknown controller initialization failure");
 496                                 return ERROR_NAND_OPERATION_FAILED;
 497                 }
 498         }
 499
 500         nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
 501         nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
 502
 503         for (i = 0; i < nand->num_blocks; i++) {
 504                 nand->blocks[i].size = nand->erase_size;
 505                 nand->blocks[i].offset = i * nand->erase_size;
 506                 nand->blocks[i].is_erased = -1;
 507                 nand->blocks[i].is_bad = -1;
 508         }
 509
 510         return ERROR_OK;
 511 }
 512
 513 int nand_erase(struct nand_device *nand, int first_block, int last_block)
 514 {
 515         int i;
 516         uint32_t page;
 517         uint8_t status;
 518         int retval;
 519
 520         if (!nand->device)
 521                 return ERROR_NAND_DEVICE_NOT_PROBED;
 522
 523         if ((first_block < 0) || (last_block >= nand->num_blocks))
 524                 return ERROR_COMMAND_SYNTAX_ERROR;
 525
 526         /* make sure we know if a block is bad before erasing it */
 527         for (i = first_block; i <= last_block; i++) {
 528                 if (nand->blocks[i].is_bad == -1) {
 529                         nand_build_bbt(nand, i, last_block);
 530                         break;
 531                 }
 532         }
 533
 534         for (i = first_block; i <= last_block; i++) {
 535                 /* Send erase setup command */
 536                 nand->controller->command(nand, NAND_CMD_ERASE1);
 537
 538                 page = i * (nand->erase_size / nand->page_size);
 539
 540                 /* Send page address */
 541                 if (nand->page_size <= 512) {
 542                         /* row */
 543                         nand->controller->address(nand, page & 0xff);
 544                         nand->controller->address(nand, (page >> 8) & 0xff);
 545
 546                         /* 3rd cycle only on devices with more than 32 MiB */
 547                         if (nand->address_cycles >= 4)
 548                                 nand->controller->address(nand, (page >> 16) & 0xff);
 549
 550                         /* 4th cycle only on devices with more than 8 GiB */
 551                         if (nand->address_cycles >= 5)
 552                                 nand->controller->address(nand, (page >> 24) & 0xff);
 553                 } else {
 554                         /* row */
 555                         nand->controller->address(nand, page & 0xff);
 556                         nand->controller->address(nand, (page >> 8) & 0xff);
 557
 558                         /* 3rd cycle only on devices with more than 128 MiB */
 559                         if (nand->address_cycles >= 5)
 560                                 nand->controller->address(nand, (page >> 16) & 0xff);
 561                 }
 562
 563                 /* Send erase confirm command */
 564                 nand->controller->command(nand, NAND_CMD_ERASE2);
 565
 566                 retval = nand->controller->nand_ready ?
 567                         nand->controller->nand_ready(nand, 1000) :
 568                         nand_poll_ready(nand, 1000);
 569                 if (!retval) {
 570                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 571                         return ERROR_NAND_OPERATION_TIMEOUT;
 572                 }
 573
 574                 retval = nand_read_status(nand, &status);
 575                 if (retval != ERROR_OK) {
 576                         LOG_ERROR("couldn't read status");
 577                         return ERROR_NAND_OPERATION_FAILED;
 578                 }
 579
 580                 if (status & 0x1) {
 581                         LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
 582                                 (nand->blocks[i].is_bad == 1)
 583                                 ? "bad " : "",
 584                                 i, status);
 585                         /* continue; other blocks might still be erasable */
 586                 }
 587
 588                 nand->blocks[i].is_erased = 1;
 589         }
 590
 591         return ERROR_OK;
 592 }
 593
 594 #if 0
 595 static int nand_read_plain(struct nand_device *nand,
 596         uint32_t address,
 597         uint8_t *data,
 598         uint32_t data_size)
 599 {
 600         uint8_t *page;
 601
 602         if (!nand->device)
 603                 return ERROR_NAND_DEVICE_NOT_PROBED;
 604
 605         if (address % nand->page_size) {
 606                 LOG_ERROR("reads need to be page aligned");
 607                 return ERROR_NAND_OPERATION_FAILED;
 608         }
 609
 610         page = malloc(nand->page_size);
 611
 612         while (data_size > 0) {
 613                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 614                 uint32_t page_address;
 615
 616
 617                 page_address = address / nand->page_size;
 618
 619                 nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
 620
 621                 memcpy(data, page, thisrun_size);
 622
 623                 address += thisrun_size;
 624                 data += thisrun_size;
 625                 data_size -= thisrun_size;
 626         }
 627
 628         free(page);
 629
 630         return ERROR_OK;
 631 }
 632
 633 static int nand_write_plain(struct nand_device *nand,
 634         uint32_t address,
 635         uint8_t *data,
 636         uint32_t data_size)
 637 {
 638         uint8_t *page;
 639
 640         if (!nand->device)
 641                 return ERROR_NAND_DEVICE_NOT_PROBED;
 642
 643         if (address % nand->page_size) {
 644                 LOG_ERROR("writes need to be page aligned");
 645                 return ERROR_NAND_OPERATION_FAILED;
 646         }
 647
 648         page = malloc(nand->page_size);
 649
 650         while (data_size > 0) {
 651                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 652                 uint32_t page_address;
 653
 654                 memset(page, 0xff, nand->page_size);
 655                 memcpy(page, data, thisrun_size);
 656
 657                 page_address = address / nand->page_size;
 658
 659                 nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
 660
 661                 address += thisrun_size;
 662                 data += thisrun_size;
 663                 data_size -= thisrun_size;
 664         }
 665
 666         free(page);
 667
 668         return ERROR_OK;
 669 }
 670 #endif
 671
 672 int nand_write_page(struct nand_device *nand, uint32_t page,
 673         uint8_t *data, uint32_t data_size,
 674         uint8_t *oob, uint32_t oob_size)
 675 {
 676         uint32_t block;
 677
 678         if (!nand->device)
 679                 return ERROR_NAND_DEVICE_NOT_PROBED;
 680
 681         block = page / (nand->erase_size / nand->page_size);
 682         if (nand->blocks[block].is_erased == 1)
 683                 nand->blocks[block].is_erased = 0;
 684
 685         if (nand->use_raw || nand->controller->write_page == NULL)
 686                 return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
 687         else
 688                 return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
 689 }
 690
 691 int nand_read_page(struct nand_device *nand, uint32_t page,
 692         uint8_t *data, uint32_t data_size,
 693         uint8_t *oob, uint32_t oob_size)
 694 {
 695         if (!nand->device)
 696                 return ERROR_NAND_DEVICE_NOT_PROBED;
 697
 698         if (nand->use_raw || nand->controller->read_page == NULL)
 699                 return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
 700         else
 701                 return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
 702 }
 703
 704 int nand_page_command(struct nand_device *nand, uint32_t page,
 705         uint8_t cmd, bool oob_only)
 706 {
 707         if (!nand->device)
 708                 return ERROR_NAND_DEVICE_NOT_PROBED;
 709
 710         if (oob_only && NAND_CMD_READ0 == cmd && nand->page_size <= 512)
 711                 cmd = NAND_CMD_READOOB;
 712
 713         nand->controller->command(nand, cmd);
 714
 715         if (nand->page_size <= 512) {
 716                 /* small page device */
 717
 718                 /* column (always 0, we start at the beginning of a page/OOB area) */
 719                 nand->controller->address(nand, 0x0);
 720
 721                 /* row */
 722                 nand->controller->address(nand, page & 0xff);
 723                 nand->controller->address(nand, (page >> 8) & 0xff);
 724
 725                 /* 4th cycle only on devices with more than 32 MiB */
 726                 if (nand->address_cycles >= 4)
 727                         nand->controller->address(nand, (page >> 16) & 0xff);
 728
 729                 /* 5th cycle only on devices with more than 8 GiB */
 730                 if (nand->address_cycles >= 5)
 731                         nand->controller->address(nand, (page >> 24) & 0xff);
 732         } else {
 733                 /* large page device */
 734
 735                 /* column (0 when we start at the beginning of a page,
 736                  * or 2048 for the beginning of OOB area)
 737                  */
 738                 nand->controller->address(nand, 0x0);
 739                 if (oob_only)
 740                         nand->controller->address(nand, 0x8);
 741                 else
 742                         nand->controller->address(nand, 0x0);
 743
 744                 /* row */
 745                 nand->controller->address(nand, page & 0xff);
 746                 nand->controller->address(nand, (page >> 8) & 0xff);
 747
 748                 /* 5th cycle only on devices with more than 128 MiB */
 749                 if (nand->address_cycles >= 5)
 750                         nand->controller->address(nand, (page >> 16) & 0xff);
 751
 752                 /* large page devices need a start command if reading */
 753                 if (cmd == NAND_CMD_READ0)
 754                         nand->controller->command(nand, NAND_CMD_READSTART);
 755         }
 756
 757         if (nand->controller->nand_ready) {
 758                 if (!nand->controller->nand_ready(nand, 100))
 759                         return ERROR_NAND_OPERATION_TIMEOUT;
 760         } else {
 761                 /* nand_poll_read() cannot be used during nand read */
 762                 alive_sleep(1);
 763         }
 764
 765         return ERROR_OK;
 766 }
 767
 768 int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
 769 {
 770         int retval = ERROR_NAND_NO_BUFFER;
 771
 772         if (nand->controller->read_block_data != NULL)
 773                 retval = (nand->controller->read_block_data)(nand, data, size);
 774
 775         if (retval == ERROR_NAND_NO_BUFFER) {
 776                 uint32_t i;
 777                 int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1;
 778
 779                 retval = ERROR_OK;
 780                 for (i = 0; retval == ERROR_OK && i < size; i += incr) {
 781                         retval = nand->controller->read_data(nand, data);
 782                         data += incr;
 783                 }
 784         }
 785
 786         return retval;
 787 }
 788
 789 int nand_read_page_raw(struct nand_device *nand, uint32_t page,
 790         uint8_t *data, uint32_t data_size,
 791         uint8_t *oob, uint32_t oob_size)
 792 {
 793         int retval;
 794
 795         retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
 796         if (retval != ERROR_OK)
 797                 return retval;
 798
 799         if (data)
 800                 nand_read_data_page(nand, data, data_size);
 801
 802         if (oob)
 803                 nand_read_data_page(nand, oob, oob_size);
 804
 805         return ERROR_OK;
 806 }
 807
 808 int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
 809 {
 810         int retval = ERROR_NAND_NO_BUFFER;
 811
 812         if (nand->controller->write_block_data != NULL)
 813                 retval = (nand->controller->write_block_data)(nand, data, size);
 814
 815         if (retval == ERROR_NAND_NO_BUFFER) {
 816                 bool is16bit = nand->device->options & NAND_BUSWIDTH_16;
 817                 uint32_t incr = is16bit ? 2 : 1;
 818                 uint16_t write_data;
 819                 uint32_t i;
 820
 821                 for (i = 0; i < size; i += incr) {
 822                         if (is16bit)
 823                                 write_data = le_to_h_u16(data);
 824                         else
 825                                 write_data = *data;
 826
 827                         retval = nand->controller->write_data(nand, write_data);
 828                         if (retval != ERROR_OK)
 829                                 break;
 830
 831                         data += incr;
 832                 }
 833         }
 834
 835         return retval;
 836 }
 837
 838 int nand_write_finish(struct nand_device *nand)
 839 {
 840         int retval;
 841         uint8_t status;
 842
 843         nand->controller->command(nand, NAND_CMD_PAGEPROG);
 844
 845         retval = nand->controller->nand_ready ?
 846                 nand->controller->nand_ready(nand, 100) :
 847                 nand_poll_ready(nand, 100);
 848         if (!retval)
 849                 return ERROR_NAND_OPERATION_TIMEOUT;
 850
 851         retval = nand_read_status(nand, &status);
 852         if (retval != ERROR_OK) {
 853                 LOG_ERROR("couldn't read status");
 854                 return ERROR_NAND_OPERATION_FAILED;
 855         }
 856
 857         if (status & NAND_STATUS_FAIL) {
 858                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
 859                         status);
 860                 return ERROR_NAND_OPERATION_FAILED;
 861         }
 862
 863         return ERROR_OK;
 864 }
 865
 866 int nand_write_page_raw(struct nand_device *nand, uint32_t page,
 867         uint8_t *data, uint32_t data_size,
 868         uint8_t *oob, uint32_t oob_size)
 869 {
 870         int retval;
 871
 872         retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
 873         if (retval != ERROR_OK)
 874                 return retval;
 875
 876         if (data) {
 877                 retval = nand_write_data_page(nand, data, data_size);
 878                 if (retval != ERROR_OK) {
 879                         LOG_ERROR("Unable to write data to NAND device");
 880                         return retval;
 881                 }
 882         }
 883
 884         if (oob) {
 885                 retval = nand_write_data_page(nand, oob, oob_size);
 886                 if (retval != ERROR_OK) {
 887                         LOG_ERROR("Unable to write OOB data to NAND device");
 888                         return retval;
 889                 }
 890         }
 891
 892         return nand_write_finish(nand);
 893 }