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   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de>              *
   3  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
   4  *   Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net>             *
   5  *                                                                         *
   6  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  20  ***************************************************************************/
  21
  22 #ifdef HAVE_CONFIG_H
  23 #include "config.h"
  24 #endif
  25
  26 #include "imp.h"
  27
  28 /* configured NAND devices and NAND Flash command handler */
  29 struct nand_device *nand_devices;
  30
  31 void nand_device_add(struct nand_device *c)
  32 {
  33         if (nand_devices) {
  34                 struct nand_device *p = nand_devices;
  35                 while (p && p->next)
  36                         p = p->next;
  37                 p->next = c;
  38         } else
  39                 nand_devices = c;
  40 }
  41
  42
  43 /*      Chip ID list
  44  *
  45  *      Manufacturer, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  46  *      options, name
  47  *
  48  *      Pagesize; 0, 256, 512
  49  *      0       get this information from the extended chip ID
  50  *      256     256 Byte page size
  51  *      512     512 Byte page size
  52  */
  53 static struct nand_info nand_flash_ids[] = {
  54         /* Vendor Specific Entries */
  55         { NAND_MFR_SAMSUNG,     0xD5, 8192, 2048, 0x100000, LP_OPTIONS,
  56           "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
  57         { NAND_MFR_SAMSUNG,     0xD7, 8192, 4096, 0x100000, LP_OPTIONS,
  58           "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"},
  59
  60         /* start "museum" IDs */
  61         { 0x0,                  0x6e, 256, 1, 0x1000, 0,                "NAND 1MiB 5V 8-bit"},
  62         { 0x0,                  0x64, 256, 2, 0x1000, 0,                "NAND 2MiB 5V 8-bit"},
  63         { 0x0,                  0x6b, 512, 4, 0x2000, 0,                "NAND 4MiB 5V 8-bit"},
  64         { 0x0,                  0xe8, 256, 1, 0x1000, 0,                "NAND 1MiB 3.3V 8-bit"},
  65         { 0x0,                  0xec, 256, 1, 0x1000, 0,                "NAND 1MiB 3.3V 8-bit"},
  66         { 0x0,                  0xea, 256, 2, 0x1000, 0,                "NAND 2MiB 3.3V 8-bit"},
  67         { 0x0,                  0xd5, 512, 4, 0x2000, 0,                "NAND 4MiB 3.3V 8-bit"},
  68         { 0x0,                  0xe3, 512, 4, 0x2000, 0,                "NAND 4MiB 3.3V 8-bit"},
  69         { 0x0,                  0xe5, 512, 4, 0x2000, 0,                "NAND 4MiB 3.3V 8-bit"},
  70         { 0x0,                  0xd6, 512, 8, 0x2000, 0,                "NAND 8MiB 3.3V 8-bit"},
  71
  72         { 0x0,                  0x39, 512, 8, 0x2000, 0,                "NAND 8MiB 1.8V 8-bit"},
  73         { 0x0,                  0xe6, 512, 8, 0x2000, 0,                "NAND 8MiB 3.3V 8-bit"},
  74         { 0x0,                  0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
  75         { 0x0,                  0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
  76         /* end "museum" IDs */
  77
  78         { 0x0,                  0x33, 512, 16, 0x4000, 0,               "NAND 16MiB 1.8V 8-bit"},
  79         { 0x0,                  0x73, 512, 16, 0x4000, 0,               "NAND 16MiB 3.3V 8-bit"},
  80         { 0x0,                  0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 1.8V 16-bit"},
  81         { 0x0,                  0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 3.3V 16-bit"},
  82
  83         { 0x0,                  0x35, 512, 32, 0x4000, 0,               "NAND 32MiB 1.8V 8-bit"},
  84         { 0x0,                  0x75, 512, 32, 0x4000, 0,               "NAND 32MiB 3.3V 8-bit"},
  85         { 0x0,                  0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 1.8V 16-bit"},
  86         { 0x0,                  0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 3.3V 16-bit"},
  87
  88         { 0x0,                  0x36, 512, 64, 0x4000, 0,               "NAND 64MiB 1.8V 8-bit"},
  89         { 0x0,                  0x76, 512, 64, 0x4000, 0,               "NAND 64MiB 3.3V 8-bit"},
  90         { 0x0,                  0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 1.8V 16-bit"},
  91         { 0x0,                  0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 3.3V 16-bit"},
  92
  93         { 0x0,                  0x78, 512, 128, 0x4000, 0,              "NAND 128MiB 1.8V 8-bit"},
  94         { 0x0,                  0x39, 512, 128, 0x4000, 0,              "NAND 128MiB 1.8V 8-bit"},
  95         { 0x0,                  0x79, 512, 128, 0x4000, 0,              "NAND 128MiB 3.3V 8-bit"},
  96         { 0x0,                  0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
  97         { 0x0,                  0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
  98         { 0x0,                  0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
  99         { 0x0,                  0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
 100
 101         { 0x0,                  0x71, 512, 256, 0x4000, 0,              "NAND 256MiB 3.3V 8-bit"},
 102
 103         { 0x0,                  0xA2, 0,  64, 0, LP_OPTIONS,            "NAND 64MiB 1.8V 8-bit"},
 104         { 0x0,                  0xF2, 0,  64, 0, LP_OPTIONS,            "NAND 64MiB 3.3V 8-bit"},
 105         { 0x0,                  0xB2, 0,  64, 0, LP_OPTIONS16,          "NAND 64MiB 1.8V 16-bit"},
 106         { 0x0,                  0xC2, 0,  64, 0, LP_OPTIONS16,          "NAND 64MiB 3.3V 16-bit"},
 107
 108         { 0x0,                  0xA1, 0, 128, 0, LP_OPTIONS,            "NAND 128MiB 1.8V 8-bit"},
 109         { 0x0,                  0xF1, 0, 128, 0, LP_OPTIONS,            "NAND 128MiB 3.3V 8-bit"},
 110         { 0x0,                  0xB1, 0, 128, 0, LP_OPTIONS16,          "NAND 128MiB 1.8V 16-bit"},
 111         { 0x0,                  0xC1, 0, 128, 0, LP_OPTIONS16,          "NAND 128MiB 3.3V 16-bit"},
 112
 113         { 0x0,                  0xAA, 0, 256, 0, LP_OPTIONS,            "NAND 256MiB 1.8V 8-bit"},
 114         { 0x0,                  0xDA, 0, 256, 0, LP_OPTIONS,            "NAND 256MiB 3.3V 8-bit"},
 115         { 0x0,                  0xBA, 0, 256, 0, LP_OPTIONS16,          "NAND 256MiB 1.8V 16-bit"},
 116         { 0x0,                  0xCA, 0, 256, 0, LP_OPTIONS16,          "NAND 256MiB 3.3V 16-bit"},
 117
 118         { 0x0,                  0xAC, 0, 512, 0, LP_OPTIONS,            "NAND 512MiB 1.8V 8-bit"},
 119         { 0x0,                  0xDC, 0, 512, 0, LP_OPTIONS,            "NAND 512MiB 3.3V 8-bit"},
 120         { 0x0,                  0xBC, 0, 512, 0, LP_OPTIONS16,          "NAND 512MiB 1.8V 16-bit"},
 121         { 0x0,                  0xCC, 0, 512, 0, LP_OPTIONS16,          "NAND 512MiB 3.3V 16-bit"},
 122
 123         { 0x0,                  0xA3, 0, 1024, 0, LP_OPTIONS,           "NAND 1GiB 1.8V 8-bit"},
 124         { 0x0,                  0xD3, 0, 1024, 0, LP_OPTIONS,           "NAND 1GiB 3.3V 8-bit"},
 125         { 0x0,                  0xB3, 0, 1024, 0, LP_OPTIONS16,         "NAND 1GiB 1.8V 16-bit"},
 126         { 0x0,                  0xC3, 0, 1024, 0, LP_OPTIONS16,         "NAND 1GiB 3.3V 16-bit"},
 127
 128         { 0x0,                  0xA5, 0, 2048, 0, LP_OPTIONS,           "NAND 2GiB 1.8V 8-bit"},
 129         { 0x0,                  0xD5, 0, 8192, 0, LP_OPTIONS,           "NAND 2GiB 3.3V 8-bit"},
 130         { 0x0,                  0xB5, 0, 2048, 0, LP_OPTIONS16,         "NAND 2GiB 1.8V 16-bit"},
 131         { 0x0,                  0xC5, 0, 2048, 0, LP_OPTIONS16,         "NAND 2GiB 3.3V 16-bit"},
 132
 133         { 0x0,                  0x48, 0, 2048, 0, LP_OPTIONS,           "NAND 2GiB 3.3V 8-bit"},
 134
 135         {0, 0, 0, 0, 0, 0, NULL}
 136 };
 137
 138 /* Manufacturer ID list
 139  */
 140 static struct nand_manufacturer nand_manuf_ids[] = {
 141         {0x0, "unknown"},
 142         {NAND_MFR_TOSHIBA, "Toshiba"},
 143         {NAND_MFR_SAMSUNG, "Samsung"},
 144         {NAND_MFR_FUJITSU, "Fujitsu"},
 145         {NAND_MFR_NATIONAL, "National"},
 146         {NAND_MFR_RENESAS, "Renesas"},
 147         {NAND_MFR_STMICRO, "ST Micro"},
 148         {NAND_MFR_HYNIX, "Hynix"},
 149         {NAND_MFR_MICRON, "Micron"},
 150         {0x0, NULL},
 151 };
 152
 153 /*
 154  * Define default oob placement schemes for large and small page devices
 155  */
 156
 157 #if 0
 158 static struct nand_ecclayout nand_oob_8 = {
 159         .eccbytes = 3,
 160         .eccpos = {0, 1, 2},
 161         .oobfree = {
 162                 {.offset = 3,
 163                  .length = 2},
 164                 {.offset = 6,
 165                  .length = 2}
 166         }
 167 };
 168 #endif
 169
 170 /**
 171  * Returns the flash bank specified by @a name, which matches the
 172  * driver name and a suffix (option) specify the driver-specific
 173  * bank number. The suffix consists of the '.' and the driver-specific
 174  * bank number: when two davinci banks are defined, then 'davinci.1' refers
 175  * to the second (e.g. DM355EVM).
 176  */
 177 static struct nand_device *get_nand_device_by_name(const char *name)
 178 {
 179         unsigned requested = get_flash_name_index(name);
 180         unsigned found = 0;
 181
 182         struct nand_device *nand;
 183         for (nand = nand_devices; NULL != nand; nand = nand->next) {
 184                 if (strcmp(nand->name, name) == 0)
 185                         return nand;
 186                 if (!flash_driver_name_matches(nand->controller->name, name))
 187                         continue;
 188                 if (++found < requested)
 189                         continue;
 190                 return nand;
 191         }
 192         return NULL;
 193 }
 194
 195 struct nand_device *get_nand_device_by_num(int num)
 196 {
 197         struct nand_device *p;
 198         int i = 0;
 199
 200         for (p = nand_devices; p; p = p->next) {
 201                 if (i++ == num)
 202                         return p;
 203         }
 204
 205         return NULL;
 206 }
 207
 208 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 209         struct nand_device **nand)
 210 {
 211         const char *str = CMD_ARGV[name_index];
 212         *nand = get_nand_device_by_name(str);
 213         if (*nand)
 214                 return ERROR_OK;
 215
 216         unsigned num;
 217         COMMAND_PARSE_NUMBER(uint, str, num);
 218         *nand = get_nand_device_by_num(num);
 219         if (!*nand) {
 220                 command_print(CMD_CTX, "NAND flash device '%s' not found", str);
 221                 return ERROR_COMMAND_SYNTAX_ERROR;
 222         }
 223         return ERROR_OK;
 224 }
 225
 226 int nand_build_bbt(struct nand_device *nand, int first, int last)
 227 {
 228         uint32_t page;
 229         int i;
 230         int pages_per_block = (nand->erase_size / nand->page_size);
 231         uint8_t oob[6];
 232         int ret;
 233
 234         if ((first < 0) || (first >= nand->num_blocks))
 235                 first = 0;
 236
 237         if ((last >= nand->num_blocks) || (last == -1))
 238                 last = nand->num_blocks - 1;
 239
 240         page = first * pages_per_block;
 241         for (i = first; i <= last; i++) {
 242                 ret = nand_read_page(nand, page, NULL, 0, oob, 6);
 243                 if (ret != ERROR_OK)
 244                         return ret;
 245
 246                 if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 247                                 || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
 248                                 ((nand->page_size == 2048) && (oob[0] != 0xff)))) {
 249                         LOG_WARNING("bad block: %i", i);
 250                         nand->blocks[i].is_bad = 1;
 251                 } else
 252                         nand->blocks[i].is_bad = 0;
 253
 254                 page += pages_per_block;
 255         }
 256
 257         return ERROR_OK;
 258 }
 259
 260 int nand_read_status(struct nand_device *nand, uint8_t *status)
 261 {
 262         if (!nand->device)
 263                 return ERROR_NAND_DEVICE_NOT_PROBED;
 264
 265         /* Send read status command */
 266         nand->controller->command(nand, NAND_CMD_STATUS);
 267
 268         alive_sleep(1);
 269
 270         /* read status */
 271         if (nand->device->options & NAND_BUSWIDTH_16) {
 272                 uint16_t data;
 273                 nand->controller->read_data(nand, &data);
 274                 *status = data & 0xff;
 275         } else
 276                 nand->controller->read_data(nand, status);
 277
 278         return ERROR_OK;
 279 }
 280
 281 static int nand_poll_ready(struct nand_device *nand, int timeout)
 282 {
 283         uint8_t status;
 284
 285         nand->controller->command(nand, NAND_CMD_STATUS);
 286         do {
 287                 if (nand->device->options & NAND_BUSWIDTH_16) {
 288                         uint16_t data;
 289                         nand->controller->read_data(nand, &data);
 290                         status = data & 0xff;
 291                 } else
 292                         nand->controller->read_data(nand, &status);
 293                 if (status & NAND_STATUS_READY)
 294                         break;
 295                 alive_sleep(1);
 296         } while (timeout--);
 297
 298         return (status & NAND_STATUS_READY) != 0;
 299 }
 300
 301 int nand_probe(struct nand_device *nand)
 302 {
 303         uint8_t manufacturer_id, device_id;
 304         uint8_t id_buff[6];
 305         int retval;
 306         int i;
 307
 308         /* clear device data */
 309         nand->device = NULL;
 310         nand->manufacturer = NULL;
 311
 312         /* clear device parameters */
 313         nand->bus_width = 0;
 314         nand->address_cycles = 0;
 315         nand->page_size = 0;
 316         nand->erase_size = 0;
 317
 318         /* initialize controller (device parameters are zero, use controller default) */
 319         retval = nand->controller->init(nand);
 320         if (retval != ERROR_OK) {
 321                 switch (retval) {
 322                         case ERROR_NAND_OPERATION_FAILED:
 323                                 LOG_DEBUG("controller initialization failed");
 324                                 return ERROR_NAND_OPERATION_FAILED;
 325                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 326                                 LOG_ERROR(
 327                                 "BUG: controller reported that it doesn't support default parameters");
 328                                 return ERROR_NAND_OPERATION_FAILED;
 329                         default:
 330                                 LOG_ERROR("BUG: unknown controller initialization failure");
 331                                 return ERROR_NAND_OPERATION_FAILED;
 332                 }
 333         }
 334
 335         nand->controller->command(nand, NAND_CMD_RESET);
 336         nand->controller->reset(nand);
 337
 338         nand->controller->command(nand, NAND_CMD_READID);
 339         nand->controller->address(nand, 0x0);
 340
 341         if (nand->bus_width == 8) {
 342                 nand->controller->read_data(nand, &manufacturer_id);
 343                 nand->controller->read_data(nand, &device_id);
 344         } else {
 345                 uint16_t data_buf;
 346                 nand->controller->read_data(nand, &data_buf);
 347                 manufacturer_id = data_buf & 0xff;
 348                 nand->controller->read_data(nand, &data_buf);
 349                 device_id = data_buf & 0xff;
 350         }
 351
 352         for (i = 0; nand_flash_ids[i].name; i++) {
 353                 if (nand_flash_ids[i].id == device_id &&
 354                                 (nand_flash_ids[i].mfr_id == manufacturer_id ||
 355                                 nand_flash_ids[i].mfr_id == 0)) {
 356                         nand->device = &nand_flash_ids[i];
 357                         break;
 358                 }
 359         }
 360
 361         for (i = 0; nand_manuf_ids[i].name; i++) {
 362                 if (nand_manuf_ids[i].id == manufacturer_id) {
 363                         nand->manufacturer = &nand_manuf_ids[i];
 364                         break;
 365                 }
 366         }
 367
 368         if (!nand->manufacturer) {
 369                 nand->manufacturer = &nand_manuf_ids[0];
 370                 nand->manufacturer->id = manufacturer_id;
 371         }
 372
 373         if (!nand->device) {
 374                 LOG_ERROR(
 375                         "unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 376                         manufacturer_id,
 377                         device_id);
 378                 return ERROR_NAND_OPERATION_FAILED;
 379         }
 380
 381         LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
 382
 383         /* initialize device parameters */
 384
 385         /* bus width */
 386         if (nand->device->options & NAND_BUSWIDTH_16)
 387                 nand->bus_width = 16;
 388         else
 389                 nand->bus_width = 8;
 390
 391         /* Do we need extended device probe information? */
 392         if (nand->device->page_size == 0 ||
 393                         nand->device->erase_size == 0) {
 394                 if (nand->bus_width == 8) {
 395                         nand->controller->read_data(nand, id_buff + 3);
 396                         nand->controller->read_data(nand, id_buff + 4);
 397                         nand->controller->read_data(nand, id_buff + 5);
 398                 } else {
 399                         uint16_t data_buf;
 400
 401                         nand->controller->read_data(nand, &data_buf);
 402                         id_buff[3] = data_buf;
 403
 404                         nand->controller->read_data(nand, &data_buf);
 405                         id_buff[4] = data_buf;
 406
 407                         nand->controller->read_data(nand, &data_buf);
 408                         id_buff[5] = data_buf >> 8;
 409                 }
 410         }
 411
 412         /* page size */
 413         if (nand->device->page_size == 0)
 414                 nand->page_size = 1 << (10 + (id_buff[4] & 3));
 415         else if (nand->device->page_size == 256) {
 416                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
 417                 return ERROR_NAND_OPERATION_FAILED;
 418         } else
 419                 nand->page_size = nand->device->page_size;
 420
 421         /* number of address cycles */
 422         if (nand->page_size <= 512) {
 423                 /* small page devices */
 424                 if (nand->device->chip_size <= 32)
 425                         nand->address_cycles = 3;
 426                 else if (nand->device->chip_size <= 8*1024)
 427                         nand->address_cycles = 4;
 428                 else {
 429                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 430                         nand->address_cycles = 5;
 431                 }
 432         } else {
 433                 /* large page devices */
 434                 if (nand->device->chip_size <= 128)
 435                         nand->address_cycles = 4;
 436                 else if (nand->device->chip_size <= 32*1024)
 437                         nand->address_cycles = 5;
 438                 else {
 439                         LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 440                         nand->address_cycles = 6;
 441                 }
 442         }
 443
 444         /* erase size */
 445         if (nand->device->erase_size == 0) {
 446                 switch ((id_buff[4] >> 4) & 3) {
 447                         case 0:
 448                                 nand->erase_size = 64 << 10;
 449                                 break;
 450                         case 1:
 451                                 nand->erase_size = 128 << 10;
 452                                 break;
 453                         case 2:
 454                                 nand->erase_size = 256 << 10;
 455                                 break;
 456                         case 3:
 457                                 nand->erase_size = 512 << 10;
 458                                 break;
 459                 }
 460         } else
 461                 nand->erase_size = nand->device->erase_size;
 462
 463         /* initialize controller, but leave parameters at the controllers default */
 464         retval = nand->controller->init(nand);
 465         if (retval != ERROR_OK) {
 466                 switch (retval) {
 467                         case ERROR_NAND_OPERATION_FAILED:
 468                                 LOG_DEBUG("controller initialization failed");
 469                                 return ERROR_NAND_OPERATION_FAILED;
 470                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 471                                 LOG_ERROR(
 472                                 "controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 473                                 nand->bus_width,
 474                                 nand->address_cycles,
 475                                 nand->page_size);
 476                                 return ERROR_NAND_OPERATION_FAILED;
 477                         default:
 478                                 LOG_ERROR("BUG: unknown controller initialization failure");
 479                                 return ERROR_NAND_OPERATION_FAILED;
 480                 }
 481         }
 482
 483         nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
 484         nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
 485
 486         for (i = 0; i < nand->num_blocks; i++) {
 487                 nand->blocks[i].size = nand->erase_size;
 488                 nand->blocks[i].offset = i * nand->erase_size;
 489                 nand->blocks[i].is_erased = -1;
 490                 nand->blocks[i].is_bad = -1;
 491         }
 492
 493         return ERROR_OK;
 494 }
 495
 496 int nand_erase(struct nand_device *nand, int first_block, int last_block)
 497 {
 498         int i;
 499         uint32_t page;
 500         uint8_t status;
 501         int retval;
 502
 503         if (!nand->device)
 504                 return ERROR_NAND_DEVICE_NOT_PROBED;
 505
 506         if ((first_block < 0) || (last_block >= nand->num_blocks))
 507                 return ERROR_COMMAND_SYNTAX_ERROR;
 508
 509         /* make sure we know if a block is bad before erasing it */
 510         for (i = first_block; i <= last_block; i++) {
 511                 if (nand->blocks[i].is_bad == -1) {
 512                         nand_build_bbt(nand, i, last_block);
 513                         break;
 514                 }
 515         }
 516
 517         for (i = first_block; i <= last_block; i++) {
 518                 /* Send erase setup command */
 519                 nand->controller->command(nand, NAND_CMD_ERASE1);
 520
 521                 page = i * (nand->erase_size / nand->page_size);
 522
 523                 /* Send page address */
 524                 if (nand->page_size <= 512) {
 525                         /* row */
 526                         nand->controller->address(nand, page & 0xff);
 527                         nand->controller->address(nand, (page >> 8) & 0xff);
 528
 529                         /* 3rd cycle only on devices with more than 32 MiB */
 530                         if (nand->address_cycles >= 4)
 531                                 nand->controller->address(nand, (page >> 16) & 0xff);
 532
 533                         /* 4th cycle only on devices with more than 8 GiB */
 534                         if (nand->address_cycles >= 5)
 535                                 nand->controller->address(nand, (page >> 24) & 0xff);
 536                 } else {
 537                         /* row */
 538                         nand->controller->address(nand, page & 0xff);
 539                         nand->controller->address(nand, (page >> 8) & 0xff);
 540
 541                         /* 3rd cycle only on devices with more than 128 MiB */
 542                         if (nand->address_cycles >= 5)
 543                                 nand->controller->address(nand, (page >> 16) & 0xff);
 544                 }
 545
 546                 /* Send erase confirm command */
 547                 nand->controller->command(nand, NAND_CMD_ERASE2);
 548
 549                 retval = nand->controller->nand_ready ?
 550                         nand->controller->nand_ready(nand, 1000) :
 551                         nand_poll_ready(nand, 1000);
 552                 if (!retval) {
 553                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 554                         return ERROR_NAND_OPERATION_TIMEOUT;
 555                 }
 556
 557                 retval = nand_read_status(nand, &status);
 558                 if (retval != ERROR_OK) {
 559                         LOG_ERROR("couldn't read status");
 560                         return ERROR_NAND_OPERATION_FAILED;
 561                 }
 562
 563                 if (status & 0x1) {
 564                         LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
 565                                 (nand->blocks[i].is_bad == 1)
 566                                 ? "bad " : "",
 567                                 i, status);
 568                         /* continue; other blocks might still be erasable */
 569                 }
 570
 571                 nand->blocks[i].is_erased = 1;
 572         }
 573
 574         return ERROR_OK;
 575 }
 576
 577 #if 0
 578 static int nand_read_plain(struct nand_device *nand,
 579         uint32_t address,
 580         uint8_t *data,
 581         uint32_t data_size)
 582 {
 583         uint8_t *page;
 584
 585         if (!nand->device)
 586                 return ERROR_NAND_DEVICE_NOT_PROBED;
 587
 588         if (address % nand->page_size) {
 589                 LOG_ERROR("reads need to be page aligned");
 590                 return ERROR_NAND_OPERATION_FAILED;
 591         }
 592
 593         page = malloc(nand->page_size);
 594
 595         while (data_size > 0) {
 596                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 597                 uint32_t page_address;
 598
 599
 600                 page_address = address / nand->page_size;
 601
 602                 nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
 603
 604                 memcpy(data, page, thisrun_size);
 605
 606                 address += thisrun_size;
 607                 data += thisrun_size;
 608                 data_size -= thisrun_size;
 609         }
 610
 611         free(page);
 612
 613         return ERROR_OK;
 614 }
 615
 616 static int nand_write_plain(struct nand_device *nand,
 617         uint32_t address,
 618         uint8_t *data,
 619         uint32_t data_size)
 620 {
 621         uint8_t *page;
 622
 623         if (!nand->device)
 624                 return ERROR_NAND_DEVICE_NOT_PROBED;
 625
 626         if (address % nand->page_size) {
 627                 LOG_ERROR("writes need to be page aligned");
 628                 return ERROR_NAND_OPERATION_FAILED;
 629         }
 630
 631         page = malloc(nand->page_size);
 632
 633         while (data_size > 0) {
 634                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 635                 uint32_t page_address;
 636
 637                 memset(page, 0xff, nand->page_size);
 638                 memcpy(page, data, thisrun_size);
 639
 640                 page_address = address / nand->page_size;
 641
 642                 nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
 643
 644                 address += thisrun_size;
 645                 data += thisrun_size;
 646                 data_size -= thisrun_size;
 647         }
 648
 649         free(page);
 650
 651         return ERROR_OK;
 652 }
 653 #endif
 654
 655 int nand_write_page(struct nand_device *nand, uint32_t page,
 656         uint8_t *data, uint32_t data_size,
 657         uint8_t *oob, uint32_t oob_size)
 658 {
 659         uint32_t block;
 660
 661         if (!nand->device)
 662                 return ERROR_NAND_DEVICE_NOT_PROBED;
 663
 664         block = page / (nand->erase_size / nand->page_size);
 665         if (nand->blocks[block].is_erased == 1)
 666                 nand->blocks[block].is_erased = 0;
 667
 668         if (nand->use_raw || nand->controller->write_page == NULL)
 669                 return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
 670         else
 671                 return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
 672 }
 673
 674 int nand_read_page(struct nand_device *nand, uint32_t page,
 675         uint8_t *data, uint32_t data_size,
 676         uint8_t *oob, uint32_t oob_size)
 677 {
 678         if (!nand->device)
 679                 return ERROR_NAND_DEVICE_NOT_PROBED;
 680
 681         if (nand->use_raw || nand->controller->read_page == NULL)
 682                 return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
 683         else
 684                 return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
 685 }
 686
 687 int nand_page_command(struct nand_device *nand, uint32_t page,
 688         uint8_t cmd, bool oob_only)
 689 {
 690         if (!nand->device)
 691                 return ERROR_NAND_DEVICE_NOT_PROBED;
 692
 693         if (oob_only && NAND_CMD_READ0 == cmd && nand->page_size <= 512)
 694                 cmd = NAND_CMD_READOOB;
 695
 696         nand->controller->command(nand, cmd);
 697
 698         if (nand->page_size <= 512) {
 699                 /* small page device */
 700
 701                 /* column (always 0, we start at the beginning of a page/OOB area) */
 702                 nand->controller->address(nand, 0x0);
 703
 704                 /* row */
 705                 nand->controller->address(nand, page & 0xff);
 706                 nand->controller->address(nand, (page >> 8) & 0xff);
 707
 708                 /* 4th cycle only on devices with more than 32 MiB */
 709                 if (nand->address_cycles >= 4)
 710                         nand->controller->address(nand, (page >> 16) & 0xff);
 711
 712                 /* 5th cycle only on devices with more than 8 GiB */
 713                 if (nand->address_cycles >= 5)
 714                         nand->controller->address(nand, (page >> 24) & 0xff);
 715         } else {
 716                 /* large page device */
 717
 718                 /* column (0 when we start at the beginning of a page,
 719                  * or 2048 for the beginning of OOB area)
 720                  */
 721                 nand->controller->address(nand, 0x0);
 722                 if (oob_only)
 723                         nand->controller->address(nand, 0x8);
 724                 else
 725                         nand->controller->address(nand, 0x0);
 726
 727                 /* row */
 728                 nand->controller->address(nand, page & 0xff);
 729                 nand->controller->address(nand, (page >> 8) & 0xff);
 730
 731                 /* 5th cycle only on devices with more than 128 MiB */
 732                 if (nand->address_cycles >= 5)
 733                         nand->controller->address(nand, (page >> 16) & 0xff);
 734
 735                 /* large page devices need a start command if reading */
 736                 if (NAND_CMD_READ0 == cmd)
 737                         nand->controller->command(nand, NAND_CMD_READSTART);
 738         }
 739
 740         if (nand->controller->nand_ready) {
 741                 if (!nand->controller->nand_ready(nand, 100))
 742                         return ERROR_NAND_OPERATION_TIMEOUT;
 743         } else {
 744                 /* nand_poll_read() cannot be used during nand read */
 745                 alive_sleep(1);
 746         }
 747
 748         return ERROR_OK;
 749 }
 750
 751 int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
 752 {
 753         int retval = ERROR_NAND_NO_BUFFER;
 754
 755         if (nand->controller->read_block_data != NULL)
 756                 retval = (nand->controller->read_block_data)(nand, data, size);
 757
 758         if (ERROR_NAND_NO_BUFFER == retval) {
 759                 uint32_t i;
 760                 int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1;
 761
 762                 retval = ERROR_OK;
 763                 for (i = 0; retval == ERROR_OK && i < size; i += incr) {
 764                         retval = nand->controller->read_data(nand, data);
 765                         data += incr;
 766                 }
 767         }
 768
 769         return retval;
 770 }
 771
 772 int nand_read_page_raw(struct nand_device *nand, uint32_t page,
 773         uint8_t *data, uint32_t data_size,
 774         uint8_t *oob, uint32_t oob_size)
 775 {
 776         int retval;
 777
 778         retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
 779         if (ERROR_OK != retval)
 780                 return retval;
 781
 782         if (data)
 783                 nand_read_data_page(nand, data, data_size);
 784
 785         if (oob)
 786                 nand_read_data_page(nand, oob, oob_size);
 787
 788         return ERROR_OK;
 789 }
 790
 791 int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
 792 {
 793         int retval = ERROR_NAND_NO_BUFFER;
 794
 795         if (nand->controller->write_block_data != NULL)
 796                 retval = (nand->controller->write_block_data)(nand, data, size);
 797
 798         if (ERROR_NAND_NO_BUFFER == retval) {
 799                 bool is16bit = nand->device->options & NAND_BUSWIDTH_16;
 800                 uint32_t incr = is16bit ? 2 : 1;
 801                 uint16_t write_data;
 802                 uint32_t i;
 803
 804                 for (i = 0; i < size; i += incr) {
 805                         if (is16bit)
 806                                 write_data = le_to_h_u16(data);
 807                         else
 808                                 write_data = *data;
 809
 810                         retval = nand->controller->write_data(nand, write_data);
 811                         if (ERROR_OK != retval)
 812                                 break;
 813
 814                         data += incr;
 815                 }
 816         }
 817
 818         return retval;
 819 }
 820
 821 int nand_write_finish(struct nand_device *nand)
 822 {
 823         int retval;
 824         uint8_t status;
 825
 826         nand->controller->command(nand, NAND_CMD_PAGEPROG);
 827
 828         retval = nand->controller->nand_ready ?
 829                 nand->controller->nand_ready(nand, 100) :
 830                 nand_poll_ready(nand, 100);
 831         if (!retval)
 832                 return ERROR_NAND_OPERATION_TIMEOUT;
 833
 834         retval = nand_read_status(nand, &status);
 835         if (ERROR_OK != retval) {
 836                 LOG_ERROR("couldn't read status");
 837                 return ERROR_NAND_OPERATION_FAILED;
 838         }
 839
 840         if (status & NAND_STATUS_FAIL) {
 841                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
 842                         status);
 843                 return ERROR_NAND_OPERATION_FAILED;
 844         }
 845
 846         return ERROR_OK;
 847 }
 848
 849 int nand_write_page_raw(struct nand_device *nand, uint32_t page,
 850         uint8_t *data, uint32_t data_size,
 851         uint8_t *oob, uint32_t oob_size)
 852 {
 853         int retval;
 854
 855         retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
 856         if (ERROR_OK != retval)
 857                 return retval;
 858
 859         if (data) {
 860                 retval = nand_write_data_page(nand, data, data_size);
 861                 if (ERROR_OK != retval) {
 862                         LOG_ERROR("Unable to write data to NAND device");
 863                         return retval;
 864                 }
 865         }
 866
 867         if (oob) {
 868                 retval = nand_write_data_page(nand, oob, oob_size);
 869                 if (ERROR_OK != retval) {
 870                         LOG_ERROR("Unable to write OOB data to NAND device");
 871                         return retval;
 872                 }
 873         }
 874
 875         return nand_write_finish(nand);
 876 }