1 /***************************************************************************
2 * Copyright (C) 2009 by *
3 * Rolf Meeser <rolfm_9dq@yahoo.de> *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
29 #include "binarybuffer.h"
36 /* Some flash constants */
37 #define FLASH_PAGE_SIZE 512 /* bytes */
38 #define FLASH_ERASE_TIME 100000 /* microseconds */
39 #define FLASH_PROGRAM_TIME 1000 /* microseconds */
41 /* Chip ID / Feature Registers */
42 #define CHIPID 0xE0000000 /* Chip ID */
43 #define FEAT0 0xE0000100 /* Chip feature 0 */
44 #define FEAT1 0xE0000104 /* Chip feature 1 */
45 #define FEAT2 0xE0000108 /* Chip feature 2 (contains flash size indicator) */
46 #define FEAT3 0xE000010C /* Chip feature 3 */
48 #define EXPECTED_CHIPID 0x209CE02B /* Chip ID of all LPC2900 devices */
50 /* Flash/EEPROM Control Registers */
51 #define FCTR 0x20200000 /* Flash control */
52 #define FPTR 0x20200008 /* Flash program-time */
53 #define FTCTR 0x2020000C /* Flash test control */
54 #define FBWST 0x20200010 /* Flash bridge wait-state */
55 #define FCRA 0x2020001C /* Flash clock divider */
56 #define FMSSTART 0x20200020 /* Flash Built-In Selft Test start address */
57 #define FMSSTOP 0x20200024 /* Flash Built-In Selft Test stop address */
58 #define FMS16 0x20200028 /* Flash 16-bit signature */
59 #define FMSW0 0x2020002C /* Flash 128-bit signature Word 0 */
60 #define FMSW1 0x20200030 /* Flash 128-bit signature Word 1 */
61 #define FMSW2 0x20200034 /* Flash 128-bit signature Word 2 */
62 #define FMSW3 0x20200038 /* Flash 128-bit signature Word 3 */
64 #define EECMD 0x20200080 /* EEPROM command */
65 #define EEADDR 0x20200084 /* EEPROM address */
66 #define EEWDATA 0x20200088 /* EEPROM write data */
67 #define EERDATA 0x2020008C /* EEPROM read data */
68 #define EEWSTATE 0x20200090 /* EEPROM wait state */
69 #define EECLKDIV 0x20200094 /* EEPROM clock divider */
70 #define EEPWRDWN 0x20200098 /* EEPROM power-down/start */
71 #define EEMSSTART 0x2020009C /* EEPROM BIST start address */
72 #define EEMSSTOP 0x202000A0 /* EEPROM BIST stop address */
73 #define EEMSSIG 0x202000A4 /* EEPROM 24-bit BIST signature */
75 #define INT_CLR_ENABLE 0x20200FD8 /* Flash/EEPROM interrupt clear enable */
76 #define INT_SET_ENABLE 0x20200FDC /* Flash/EEPROM interrupt set enable */
77 #define INT_STATUS 0x20200FE0 /* Flash/EEPROM interrupt status */
78 #define INT_ENABLE 0x20200FE4 /* Flash/EEPROM interrupt enable */
79 #define INT_CLR_STATUS 0x20200FE8 /* Flash/EEPROM interrupt clear status */
80 #define INT_SET_STATUS 0x20200FEC /* Flash/EEPROM interrupt set status */
82 /* Interrupt sources */
83 #define INTSRC_END_OF_PROG (1 << 28)
84 #define INTSRC_END_OF_BIST (1 << 27)
85 #define INTSRC_END_OF_RDWR (1 << 26)
86 #define INTSRC_END_OF_MISR (1 << 2)
87 #define INTSRC_END_OF_BURN (1 << 1)
88 #define INTSRC_END_OF_ERASE (1 << 0)
92 #define FCTR_FS_LOADREQ (1 << 15)
93 #define FCTR_FS_CACHECLR (1 << 14)
94 #define FCTR_FS_CACHEBYP (1 << 13)
95 #define FCTR_FS_PROGREQ (1 << 12)
96 #define FCTR_FS_RLS (1 << 11)
97 #define FCTR_FS_PDL (1 << 10)
98 #define FCTR_FS_PD (1 << 9)
99 #define FCTR_FS_WPB (1 << 7)
100 #define FCTR_FS_ISS (1 << 6)
101 #define FCTR_FS_RLD (1 << 5)
102 #define FCTR_FS_DCR (1 << 4)
103 #define FCTR_FS_WEB (1 << 2)
104 #define FCTR_FS_WRE (1 << 1)
105 #define FCTR_FS_CS (1 << 0)
107 #define FPTR_EN_T (1 << 15)
109 #define FTCTR_FS_BYPASS_R (1 << 29)
110 #define FTCTR_FS_BYPASS_W (1 << 28)
112 #define FMSSTOP_MISR_START (1 << 17)
114 #define EEMSSTOP_STRTBIST (1 << 31)
117 #define ISS_CUSTOMER_START1 (0x830)
118 #define ISS_CUSTOMER_END1 (0xA00)
119 #define ISS_CUSTOMER_SIZE1 (ISS_CUSTOMER_END1 - ISS_CUSTOMER_START1)
120 #define ISS_CUSTOMER_NWORDS1 (ISS_CUSTOMER_SIZE1 / 4)
121 #define ISS_CUSTOMER_START2 (0xA40)
122 #define ISS_CUSTOMER_END2 (0xC00)
123 #define ISS_CUSTOMER_SIZE2 (ISS_CUSTOMER_END2 - ISS_CUSTOMER_START2)
124 #define ISS_CUSTOMER_NWORDS2 (ISS_CUSTOMER_SIZE2 / 4)
125 #define ISS_CUSTOMER_SIZE (ISS_CUSTOMER_SIZE1 + ISS_CUSTOMER_SIZE2)
130 * Private data for \c lpc2900 flash driver.
132 typedef struct lpc2900_flash_bank_s
135 * Holds the value read from CHIPID register.
136 * The driver will not load if the chipid doesn't match the expected
137 * value of 0x209CE02B of the LPC2900 family. A probe will only be done
138 * if the chipid does not yet contain the expected value.
143 * String holding device name.
144 * This string is set by the probe function to the type number of the
145 * device. It takes the form "LPC29xx".
150 * System clock frequency.
151 * Holds the clock frequency in Hz, as passed by the configuration file
152 * to the <tt>flash bank</tt> command.
154 uint32_t clk_sys_fmc;
157 * Flag to indicate that dangerous operations are possible.
158 * This flag can be set by passing the correct password to the
159 * <tt>lpc2900 password</tt> command. If set, other dangerous commands,
160 * which operate on the index sector, can be executed.
165 * Maximum contiguous block of internal SRAM (bytes).
166 * Autodetected by the driver. Not the total amount of SRAM, only the
167 * the largest \em contiguous block!
169 uint32_t max_ram_block;
171 } lpc2900_flash_bank_t;
174 static uint32_t lpc2900_wait_status(flash_bank_t *bank, uint32_t mask, int timeout);
175 static void lpc2900_setup(struct flash_bank_s *bank);
176 static uint32_t lpc2900_is_ready(struct flash_bank_s *bank);
177 static uint32_t lpc2900_read_security_status(struct flash_bank_s *bank);
178 static uint32_t lpc2900_run_bist128(struct flash_bank_s *bank,
179 uint32_t addr_from, uint32_t addr_to,
180 uint32_t (*signature)[4] );
181 static uint32_t lpc2900_address2sector(struct flash_bank_s *bank, uint32_t offset);
182 static uint32_t lpc2900_calc_tr( uint32_t clock, uint32_t time );
185 /*********************** Helper functions **************************/
189 * Wait for an event in mask to occur in INT_STATUS.
191 * Return when an event occurs, or after a timeout.
193 * @param[in] bank Pointer to the flash bank descriptor
194 * @param[in] mask Mask to be used for INT_STATUS
195 * @param[in] timeout Timeout in ms
197 static uint32_t lpc2900_wait_status( flash_bank_t *bank,
202 target_t *target = bank->target;
209 target_read_u32(target, INT_STATUS, &int_status);
211 while( ((int_status & mask) == 0) && (timeout != 0) );
215 LOG_DEBUG("Timeout!");
216 return ERROR_FLASH_OPERATION_FAILED;
225 * Set up the flash for erase/program operations.
227 * Enable the flash, and set the correct CRA clock of 66 kHz.
229 * @param bank Pointer to the flash bank descriptor
231 static void lpc2900_setup( struct flash_bank_s *bank )
234 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
237 /* Power up the flash block */
238 target_write_u32( bank->target, FCTR, FCTR_FS_WEB | FCTR_FS_CS );
241 fcra = (lpc2900_info->clk_sys_fmc / (3 * 66000)) - 1;
242 target_write_u32( bank->target, FCRA, fcra );
248 * Check if device is ready.
250 * Check if device is ready for flash operation:
251 * Must have been successfully probed.
254 static uint32_t lpc2900_is_ready( struct flash_bank_s *bank )
256 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
258 if( lpc2900_info->chipid != EXPECTED_CHIPID )
260 return ERROR_FLASH_BANK_NOT_PROBED;
263 if( bank->target->state != TARGET_HALTED )
265 LOG_ERROR( "Target not halted" );
266 return ERROR_TARGET_NOT_HALTED;
274 * Read the status of sector security from the index sector.
276 * @param bank Pointer to the flash bank descriptor
278 static uint32_t lpc2900_read_security_status( struct flash_bank_s *bank )
281 if( (status = lpc2900_is_ready( bank )) != ERROR_OK )
286 target_t *target = bank->target;
288 /* Enable ISS access */
289 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS);
291 /* Read the relevant block of memory from the ISS sector */
292 uint32_t iss_secured_field[ 0x230/16 ][ 4 ];
293 target_read_memory(target, bank->base + 0xC00, 4, 0x230/4,
294 (uint8_t *)iss_secured_field);
296 /* Disable ISS access */
297 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
299 /* Check status of each sector. Note that the sector numbering in the LPC2900
300 * is different from the logical sector numbers used in OpenOCD!
301 * Refer to the user manual for details.
303 * All zeros (16x 0x00) are treated as a secured sector (is_protected = 1)
304 * All ones (16x 0xFF) are treated as a non-secured sector (is_protected = 0)
305 * Anything else is undefined (is_protected = -1). This is treated as
306 * a protected sector!
310 for( sector = 0; sector < bank->num_sectors; sector++ )
312 /* Convert logical sector number to physical sector number */
317 else if( sector <= 7 )
326 bank->sectors[sector].is_protected = -1;
329 (iss_secured_field[index][0] == 0x00000000) &&
330 (iss_secured_field[index][1] == 0x00000000) &&
331 (iss_secured_field[index][2] == 0x00000000) &&
332 (iss_secured_field[index][3] == 0x00000000) )
334 bank->sectors[sector].is_protected = 1;
338 (iss_secured_field[index][0] == 0xFFFFFFFF) &&
339 (iss_secured_field[index][1] == 0xFFFFFFFF) &&
340 (iss_secured_field[index][2] == 0xFFFFFFFF) &&
341 (iss_secured_field[index][3] == 0xFFFFFFFF) )
343 bank->sectors[sector].is_protected = 0;
352 * Use BIST to calculate a 128-bit hash value over a range of flash.
354 * @param bank Pointer to the flash bank descriptor
359 static uint32_t lpc2900_run_bist128(struct flash_bank_s *bank,
362 uint32_t (*signature)[4] )
364 target_t *target = bank->target;
366 /* Clear END_OF_MISR interrupt status */
367 target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_MISR );
370 target_write_u32( target, FMSSTART, addr_from >> 4);
371 /* End address, and issue start command */
372 target_write_u32( target, FMSSTOP, (addr_to >> 4) | FMSSTOP_MISR_START );
374 /* Poll for end of operation. Calculate a reasonable timeout. */
375 if( lpc2900_wait_status( bank, INTSRC_END_OF_MISR, 1000 ) != ERROR_OK )
377 return ERROR_FLASH_OPERATION_FAILED;
380 /* Return the signature */
381 target_read_memory( target, FMSW0, 4, 4, (uint8_t *)signature );
388 * Return sector number for given address.
390 * Return the (logical) sector number for a given relative address.
391 * No sanity check is done. It assumed that the address is valid.
393 * @param bank Pointer to the flash bank descriptor
394 * @param offset Offset address relative to bank start
396 static uint32_t lpc2900_address2sector( struct flash_bank_s *bank,
399 uint32_t address = bank->base + offset;
402 /* Run through all sectors of this bank */
404 for( sector = 0; sector < bank->num_sectors; sector++ )
406 /* Return immediately if address is within the current sector */
407 if( address < (bank->sectors[sector].offset + bank->sectors[sector].size) )
413 /* We should never come here. If we do, return an arbitrary sector number. */
421 * Write one page to the index sector.
423 * @param bank Pointer to the flash bank descriptor
424 * @param pagenum Page number (0...7)
425 * @param page Page array (FLASH_PAGE_SIZE bytes)
427 static int lpc2900_write_index_page( struct flash_bank_s *bank,
429 uint8_t (*page)[FLASH_PAGE_SIZE] )
431 /* Only pages 4...7 are user writable */
432 if ((pagenum < 4) || (pagenum > 7))
434 LOG_ERROR("Refuse to burn index sector page %d", pagenum);
435 return ERROR_COMMAND_ARGUMENT_INVALID;
438 /* Get target, and check if it's halted */
439 target_t *target = bank->target;
440 if( target->state != TARGET_HALTED )
442 LOG_ERROR( "Target not halted" );
443 return ERROR_TARGET_NOT_HALTED;
447 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
449 /* Enable flash block and set the correct CRA clock of 66 kHz */
450 lpc2900_setup( bank );
452 /* Un-protect the index sector */
453 target_write_u32( target, bank->base, 0 );
454 target_write_u32( target, FCTR,
455 FCTR_FS_LOADREQ | FCTR_FS_WPB | FCTR_FS_ISS |
456 FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS );
458 /* Set latch load mode */
459 target_write_u32( target, FCTR,
460 FCTR_FS_ISS | FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS );
462 /* Write whole page to flash data latches */
463 if( target_write_memory( target,
464 bank->base + pagenum * FLASH_PAGE_SIZE,
465 4, FLASH_PAGE_SIZE / 4, (uint8_t *)page) != ERROR_OK )
467 LOG_ERROR("Index sector write failed @ page %d", pagenum);
468 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
470 return ERROR_FLASH_OPERATION_FAILED;
473 /* Clear END_OF_BURN interrupt status */
474 target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_BURN );
476 /* Set the program/erase time to FLASH_PROGRAM_TIME */
477 target_write_u32(target, FPTR,
478 FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
479 FLASH_PROGRAM_TIME ));
481 /* Trigger flash write */
482 target_write_u32( target, FCTR,
483 FCTR_FS_PROGREQ | FCTR_FS_ISS |
484 FCTR_FS_WPB | FCTR_FS_WRE | FCTR_FS_CS );
486 /* Wait for the end of the write operation. If it's not over after one
487 * second, something went dreadfully wrong... :-(
489 if (lpc2900_wait_status(bank, INTSRC_END_OF_BURN, 1000) != ERROR_OK)
491 LOG_ERROR("Index sector write failed @ page %d", pagenum);
492 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
494 return ERROR_FLASH_OPERATION_FAILED;
497 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
505 * Calculate FPTR.TR register value for desired program/erase time.
507 * @param clock System clock in Hz
508 * @param time Program/erase time in µs
510 static uint32_t lpc2900_calc_tr( uint32_t clock, uint32_t time )
512 /* ((time[µs]/1e6) * f[Hz]) + 511
513 * FPTR.TR = -------------------------------
519 uint32_t tr_val = (uint32_t)((((time / 1e6) * clock) + 511.0) / 512.0);
525 /*********************** Private flash commands **************************/
529 * Command to determine the signature of the whole flash.
531 * Uses the Built-In-Self-Test (BIST) to generate a 128-bit hash value
532 * of the flash content.
534 static int lpc2900_handle_signature_command( struct command_context_s *cmd_ctx,
535 char *cmd, char **args, int argc )
538 uint32_t signature[4];
543 LOG_WARNING( "Too few arguments. Call: lpc2900 signature <bank#>" );
544 return ERROR_FLASH_BANK_INVALID;
548 int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
549 if (ERROR_OK != retval)
552 if( bank->target->state != TARGET_HALTED )
554 LOG_ERROR( "Target not halted" );
555 return ERROR_TARGET_NOT_HALTED;
558 /* Run BIST over whole flash range */
559 if( (status = lpc2900_run_bist128( bank,
561 bank->base + (bank->size - 1),
568 command_print( cmd_ctx, "signature: 0x%8.8" PRIx32
572 signature[3], signature[2], signature[1], signature[0] );
580 * Store customer info in file.
582 * Read customer info from index sector, and store that block of data into
583 * a disk file. The format is binary.
585 static int lpc2900_handle_read_custom_command( struct command_context_s *cmd_ctx,
586 char *cmd, char **args, int argc )
590 return ERROR_COMMAND_SYNTAX_ERROR;
594 int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
595 if (ERROR_OK != retval)
598 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
599 lpc2900_info->risky = 0;
601 /* Get target, and check if it's halted */
602 target_t *target = bank->target;
603 if( target->state != TARGET_HALTED )
605 LOG_ERROR( "Target not halted" );
606 return ERROR_TARGET_NOT_HALTED;
609 /* Storage for customer info. Read in two parts */
610 uint32_t customer[ ISS_CUSTOMER_NWORDS1 + ISS_CUSTOMER_NWORDS2 ];
612 /* Enable access to index sector */
613 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS );
616 target_read_memory( target, bank->base+ISS_CUSTOMER_START1, 4,
617 ISS_CUSTOMER_NWORDS1,
618 (uint8_t *)&customer[0] );
619 target_read_memory( target, bank->base+ISS_CUSTOMER_START2, 4,
620 ISS_CUSTOMER_NWORDS2,
621 (uint8_t *)&customer[ISS_CUSTOMER_NWORDS1] );
623 /* Deactivate access to index sector */
624 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
626 /* Try and open the file */
628 const char *filename = args[1];
629 int ret = fileio_open( &fileio, filename, FILEIO_WRITE, FILEIO_BINARY );
630 if( ret != ERROR_OK )
632 LOG_WARNING( "Could not open file %s", filename );
637 ret = fileio_write( &fileio, sizeof(customer),
638 (const uint8_t *)customer, &nwritten );
639 if( ret != ERROR_OK )
641 LOG_ERROR( "Write operation to file %s failed", filename );
642 fileio_close( &fileio );
646 fileio_close( &fileio );
655 * Enter password to enable potentially dangerous options.
657 static int lpc2900_handle_password_command(struct command_context_s *cmd_ctx,
658 char *cmd, char **args, int argc)
662 return ERROR_COMMAND_SYNTAX_ERROR;
666 int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
667 if (ERROR_OK != retval)
670 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
672 #define ISS_PASSWORD "I_know_what_I_am_doing"
674 lpc2900_info->risky = !strcmp( args[1], ISS_PASSWORD );
676 if( !lpc2900_info->risky )
678 command_print(cmd_ctx, "Wrong password (use '%s')", ISS_PASSWORD);
679 return ERROR_COMMAND_ARGUMENT_INVALID;
682 command_print(cmd_ctx,
683 "Potentially dangerous operation allowed in next command!");
691 * Write customer info from file to the index sector.
693 static int lpc2900_handle_write_custom_command( struct command_context_s *cmd_ctx,
694 char *cmd, char **args, int argc )
698 return ERROR_COMMAND_SYNTAX_ERROR;
702 int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
703 if (ERROR_OK != retval)
706 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
708 /* Check if command execution is allowed. */
709 if( !lpc2900_info->risky )
711 command_print( cmd_ctx, "Command execution not allowed!" );
712 return ERROR_COMMAND_ARGUMENT_INVALID;
714 lpc2900_info->risky = 0;
716 /* Get target, and check if it's halted */
717 target_t *target = bank->target;
718 if (target->state != TARGET_HALTED)
720 LOG_ERROR("Target not halted");
721 return ERROR_TARGET_NOT_HALTED;
724 /* The image will always start at offset 0 */
726 image.base_address_set = 1;
727 image.base_address = 0;
728 image.start_address_set = 0;
730 const char *filename = args[1];
731 const char *type = (argc >= 3) ? args[2] : NULL;
732 retval = image_open(&image, filename, type);
733 if (retval != ERROR_OK)
738 /* Do a sanity check: The image must be exactly the size of the customer
739 programmable area. Any other size is rejected. */
740 if( image.num_sections != 1 )
742 LOG_ERROR("Only one section allowed in image file.");
743 return ERROR_COMMAND_SYNTAX_ERROR;
745 if( (image.sections[0].base_address != 0) ||
746 (image.sections[0].size != ISS_CUSTOMER_SIZE) )
748 LOG_ERROR("Incorrect image file size. Expected %d, "
750 ISS_CUSTOMER_SIZE, image.sections[0].size);
751 return ERROR_COMMAND_SYNTAX_ERROR;
754 /* Well boys, I reckon this is it... */
756 /* Customer info is split into two blocks in pages 4 and 5. */
757 uint8_t page[FLASH_PAGE_SIZE];
760 uint32_t offset = ISS_CUSTOMER_START1 % FLASH_PAGE_SIZE;
761 memset( page, 0xff, FLASH_PAGE_SIZE );
763 retval = image_read_section( &image, 0, 0,
764 ISS_CUSTOMER_SIZE1, &page[offset], &size_read);
765 if( retval != ERROR_OK )
767 LOG_ERROR("couldn't read from file '%s'", filename);
771 if( (retval = lpc2900_write_index_page( bank, 4, &page )) != ERROR_OK )
778 offset = ISS_CUSTOMER_START2 % FLASH_PAGE_SIZE;
779 memset( page, 0xff, FLASH_PAGE_SIZE );
780 retval = image_read_section( &image, 0, ISS_CUSTOMER_SIZE1,
781 ISS_CUSTOMER_SIZE2, &page[offset], &size_read);
782 if( retval != ERROR_OK )
784 LOG_ERROR("couldn't read from file '%s'", filename);
788 if( (retval = lpc2900_write_index_page( bank, 5, &page )) != ERROR_OK )
802 * Activate 'sector security' for a range of sectors.
804 static int lpc2900_handle_secure_sector_command(struct command_context_s *cmd_ctx,
805 char *cmd, char **args, int argc)
809 return ERROR_COMMAND_SYNTAX_ERROR;
812 /* Get the bank descriptor */
814 int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
815 if (ERROR_OK != retval)
818 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
820 /* Check if command execution is allowed. */
821 if( !lpc2900_info->risky )
823 command_print( cmd_ctx, "Command execution not allowed! "
824 "(use 'password' command first)");
825 return ERROR_COMMAND_ARGUMENT_INVALID;
827 lpc2900_info->risky = 0;
829 /* Read sector range, and do a sanity check. */
831 COMMAND_PARSE_NUMBER(int, args[1], first);
832 COMMAND_PARSE_NUMBER(int, args[2], last);
833 if( (first >= bank->num_sectors) ||
834 (last >= bank->num_sectors) ||
837 command_print( cmd_ctx, "Illegal sector range" );
838 return ERROR_COMMAND_ARGUMENT_INVALID;
841 uint8_t page[FLASH_PAGE_SIZE];
844 /* Sectors in page 6 */
845 if( (first <= 4) || (last >= 8) )
847 memset( &page, 0xff, FLASH_PAGE_SIZE );
848 for( sector = first; sector <= last; sector++ )
852 memset( &page[0xB0 + 16*sector], 0, 16 );
854 else if( sector >= 8 )
856 memset( &page[0x00 + 16*(sector - 8)], 0, 16 );
860 if( (retval = lpc2900_write_index_page( bank, 6, &page )) != ERROR_OK )
862 LOG_ERROR("failed to update index sector page 6");
867 /* Sectors in page 7 */
868 if( (first <= 7) && (last >= 5) )
870 memset( &page, 0xff, FLASH_PAGE_SIZE );
871 for( sector = first; sector <= last; sector++ )
873 if( (sector >= 5) && (sector <= 7) )
875 memset( &page[0x00 + 16*(sector - 5)], 0, 16 );
879 if( (retval = lpc2900_write_index_page( bank, 7, &page )) != ERROR_OK )
881 LOG_ERROR("failed to update index sector page 7");
886 command_print( cmd_ctx,
887 "Sectors security will become effective after next power cycle");
889 /* Update the sector security status */
890 if ( lpc2900_read_security_status(bank) != ERROR_OK )
892 LOG_ERROR( "Cannot determine sector security status" );
893 return ERROR_FLASH_OPERATION_FAILED;
902 * Activate JTAG protection.
904 static int lpc2900_handle_secure_jtag_command(struct command_context_s *cmd_ctx,
905 char *cmd, char **args, int argc)
909 return ERROR_COMMAND_SYNTAX_ERROR;
912 /* Get the bank descriptor */
914 int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
915 if (ERROR_OK != retval)
918 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
920 /* Check if command execution is allowed. */
921 if( !lpc2900_info->risky )
923 command_print( cmd_ctx, "Command execution not allowed! "
924 "(use 'password' command first)");
925 return ERROR_COMMAND_ARGUMENT_INVALID;
927 lpc2900_info->risky = 0;
930 uint8_t page[FLASH_PAGE_SIZE];
931 memset( &page, 0xff, FLASH_PAGE_SIZE );
934 /* Insert "soft" protection word */
935 page[0x30 + 15] = 0x7F;
936 page[0x30 + 11] = 0x7F;
937 page[0x30 + 7] = 0x7F;
938 page[0x30 + 3] = 0x7F;
940 /* Write to page 5 */
941 if( (retval = lpc2900_write_index_page( bank, 5, &page ))
944 LOG_ERROR("failed to update index sector page 5");
948 LOG_INFO("JTAG security set. Good bye!");
955 /*********************** Flash interface functions **************************/
959 * Register private command handlers.
961 static int lpc2900_register_commands(struct command_context_s *cmd_ctx)
963 command_t *lpc2900_cmd = register_command(cmd_ctx, NULL, "lpc2900",
964 NULL, COMMAND_ANY, NULL);
970 lpc2900_handle_signature_command,
973 "print device signature of flash bank");
979 lpc2900_handle_read_custom_command,
981 "<bank> <filename> | "
982 "read customer information from index sector to file");
988 lpc2900_handle_password_command,
990 "<bank> <password> | "
991 "enter password to enable 'dangerous' options");
997 lpc2900_handle_write_custom_command,
999 "<bank> <filename> [<type>] | "
1000 "write customer info from file to index sector");
1006 lpc2900_handle_secure_sector_command,
1008 "<bank> <first> <last> | "
1009 "activate sector security for a range of sectors");
1015 lpc2900_handle_secure_jtag_command,
1018 "activate JTAG security");
1024 /// Evaluate flash bank command.
1025 static int lpc2900_flash_bank_command(struct command_context_s *cmd_ctx,
1026 char *cmd, char **args, int argc,
1027 struct flash_bank_s *bank)
1029 lpc2900_flash_bank_t *lpc2900_info;
1033 LOG_WARNING("incomplete flash_bank LPC2900 configuration");
1034 return ERROR_FLASH_BANK_INVALID;
1037 lpc2900_info = malloc(sizeof(lpc2900_flash_bank_t));
1038 bank->driver_priv = lpc2900_info;
1041 * Reject it if we can't meet the requirements for program time
1042 * (if clock too slow), or for erase time (clock too fast).
1044 uint32_t clk_sys_fmc;
1045 COMMAND_PARSE_NUMBER(u32, args[6], clk_sys_fmc);
1046 lpc2900_info->clk_sys_fmc = clk_sys_fmc * 1000;
1048 uint32_t clock_limit;
1049 /* Check program time limit */
1050 clock_limit = 512000000l / FLASH_PROGRAM_TIME;
1051 if (lpc2900_info->clk_sys_fmc < clock_limit)
1053 LOG_WARNING("flash clock must be at least %" PRIu32 " kHz",
1054 (clock_limit / 1000));
1055 return ERROR_FLASH_BANK_INVALID;
1058 /* Check erase time limit */
1059 clock_limit = (uint32_t)((32767.0 * 512.0 * 1e6) / FLASH_ERASE_TIME);
1060 if (lpc2900_info->clk_sys_fmc > clock_limit)
1062 LOG_WARNING("flash clock must be a maximum of %" PRIu32" kHz",
1063 (clock_limit / 1000));
1064 return ERROR_FLASH_BANK_INVALID;
1067 /* Chip ID will be obtained by probing the device later */
1068 lpc2900_info->chipid = 0;
1077 * @param bank Pointer to the flash bank descriptor
1078 * @param first First sector to be erased
1079 * @param last Last sector (including) to be erased
1081 static int lpc2900_erase(struct flash_bank_s *bank, int first, int last)
1085 int last_unsecured_sector;
1086 target_t *target = bank->target;
1087 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
1090 status = lpc2900_is_ready(bank);
1091 if (status != ERROR_OK)
1096 /* Sanity check on sector range */
1097 if ((first < 0) || (last < first) || (last >= bank->num_sectors))
1099 LOG_INFO("Bad sector range");
1100 return ERROR_FLASH_SECTOR_INVALID;
1103 /* Update the info about secured sectors */
1104 lpc2900_read_security_status( bank );
1106 /* The selected sector range might include secured sectors. An attempt
1107 * to erase such a sector will cause the erase to fail also for unsecured
1108 * sectors. It is necessary to determine the last unsecured sector now,
1109 * because we have to treat the last relevant sector in the list in
1112 last_unsecured_sector = -1;
1113 for (sector = first; sector <= last; sector++)
1115 if ( !bank->sectors[sector].is_protected )
1117 last_unsecured_sector = sector;
1121 /* Exit now, in case of the rare constellation where all sectors in range
1122 * are secured. This is regarded a success, since erasing/programming of
1123 * secured sectors shall be handled transparently.
1125 if ( last_unsecured_sector == -1 )
1130 /* Enable flash block and set the correct CRA clock of 66 kHz */
1131 lpc2900_setup(bank);
1133 /* Clear END_OF_ERASE interrupt status */
1134 target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_ERASE);
1136 /* Set the program/erase timer to FLASH_ERASE_TIME */
1137 target_write_u32(target, FPTR,
1138 FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
1139 FLASH_ERASE_TIME ));
1141 /* Sectors are marked for erasure, then erased all together */
1142 for (sector = first; sector <= last_unsecured_sector; sector++)
1144 /* Only mark sectors that aren't secured. Any attempt to erase a group
1145 * of sectors will fail if any single one of them is secured!
1147 if ( !bank->sectors[sector].is_protected )
1149 /* Unprotect the sector */
1150 target_write_u32(target, bank->sectors[sector].offset, 0);
1151 target_write_u32(target, FCTR,
1152 FCTR_FS_LOADREQ | FCTR_FS_WPB |
1153 FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
1155 /* Mark the sector for erasure. The last sector in the list
1156 triggers the erasure. */
1157 target_write_u32(target, bank->sectors[sector].offset, 0);
1158 if ( sector == last_unsecured_sector )
1160 target_write_u32(target, FCTR,
1161 FCTR_FS_PROGREQ | FCTR_FS_WPB | FCTR_FS_CS);
1165 target_write_u32(target, FCTR,
1166 FCTR_FS_LOADREQ | FCTR_FS_WPB |
1167 FCTR_FS_WEB | FCTR_FS_CS);
1172 /* Wait for the end of the erase operation. If it's not over after two seconds,
1173 * something went dreadfully wrong... :-(
1175 if( lpc2900_wait_status(bank, INTSRC_END_OF_ERASE, 2000) != ERROR_OK )
1177 return ERROR_FLASH_OPERATION_FAILED;
1180 /* Normal flash operating mode */
1181 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
1188 static int lpc2900_protect(struct flash_bank_s *bank, int set, int first, int last)
1190 /* This command is not supported.
1191 * "Protection" in LPC2900 terms is handled transparently. Sectors will
1192 * automatically be unprotected as needed.
1193 * Instead we use the concept of sector security. A secured sector is shown
1194 * as "protected" in OpenOCD. Sector security is a permanent feature, and
1195 * cannot be disabled once activated.
1203 * Write data to flash.
1205 * @param bank Pointer to the flash bank descriptor
1206 * @param buffer Buffer with data
1207 * @param offset Start address (relative to bank start)
1208 * @param count Number of bytes to be programmed
1210 static int lpc2900_write(struct flash_bank_s *bank, uint8_t *buffer,
1211 uint32_t offset, uint32_t count)
1213 uint8_t page[FLASH_PAGE_SIZE];
1216 target_t *target = bank->target;
1217 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
1221 static const uint32_t write_target_code[] = {
1222 /* Set auto latch mode: FCTR=CS|WRE|WEB */
1223 0xe3a0a007, /* loop mov r10, #0x007 */
1224 0xe583a000, /* str r10,[r3,#0] */
1226 /* Load complete page into latches */
1227 0xe3a06020, /* mov r6,#(512/16) */
1228 0xe8b00f00, /* next ldmia r0!,{r8-r11} */
1229 0xe8a10f00, /* stmia r1!,{r8-r11} */
1230 0xe2566001, /* subs r6,#1 */
1231 0x1afffffb, /* bne next */
1233 /* Clear END_OF_BURN interrupt status */
1234 0xe3a0a002, /* mov r10,#(1 << 1) */
1235 0xe583afe8, /* str r10,[r3,#0xfe8] */
1237 /* Set the erase time to FLASH_PROGRAM_TIME */
1238 0xe5834008, /* str r4,[r3,#8] */
1240 /* Trigger flash write
1241 FCTR = CS | WRE | WPB | PROGREQ */
1242 0xe3a0a083, /* mov r10,#0x83 */
1243 0xe38aaa01, /* orr r10,#0x1000 */
1244 0xe583a000, /* str r10,[r3,#0] */
1246 /* Wait for end of burn */
1247 0xe593afe0, /* wait ldr r10,[r3,#0xfe0] */
1248 0xe21aa002, /* ands r10,#(1 << 1) */
1249 0x0afffffc, /* beq wait */
1252 0xe2522001, /* subs r2,#1 */
1253 0x1affffed, /* bne loop */
1255 0xeafffffe /* done b done */
1259 status = lpc2900_is_ready(bank);
1260 if (status != ERROR_OK)
1265 /* Enable flash block and set the correct CRA clock of 66 kHz */
1266 lpc2900_setup(bank);
1268 /* Update the info about secured sectors */
1269 lpc2900_read_security_status( bank );
1271 /* Unprotect all involved sectors */
1272 for (sector = 0; sector < bank->num_sectors; sector++)
1274 /* Start address in or before this sector? */
1275 /* End address in or behind this sector? */
1276 if ( ((bank->base + offset) <
1277 (bank->sectors[sector].offset + bank->sectors[sector].size)) &&
1278 ((bank->base + (offset + count - 1)) >= bank->sectors[sector].offset) )
1280 /* This sector is involved and needs to be unprotected.
1281 * Don't do it for secured sectors.
1283 if ( !bank->sectors[sector].is_protected )
1285 target_write_u32(target, bank->sectors[sector].offset, 0);
1286 target_write_u32(target, FCTR,
1287 FCTR_FS_LOADREQ | FCTR_FS_WPB |
1288 FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
1293 /* Set the program/erase time to FLASH_PROGRAM_TIME */
1294 uint32_t prog_time = FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
1295 FLASH_PROGRAM_TIME );
1297 /* If there is a working area of reasonable size, use it to program via
1298 a target algorithm. If not, fall back to host programming. */
1300 /* We need some room for target code. */
1301 uint32_t target_code_size = sizeof(write_target_code);
1303 /* Try working area allocation. Start with a large buffer, and try with
1304 reduced size if that fails. */
1305 working_area_t *warea;
1306 uint32_t buffer_size = lpc2900_info->max_ram_block - 1 * KiB;
1307 while( (retval = target_alloc_working_area(target,
1308 buffer_size + target_code_size,
1309 &warea)) != ERROR_OK )
1311 /* Try a smaller buffer now, and stop if it's too small. */
1312 buffer_size -= 1 * KiB;
1313 if (buffer_size < 2 * KiB)
1315 LOG_INFO( "no (large enough) working area"
1316 ", falling back to host mode" );
1324 reg_param_t reg_params[5];
1325 armv4_5_algorithm_t armv4_5_info;
1327 /* We can use target mode. Download the algorithm. */
1328 retval = target_write_buffer( target,
1329 (warea->address)+buffer_size,
1331 (uint8_t *)write_target_code);
1332 if (retval != ERROR_OK)
1334 LOG_ERROR("Unable to write block write code to target");
1335 target_free_all_working_areas(target);
1336 return ERROR_FLASH_OPERATION_FAILED;
1339 init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
1340 init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
1341 init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
1342 init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
1343 init_reg_param(®_params[4], "r4", 32, PARAM_OUT);
1345 /* Write to flash in large blocks */
1346 while ( count != 0 )
1348 uint32_t this_npages;
1349 uint8_t *this_buffer;
1350 int start_sector = lpc2900_address2sector( bank, offset );
1352 /* First page / last page / rest */
1353 if( offset % FLASH_PAGE_SIZE )
1355 /* Block doesn't start on page boundary.
1356 Burn first partial page separately. */
1357 memset( &page, 0xff, sizeof(page) );
1358 memcpy( &page[offset % FLASH_PAGE_SIZE],
1360 FLASH_PAGE_SIZE - (offset % FLASH_PAGE_SIZE) );
1362 this_buffer = &page[0];
1363 count = count + (offset % FLASH_PAGE_SIZE);
1364 offset = offset - (offset % FLASH_PAGE_SIZE);
1366 else if( count < FLASH_PAGE_SIZE )
1368 /* Download last incomplete page separately. */
1369 memset( &page, 0xff, sizeof(page) );
1370 memcpy( &page, buffer, count );
1372 this_buffer = &page[0];
1373 count = FLASH_PAGE_SIZE;
1377 /* Download as many full pages as possible */
1378 this_npages = (count < buffer_size) ?
1379 count / FLASH_PAGE_SIZE :
1380 buffer_size / FLASH_PAGE_SIZE;
1381 this_buffer = buffer;
1383 /* Make sure we stop at the next secured sector */
1384 int sector = start_sector + 1;
1385 while( sector < bank->num_sectors )
1388 if( bank->sectors[sector].is_protected )
1390 /* Is that next sector within the current block? */
1391 if( (bank->sectors[sector].offset - bank->base) <
1392 (offset + (this_npages * FLASH_PAGE_SIZE)) )
1394 /* Yes! Split the block */
1396 (bank->sectors[sector].offset - bank->base - offset)
1406 /* Skip the current sector if it is secured */
1407 if (bank->sectors[start_sector].is_protected)
1409 LOG_DEBUG("Skip secured sector %d",
1412 /* Stop if this is the last sector */
1413 if (start_sector == bank->num_sectors - 1)
1419 uint32_t nskip = bank->sectors[start_sector].size -
1420 (offset % bank->sectors[start_sector].size);
1423 count = (count >= nskip) ? (count - nskip) : 0;
1427 /* Execute buffer download */
1428 if ((retval = target_write_buffer(target,
1430 this_npages * FLASH_PAGE_SIZE,
1431 this_buffer)) != ERROR_OK)
1433 LOG_ERROR("Unable to write data to target");
1434 target_free_all_working_areas(target);
1435 return ERROR_FLASH_OPERATION_FAILED;
1438 /* Prepare registers */
1439 buf_set_u32(reg_params[0].value, 0, 32, warea->address);
1440 buf_set_u32(reg_params[1].value, 0, 32, offset);
1441 buf_set_u32(reg_params[2].value, 0, 32, this_npages);
1442 buf_set_u32(reg_params[3].value, 0, 32, FCTR);
1443 buf_set_u32(reg_params[4].value, 0, 32, FPTR_EN_T | prog_time);
1445 /* Execute algorithm, assume breakpoint for last instruction */
1446 armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
1447 armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
1448 armv4_5_info.core_state = ARMV4_5_STATE_ARM;
1450 retval = target_run_algorithm(target, 0, NULL, 5, reg_params,
1451 (warea->address) + buffer_size,
1452 (warea->address) + buffer_size + target_code_size - 4,
1453 10000, /* 10s should be enough for max. 16 KiB of data */
1456 if (retval != ERROR_OK)
1458 LOG_ERROR("Execution of flash algorithm failed.");
1459 target_free_all_working_areas(target);
1460 retval = ERROR_FLASH_OPERATION_FAILED;
1464 count -= this_npages * FLASH_PAGE_SIZE;
1465 buffer += this_npages * FLASH_PAGE_SIZE;
1466 offset += this_npages * FLASH_PAGE_SIZE;
1469 /* Free all resources */
1470 destroy_reg_param(®_params[0]);
1471 destroy_reg_param(®_params[1]);
1472 destroy_reg_param(®_params[2]);
1473 destroy_reg_param(®_params[3]);
1474 destroy_reg_param(®_params[4]);
1475 target_free_all_working_areas(target);
1479 /* Write to flash memory page-wise */
1480 while ( count != 0 )
1482 /* How many bytes do we copy this time? */
1483 num_bytes = (count >= FLASH_PAGE_SIZE) ?
1484 FLASH_PAGE_SIZE - (offset % FLASH_PAGE_SIZE) :
1487 /* Don't do anything with it if the page is in a secured sector. */
1488 if ( !bank->sectors[lpc2900_address2sector(bank, offset)].is_protected )
1490 /* Set latch load mode */
1491 target_write_u32(target, FCTR,
1492 FCTR_FS_CS | FCTR_FS_WRE | FCTR_FS_WEB);
1494 /* Always clear the buffer (a little overhead, but who cares) */
1495 memset(page, 0xFF, FLASH_PAGE_SIZE);
1497 /* Copy them to the buffer */
1498 memcpy( &page[offset % FLASH_PAGE_SIZE],
1499 &buffer[offset % FLASH_PAGE_SIZE],
1502 /* Write whole page to flash data latches */
1503 if (target_write_memory(
1505 bank->base + (offset - (offset % FLASH_PAGE_SIZE)),
1506 4, FLASH_PAGE_SIZE / 4, page) != ERROR_OK)
1508 LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
1509 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
1511 return ERROR_FLASH_OPERATION_FAILED;
1514 /* Clear END_OF_BURN interrupt status */
1515 target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_BURN);
1517 /* Set the programming time */
1518 target_write_u32(target, FPTR, FPTR_EN_T | prog_time);
1520 /* Trigger flash write */
1521 target_write_u32(target, FCTR,
1522 FCTR_FS_CS | FCTR_FS_WRE | FCTR_FS_WPB | FCTR_FS_PROGREQ);
1524 /* Wait for the end of the write operation. If it's not over
1525 * after one second, something went dreadfully wrong... :-(
1527 if (lpc2900_wait_status(bank, INTSRC_END_OF_BURN, 1000) != ERROR_OK)
1529 LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
1530 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
1532 return ERROR_FLASH_OPERATION_FAILED;
1536 /* Update pointers and counters */
1537 offset += num_bytes;
1538 buffer += num_bytes;
1545 /* Normal flash operating mode */
1546 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
1553 * Try and identify the device.
1555 * Determine type number and its memory layout.
1557 * @param bank Pointer to the flash bank descriptor
1559 static int lpc2900_probe(struct flash_bank_s *bank)
1561 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
1562 target_t *target = bank->target;
1567 if (target->state != TARGET_HALTED)
1569 LOG_ERROR("Target not halted");
1570 return ERROR_TARGET_NOT_HALTED;
1573 /* We want to do this only once. Check if we already have a valid CHIPID,
1574 * because then we will have already successfully probed the device.
1576 if (lpc2900_info->chipid == EXPECTED_CHIPID)
1581 /* Probing starts with reading the CHIPID register. We will continue only
1582 * if this identifies as an LPC2900 device.
1584 target_read_u32(target, CHIPID, &lpc2900_info->chipid);
1586 if (lpc2900_info->chipid != EXPECTED_CHIPID)
1588 LOG_WARNING("Device is not an LPC29xx");
1589 return ERROR_FLASH_OPERATION_FAILED;
1592 /* It's an LPC29xx device. Now read the feature register FEAT0...FEAT3. */
1593 uint32_t feat0, feat1, feat2, feat3;
1594 target_read_u32(target, FEAT0, &feat0);
1595 target_read_u32(target, FEAT1, &feat1);
1596 target_read_u32(target, FEAT2, &feat2);
1597 target_read_u32(target, FEAT3, &feat3);
1600 bank->base = 0x20000000;
1602 /* Determine flash layout from FEAT2 register */
1603 uint32_t num_64k_sectors = (feat2 >> 16) & 0xFF;
1604 uint32_t num_8k_sectors = (feat2 >> 0) & 0xFF;
1605 bank->num_sectors = num_64k_sectors + num_8k_sectors;
1606 bank->size = KiB * (64 * num_64k_sectors + 8 * num_8k_sectors);
1608 /* Determine maximum contiguous RAM block */
1609 lpc2900_info->max_ram_block = 16 * KiB;
1610 if( (feat1 & 0x30) == 0x30 )
1612 lpc2900_info->max_ram_block = 32 * KiB;
1613 if( (feat1 & 0x0C) == 0x0C )
1615 lpc2900_info->max_ram_block = 48 * KiB;
1619 /* Determine package code and ITCM size */
1620 uint32_t package_code = feat0 & 0x0F;
1621 uint32_t itcm_code = (feat1 >> 16) & 0x1F;
1623 /* Determine the exact type number. */
1625 if ( (package_code == 4) && (itcm_code == 5) )
1627 /* Old LPC2917 or LPC2919 (non-/01 devices) */
1628 lpc2900_info->target_name = (bank->size == 768*KiB) ? "LPC2919" : "LPC2917";
1632 if ( package_code == 2 )
1634 /* 100-pin package */
1635 if ( bank->size == 128*KiB )
1637 lpc2900_info->target_name = "LPC2921";
1639 else if ( bank->size == 256*KiB )
1641 lpc2900_info->target_name = "LPC2923";
1643 else if ( bank->size == 512*KiB )
1645 lpc2900_info->target_name = "LPC2925";
1652 else if ( package_code == 4 )
1654 /* 144-pin package */
1655 if ( (bank->size == 512*KiB) && (feat3 == 0xFFFFFCF0) )
1657 lpc2900_info->target_name = "LPC2917/01";
1659 else if ( (bank->size == 512*KiB) && (feat3 == 0xFFFFFFF1) )
1661 lpc2900_info->target_name = "LPC2927";
1663 else if ( (bank->size == 768*KiB) && (feat3 == 0xFFFFFCF8) )
1665 lpc2900_info->target_name = "LPC2919/01";
1667 else if ( (bank->size == 768*KiB) && (feat3 == 0xFFFFFFF9) )
1669 lpc2900_info->target_name = "LPC2929";
1676 else if ( package_code == 5 )
1678 /* 208-pin package */
1679 lpc2900_info->target_name = (bank->size == 0) ? "LPC2930" : "LPC2939";
1689 LOG_WARNING("Unknown LPC29xx derivative");
1690 return ERROR_FLASH_OPERATION_FAILED;
1693 /* Show detected device */
1694 LOG_INFO("Flash bank %d"
1695 ": Device %s, %" PRIu32
1696 " KiB in %d sectors",
1698 lpc2900_info->target_name, bank->size / KiB,
1701 /* Flashless devices cannot be handled */
1702 if ( bank->num_sectors == 0 )
1704 LOG_WARNING("Flashless device cannot be handled");
1705 return ERROR_FLASH_OPERATION_FAILED;
1709 * These are logical sector numbers. When doing real flash operations,
1710 * the logical flash number are translated into the physical flash numbers
1713 bank->sectors = malloc(sizeof(flash_sector_t) * bank->num_sectors);
1716 for (i = 0; i < bank->num_sectors; i++)
1718 bank->sectors[i].offset = offset;
1719 bank->sectors[i].is_erased = -1;
1720 bank->sectors[i].is_protected = -1;
1724 bank->sectors[i].size = 8 * KiB;
1728 bank->sectors[i].size = 64 * KiB;
1732 /* We shouldn't come here. But there might be a new part out there
1733 * that has more than 19 sectors. Politely ask for a fix then.
1735 bank->sectors[i].size = 0;
1736 LOG_ERROR("Never heard about sector %d", i);
1739 offset += bank->sectors[i].size;
1742 /* Read sector security status */
1743 if ( lpc2900_read_security_status(bank) != ERROR_OK )
1745 LOG_ERROR("Cannot determine sector security status");
1746 return ERROR_FLASH_OPERATION_FAILED;
1754 * Run a blank check for each sector.
1756 * For speed reasons, the device isn't read word by word.
1757 * A hash value is calculated by the hardware ("BIST") for each sector.
1758 * This value is then compared against the known hash of an empty sector.
1760 * @param bank Pointer to the flash bank descriptor
1762 static int lpc2900_erase_check(struct flash_bank_s *bank)
1764 uint32_t status = lpc2900_is_ready(bank);
1765 if (status != ERROR_OK)
1767 LOG_INFO("Processor not halted/not probed");
1771 /* Use the BIST (Built-In Selft Test) to generate a signature of each flash
1772 * sector. Compare against the expected signature of an empty sector.
1775 for ( sector = 0; sector < bank->num_sectors; sector++ )
1777 uint32_t signature[4];
1778 if ( (status = lpc2900_run_bist128( bank,
1779 bank->sectors[sector].offset,
1780 bank->sectors[sector].offset +
1781 (bank->sectors[sector].size - 1),
1782 &signature)) != ERROR_OK )
1787 /* The expected signatures for an empty sector are different
1788 * for 8 KiB and 64 KiB sectors.
1790 if ( bank->sectors[sector].size == 8*KiB )
1792 bank->sectors[sector].is_erased =
1793 (signature[3] == 0x01ABAAAA) &&
1794 (signature[2] == 0xAAAAAAAA) &&
1795 (signature[1] == 0xAAAAAAAA) &&
1796 (signature[0] == 0xAAA00AAA);
1798 if ( bank->sectors[sector].size == 64*KiB )
1800 bank->sectors[sector].is_erased =
1801 (signature[3] == 0x11801222) &&
1802 (signature[2] == 0xB88844FF) &&
1803 (signature[1] == 0x11A22008) &&
1804 (signature[0] == 0x2B1BFE44);
1813 * Get protection (sector security) status.
1815 * Determine the status of "sector security" for each sector.
1816 * A secured sector is one that can never be erased/programmed again.
1818 * @param bank Pointer to the flash bank descriptor
1820 static int lpc2900_protect_check(struct flash_bank_s *bank)
1822 return lpc2900_read_security_status(bank);
1827 * Print info about the driver (not the device).
1829 * @param bank Pointer to the flash bank descriptor
1830 * @param buf Buffer to take the string
1831 * @param buf_size Maximum number of characters that the buffer can take
1833 static int lpc2900_info(struct flash_bank_s *bank, char *buf, int buf_size)
1835 snprintf(buf, buf_size, "lpc2900 flash driver");
1841 flash_driver_t lpc2900_flash =
1844 .register_commands = lpc2900_register_commands,
1845 .flash_bank_command = lpc2900_flash_bank_command,
1846 .erase = lpc2900_erase,
1847 .protect = lpc2900_protect,
1848 .write = lpc2900_write,
1849 .probe = lpc2900_probe,
1850 .auto_probe = lpc2900_probe,
1851 .erase_check = lpc2900_erase_check,
1852 .protect_check = lpc2900_protect_check,
1853 .info = lpc2900_info