1 /***************************************************************************
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2 * Copyright (C) 2009 by *
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3 * Rolf Meeser <rolfm_9dq@yahoo.de> *
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5 * This program is free software; you can redistribute it and/or modify *
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6 * it under the terms of the GNU General Public License as published by *
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7 * the Free Software Foundation; either version 2 of the License, or *
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8 * (at your option) any later version. *
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10 * This program is distributed in the hope that it will be useful, *
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11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
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12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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13 * GNU General Public License for more details. *
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15 * You should have received a copy of the GNU General Public License *
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16 * along with this program; if not, write to the *
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17 * Free Software Foundation, Inc., *
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18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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19 ***************************************************************************/
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21 #ifdef HAVE_CONFIG_H
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28 #include "lpc2900.h"
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29 #include "binarybuffer.h"
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30 #include "armv4_5.h"
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36 /* Some flash constants */
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37 #define FLASH_PAGE_SIZE 512 /* bytes */
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38 #define FLASH_ERASE_TIME 100000 /* microseconds */
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39 #define FLASH_PROGRAM_TIME 1000 /* microseconds */
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41 /* Chip ID / Feature Registers */
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42 #define CHIPID 0xE0000000 /* Chip ID */
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43 #define FEAT0 0xE0000100 /* Chip feature 0 */
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44 #define FEAT1 0xE0000104 /* Chip feature 1 */
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45 #define FEAT2 0xE0000108 /* Chip feature 2 (contains flash size indicator) */
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46 #define FEAT3 0xE000010C /* Chip feature 3 */
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48 #define EXPECTED_CHIPID 0x209CE02B /* Chip ID of all LPC2900 devices */
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50 /* Flash/EEPROM Control Registers */
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51 #define FCTR 0x20200000 /* Flash control */
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52 #define FPTR 0x20200008 /* Flash program-time */
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53 #define FTCTR 0x2020000C /* Flash test control */
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54 #define FBWST 0x20200010 /* Flash bridge wait-state */
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55 #define FCRA 0x2020001C /* Flash clock divider */
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56 #define FMSSTART 0x20200020 /* Flash Built-In Selft Test start address */
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57 #define FMSSTOP 0x20200024 /* Flash Built-In Selft Test stop address */
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58 #define FMS16 0x20200028 /* Flash 16-bit signature */
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59 #define FMSW0 0x2020002C /* Flash 128-bit signature Word 0 */
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60 #define FMSW1 0x20200030 /* Flash 128-bit signature Word 1 */
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61 #define FMSW2 0x20200034 /* Flash 128-bit signature Word 2 */
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62 #define FMSW3 0x20200038 /* Flash 128-bit signature Word 3 */
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64 #define EECMD 0x20200080 /* EEPROM command */
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65 #define EEADDR 0x20200084 /* EEPROM address */
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66 #define EEWDATA 0x20200088 /* EEPROM write data */
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67 #define EERDATA 0x2020008C /* EEPROM read data */
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68 #define EEWSTATE 0x20200090 /* EEPROM wait state */
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69 #define EECLKDIV 0x20200094 /* EEPROM clock divider */
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70 #define EEPWRDWN 0x20200098 /* EEPROM power-down/start */
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71 #define EEMSSTART 0x2020009C /* EEPROM BIST start address */
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72 #define EEMSSTOP 0x202000A0 /* EEPROM BIST stop address */
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73 #define EEMSSIG 0x202000A4 /* EEPROM 24-bit BIST signature */
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75 #define INT_CLR_ENABLE 0x20200FD8 /* Flash/EEPROM interrupt clear enable */
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76 #define INT_SET_ENABLE 0x20200FDC /* Flash/EEPROM interrupt set enable */
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77 #define INT_STATUS 0x20200FE0 /* Flash/EEPROM interrupt status */
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78 #define INT_ENABLE 0x20200FE4 /* Flash/EEPROM interrupt enable */
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79 #define INT_CLR_STATUS 0x20200FE8 /* Flash/EEPROM interrupt clear status */
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80 #define INT_SET_STATUS 0x20200FEC /* Flash/EEPROM interrupt set status */
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82 /* Interrupt sources */
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83 #define INTSRC_END_OF_PROG (1 << 28)
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84 #define INTSRC_END_OF_BIST (1 << 27)
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85 #define INTSRC_END_OF_RDWR (1 << 26)
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86 #define INTSRC_END_OF_MISR (1 << 2)
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87 #define INTSRC_END_OF_BURN (1 << 1)
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88 #define INTSRC_END_OF_ERASE (1 << 0)
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92 #define FCTR_FS_LOADREQ (1 << 15)
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93 #define FCTR_FS_CACHECLR (1 << 14)
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94 #define FCTR_FS_CACHEBYP (1 << 13)
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95 #define FCTR_FS_PROGREQ (1 << 12)
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96 #define FCTR_FS_RLS (1 << 11)
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97 #define FCTR_FS_PDL (1 << 10)
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98 #define FCTR_FS_PD (1 << 9)
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99 #define FCTR_FS_WPB (1 << 7)
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100 #define FCTR_FS_ISS (1 << 6)
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101 #define FCTR_FS_RLD (1 << 5)
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102 #define FCTR_FS_DCR (1 << 4)
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103 #define FCTR_FS_WEB (1 << 2)
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104 #define FCTR_FS_WRE (1 << 1)
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105 #define FCTR_FS_CS (1 << 0)
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107 #define FPTR_EN_T (1 << 15)
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109 #define FTCTR_FS_BYPASS_R (1 << 29)
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110 #define FTCTR_FS_BYPASS_W (1 << 28)
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112 #define FMSSTOP_MISR_START (1 << 17)
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113 /* EEMSSTOP bits */
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114 #define EEMSSTOP_STRTBIST (1 << 31)
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117 #define ISS_CUSTOMER_START1 (0x830)
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118 #define ISS_CUSTOMER_END1 (0xA00)
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119 #define ISS_CUSTOMER_SIZE1 (ISS_CUSTOMER_END1 - ISS_CUSTOMER_START1)
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120 #define ISS_CUSTOMER_NWORDS1 (ISS_CUSTOMER_SIZE1 / 4)
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121 #define ISS_CUSTOMER_START2 (0xA40)
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122 #define ISS_CUSTOMER_END2 (0xC00)
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123 #define ISS_CUSTOMER_SIZE2 (ISS_CUSTOMER_END2 - ISS_CUSTOMER_START2)
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124 #define ISS_CUSTOMER_NWORDS2 (ISS_CUSTOMER_SIZE2 / 4)
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125 #define ISS_CUSTOMER_SIZE (ISS_CUSTOMER_SIZE1 + ISS_CUSTOMER_SIZE2)
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130 * Private data for \c lpc2900 flash driver.
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132 typedef struct lpc2900_flash_bank_s
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135 * Holds the value read from CHIPID register.
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136 * The driver will not load if the chipid doesn't match the expected
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137 * value of 0x209CE02B of the LPC2900 family. A probe will only be done
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138 * if the chipid does not yet contain the expected value.
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143 * String holding device name.
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144 * This string is set by the probe function to the type number of the
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145 * device. It takes the form "LPC29xx".
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147 char * target_name;
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150 * System clock frequency.
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151 * Holds the clock frequency in Hz, as passed by the configuration file
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152 * to the <tt>flash bank</tt> command.
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154 uint32_t clk_sys_fmc;
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157 * Flag to indicate that dangerous operations are possible.
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158 * This flag can be set by passing the correct password to the
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159 * <tt>lpc2900 password</tt> command. If set, other dangerous commands,
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160 * which operate on the index sector, can be executed.
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165 * Maximum contiguous block of internal SRAM (bytes).
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166 * Autodetected by the driver. Not the total amount of SRAM, only the
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167 * the largest \em contiguous block!
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169 uint32_t max_ram_block;
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171 } lpc2900_flash_bank_t;
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176 static int lpc2900_register_commands(struct command_context_s *cmd_ctx);
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177 static int lpc2900_flash_bank_command(struct command_context_s *cmd_ctx,
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178 char *cmd, char **args, int argc,
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179 struct flash_bank_s *bank);
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180 static int lpc2900_erase(struct flash_bank_s *bank, int first, int last);
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181 static int lpc2900_protect(struct flash_bank_s *bank, int set, int first, int last);
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182 static int lpc2900_write(struct flash_bank_s *bank,
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183 uint8_t *buffer, uint32_t offset, uint32_t count);
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184 static int lpc2900_probe(struct flash_bank_s *bank);
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185 static int lpc2900_erase_check(struct flash_bank_s *bank);
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186 static int lpc2900_protect_check(struct flash_bank_s *bank);
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187 static int lpc2900_info(struct flash_bank_s *bank, char *buf, int buf_size);
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189 static uint32_t lpc2900_wait_status(flash_bank_t *bank, uint32_t mask, int timeout);
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190 static void lpc2900_setup(struct flash_bank_s *bank);
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191 static uint32_t lpc2900_is_ready(struct flash_bank_s *bank);
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192 static uint32_t lpc2900_read_security_status(struct flash_bank_s *bank);
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193 static uint32_t lpc2900_run_bist128(struct flash_bank_s *bank,
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194 uint32_t addr_from, uint32_t addr_to,
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195 uint32_t (*signature)[4] );
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196 static uint32_t lpc2900_address2sector(struct flash_bank_s *bank, uint32_t offset);
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197 static uint32_t lpc2900_calc_tr( uint32_t clock, uint32_t time );
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200 /*********************** Helper functions **************************/
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204 * Wait for an event in mask to occur in INT_STATUS.
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206 * Return when an event occurs, or after a timeout.
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208 * @param[in] bank Pointer to the flash bank descriptor
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209 * @param[in] mask Mask to be used for INT_STATUS
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210 * @param[in] timeout Timeout in ms
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212 static uint32_t lpc2900_wait_status( flash_bank_t *bank,
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216 uint32_t int_status;
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217 target_t *target = bank->target;
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224 target_read_u32(target, INT_STATUS, &int_status);
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226 while( ((int_status & mask) == 0) && (timeout != 0) );
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230 LOG_DEBUG("Timeout!");
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231 return ERROR_FLASH_OPERATION_FAILED;
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240 * Set up the flash for erase/program operations.
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242 * Enable the flash, and set the correct CRA clock of 66 kHz.
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244 * @param bank Pointer to the flash bank descriptor
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246 static void lpc2900_setup( struct flash_bank_s *bank )
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249 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
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252 /* Power up the flash block */
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253 target_write_u32( bank->target, FCTR, FCTR_FS_WEB | FCTR_FS_CS );
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256 fcra = (lpc2900_info->clk_sys_fmc / (3 * 66000)) - 1;
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257 target_write_u32( bank->target, FCRA, fcra );
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263 * Check if device is ready.
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265 * Check if device is ready for flash operation:
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266 * Must have been successfully probed.
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269 static uint32_t lpc2900_is_ready( struct flash_bank_s *bank )
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271 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
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273 if( lpc2900_info->chipid != EXPECTED_CHIPID )
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275 return ERROR_FLASH_BANK_NOT_PROBED;
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278 if( bank->target->state != TARGET_HALTED )
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280 LOG_ERROR( "Target not halted" );
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281 return ERROR_TARGET_NOT_HALTED;
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289 * Read the status of sector security from the index sector.
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291 * @param bank Pointer to the flash bank descriptor
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293 static uint32_t lpc2900_read_security_status( struct flash_bank_s *bank )
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296 if( (status = lpc2900_is_ready( bank )) != ERROR_OK )
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301 target_t *target = bank->target;
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303 /* Enable ISS access */
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304 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS);
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306 /* Read the relevant block of memory from the ISS sector */
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307 uint32_t iss_secured_field[ 0x230/16 ][ 4 ];
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308 target_read_memory(target, bank->base + 0xC00, 4, 0x230/4,
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309 (uint8_t *)iss_secured_field);
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311 /* Disable ISS access */
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312 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
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314 /* Check status of each sector. Note that the sector numbering in the LPC2900
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315 * is different from the logical sector numbers used in OpenOCD!
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316 * Refer to the user manual for details.
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318 * All zeros (16x 0x00) are treated as a secured sector (is_protected = 1)
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319 * All ones (16x 0xFF) are treated as a non-secured sector (is_protected = 0)
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320 * Anything else is undefined (is_protected = -1). This is treated as
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321 * a protected sector!
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325 for( sector = 0; sector < bank->num_sectors; sector++ )
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327 /* Convert logical sector number to physical sector number */
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330 index = sector + 11;
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332 else if( sector <= 7 )
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334 index = sector + 27;
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338 index = sector - 8;
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341 bank->sectors[sector].is_protected = -1;
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344 (iss_secured_field[index][0] == 0x00000000) &&
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345 (iss_secured_field[index][1] == 0x00000000) &&
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346 (iss_secured_field[index][2] == 0x00000000) &&
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347 (iss_secured_field[index][3] == 0x00000000) )
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349 bank->sectors[sector].is_protected = 1;
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353 (iss_secured_field[index][0] == 0xFFFFFFFF) &&
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354 (iss_secured_field[index][1] == 0xFFFFFFFF) &&
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355 (iss_secured_field[index][2] == 0xFFFFFFFF) &&
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356 (iss_secured_field[index][3] == 0xFFFFFFFF) )
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358 bank->sectors[sector].is_protected = 0;
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367 * Use BIST to calculate a 128-bit hash value over a range of flash.
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369 * @param bank Pointer to the flash bank descriptor
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374 static uint32_t lpc2900_run_bist128(struct flash_bank_s *bank,
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375 uint32_t addr_from,
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377 uint32_t (*signature)[4] )
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379 target_t *target = bank->target;
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381 /* Clear END_OF_MISR interrupt status */
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382 target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_MISR );
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384 /* Start address */
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385 target_write_u32( target, FMSSTART, addr_from >> 4);
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386 /* End address, and issue start command */
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387 target_write_u32( target, FMSSTOP, (addr_to >> 4) | FMSSTOP_MISR_START );
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389 /* Poll for end of operation. Calculate a reasonable timeout. */
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390 if( lpc2900_wait_status( bank, INTSRC_END_OF_MISR, 1000 ) != ERROR_OK )
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392 return ERROR_FLASH_OPERATION_FAILED;
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395 /* Return the signature */
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396 target_read_memory( target, FMSW0, 4, 4, (uint8_t *)signature );
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403 * Return sector number for given address.
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405 * Return the (logical) sector number for a given relative address.
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406 * No sanity check is done. It assumed that the address is valid.
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408 * @param bank Pointer to the flash bank descriptor
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409 * @param offset Offset address relative to bank start
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411 static uint32_t lpc2900_address2sector( struct flash_bank_s *bank,
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414 uint32_t address = bank->base + offset;
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417 /* Run through all sectors of this bank */
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419 for( sector = 0; sector < bank->num_sectors; sector++ )
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421 /* Return immediately if address is within the current sector */
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422 if( address < (bank->sectors[sector].offset + bank->sectors[sector].size) )
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428 /* We should never come here. If we do, return an arbitrary sector number. */
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436 * Write one page to the index sector.
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438 * @param bank Pointer to the flash bank descriptor
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439 * @param pagenum Page number (0...7)
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440 * @param page Page array (FLASH_PAGE_SIZE bytes)
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442 static int lpc2900_write_index_page( struct flash_bank_s *bank,
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444 uint8_t (*page)[FLASH_PAGE_SIZE] )
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446 /* Only pages 4...7 are user writable */
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447 if( (pagenum < 4) || (pagenum > 7) )
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449 LOG_ERROR( "Refuse to burn index sector page %" PRIu32, pagenum );
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450 return ERROR_COMMAND_ARGUMENT_INVALID;
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453 /* Get target, and check if it's halted */
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454 target_t *target = bank->target;
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455 if( target->state != TARGET_HALTED )
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457 LOG_ERROR( "Target not halted" );
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458 return ERROR_TARGET_NOT_HALTED;
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462 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
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464 /* Enable flash block and set the correct CRA clock of 66 kHz */
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465 lpc2900_setup( bank );
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467 /* Un-protect the index sector */
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468 target_write_u32( target, bank->base, 0 );
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469 target_write_u32( target, FCTR,
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470 FCTR_FS_LOADREQ | FCTR_FS_WPB | FCTR_FS_ISS |
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471 FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS );
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473 /* Set latch load mode */
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474 target_write_u32( target, FCTR,
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475 FCTR_FS_ISS | FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS );
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477 /* Write whole page to flash data latches */
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478 if( target_write_memory( target,
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479 bank->base + pagenum * FLASH_PAGE_SIZE,
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480 4, FLASH_PAGE_SIZE / 4, (uint8_t *)page) != ERROR_OK )
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482 LOG_ERROR( "Index sector write failed @ page %" PRIu32, pagenum );
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483 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
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485 return ERROR_FLASH_OPERATION_FAILED;
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488 /* Clear END_OF_BURN interrupt status */
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489 target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_BURN );
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491 /* Set the program/erase time to FLASH_PROGRAM_TIME */
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492 target_write_u32(target, FPTR,
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493 FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
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494 FLASH_PROGRAM_TIME ));
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496 /* Trigger flash write */
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497 target_write_u32( target, FCTR,
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498 FCTR_FS_PROGREQ | FCTR_FS_ISS |
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499 FCTR_FS_WPB | FCTR_FS_WRE | FCTR_FS_CS );
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501 /* Wait for the end of the write operation. If it's not over after one
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502 * second, something went dreadfully wrong... :-(
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504 if( lpc2900_wait_status( bank, INTSRC_END_OF_BURN, 1000 ) != ERROR_OK )
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506 LOG_ERROR( "Index sector write failed @ page %" PRIu32, pagenum );
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507 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
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509 return ERROR_FLASH_OPERATION_FAILED;
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512 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
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520 * Calculate FPTR.TR register value for desired program/erase time.
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522 * @param clock System clock in Hz
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523 * @param time Program/erase time in µs
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525 static uint32_t lpc2900_calc_tr( uint32_t clock, uint32_t time )
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527 /* ((time[µs]/1e6) * f[Hz]) + 511
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528 * FPTR.TR = -------------------------------
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531 * The result is the
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534 uint32_t tr_val = (uint32_t)((((time / 1e6) * clock) + 511.0) / 512.0);
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540 /*********************** Private flash commands **************************/
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544 * Command to determine the signature of the whole flash.
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546 * Uses the Built-In-Self-Test (BIST) to generate a 128-bit hash value
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547 * of the flash content.
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554 static int lpc2900_handle_signature_command( struct command_context_s *cmd_ctx,
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555 char *cmd, char **args, int argc )
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557 flash_bank_t *bank;
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559 uint32_t signature[4];
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564 LOG_WARNING( "Too few arguments. Call: lpc2900 signature <bank#>" );
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565 return ERROR_FLASH_BANK_INVALID;
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568 /* Get the bank descriptor */
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569 bank = get_flash_bank_by_num( strtoul(args[0], NULL, 0) );
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572 command_print( cmd_ctx, "flash bank '#%s' is out of bounds", args[0] );
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576 if( bank->target->state != TARGET_HALTED )
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578 LOG_ERROR( "Target not halted" );
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579 return ERROR_TARGET_NOT_HALTED;
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582 /* Run BIST over whole flash range */
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583 if( (status = lpc2900_run_bist128( bank,
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585 bank->base + (bank->size - 1),
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592 command_print( cmd_ctx, "signature: 0x%8.8" PRIx32
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596 signature[3], signature[2], signature[1], signature[0] );
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604 * Store customer info in file.
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606 * Read customer info from index sector, and store that block of data into
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607 * a disk file. The format is binary.
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614 static int lpc2900_handle_read_custom_command( struct command_context_s *cmd_ctx,
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615 char *cmd, char **args, int argc )
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617 flash_bank_t *bank;
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622 return ERROR_COMMAND_SYNTAX_ERROR;
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625 /* Get the bank descriptor */
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626 bank = get_flash_bank_by_num( strtoul(args[0], NULL, 0) );
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629 command_print( cmd_ctx, "flash bank '#%s' is out of bounds", args[0] );
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632 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
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633 lpc2900_info->risky = 0;
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635 /* Get target, and check if it's halted */
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636 target_t *target = bank->target;
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637 if( target->state != TARGET_HALTED )
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639 LOG_ERROR( "Target not halted" );
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640 return ERROR_TARGET_NOT_HALTED;
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643 /* Storage for customer info. Read in two parts */
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644 uint32_t customer[ ISS_CUSTOMER_NWORDS1 + ISS_CUSTOMER_NWORDS2 ];
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646 /* Enable access to index sector */
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647 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS );
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649 /* Read two parts */
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650 target_read_memory( target, bank->base+ISS_CUSTOMER_START1, 4,
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651 ISS_CUSTOMER_NWORDS1,
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652 (uint8_t *)&customer[0] );
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653 target_read_memory( target, bank->base+ISS_CUSTOMER_START2, 4,
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654 ISS_CUSTOMER_NWORDS2,
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655 (uint8_t *)&customer[ISS_CUSTOMER_NWORDS1] );
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657 /* Deactivate access to index sector */
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658 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
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660 /* Try and open the file */
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662 char *filename = args[1];
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663 int ret = fileio_open( &fileio, filename, FILEIO_WRITE, FILEIO_BINARY );
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664 if( ret != ERROR_OK )
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666 LOG_WARNING( "Could not open file %s", filename );
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671 ret = fileio_write( &fileio, sizeof(customer),
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672 (const uint8_t *)customer, &nwritten );
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673 if( ret != ERROR_OK )
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675 LOG_ERROR( "Write operation to file %s failed", filename );
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676 fileio_close( &fileio );
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680 fileio_close( &fileio );
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689 * Enter password to enable potentially dangerous options.
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696 static int lpc2900_handle_password_command(struct command_context_s *cmd_ctx,
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697 char *cmd, char **args, int argc)
\r
699 flash_bank_t *bank;
\r
704 return ERROR_COMMAND_SYNTAX_ERROR;
\r
707 /* Get the bank descriptor */
\r
708 bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
\r
711 command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
\r
714 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
\r
716 #define ISS_PASSWORD "I_know_what_I_am_doing"
\r
718 lpc2900_info->risky = !strcmp( args[1], ISS_PASSWORD );
\r
720 if( !lpc2900_info->risky )
\r
722 command_print(cmd_ctx, "Wrong password (use '%s')", ISS_PASSWORD);
\r
723 return ERROR_COMMAND_ARGUMENT_INVALID;
\r
726 command_print(cmd_ctx,
\r
727 "Potentially dangerous operation allowed in next command!");
\r
735 * Write customer info from file to the index sector.
\r
742 static int lpc2900_handle_write_custom_command( struct command_context_s *cmd_ctx,
\r
743 char *cmd, char **args, int argc )
\r
747 return ERROR_COMMAND_SYNTAX_ERROR;
\r
750 /* Get the bank descriptor */
\r
751 flash_bank_t *bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
\r
754 command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
\r
757 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
\r
759 /* Check if command execution is allowed. */
\r
760 if( !lpc2900_info->risky )
\r
762 command_print( cmd_ctx, "Command execution not allowed!" );
\r
763 return ERROR_COMMAND_ARGUMENT_INVALID;
\r
765 lpc2900_info->risky = 0;
\r
767 /* Get target, and check if it's halted */
\r
768 target_t *target = bank->target;
\r
769 if (target->state != TARGET_HALTED)
\r
771 LOG_ERROR("Target not halted");
\r
772 return ERROR_TARGET_NOT_HALTED;
\r
775 /* The image will always start at offset 0 */
\r
777 image.base_address_set = 1;
\r
778 image.base_address = 0;
\r
779 image.start_address_set = 0;
\r
781 char *filename = args[1];
\r
782 char *type = (argc >= 3) ? args[2] : NULL;
\r
783 int retval = image_open(&image, filename, type);
\r
784 if (retval != ERROR_OK)
\r
789 /* Do a sanity check: The image must be exactly the size of the customer
\r
790 programmable area. Any other size is rejected. */
\r
791 if( image.num_sections != 1 )
\r
793 LOG_ERROR("Only one section allowed in image file.");
\r
794 return ERROR_COMMAND_SYNTAX_ERROR;
\r
796 if( (image.sections[0].base_address != 0) ||
\r
797 (image.sections[0].size != ISS_CUSTOMER_SIZE) )
\r
799 LOG_ERROR("Incorrect image file size. Expected %" PRIu32 ", got %" PRIu32,
\r
800 ISS_CUSTOMER_SIZE, image.sections[0].size);
\r
801 return ERROR_COMMAND_SYNTAX_ERROR;
\r
804 /* Well boys, I reckon this is it... */
\r
806 /* Customer info is split into two blocks in pages 4 and 5. */
\r
807 uint8_t page[FLASH_PAGE_SIZE];
\r
810 uint32_t offset = ISS_CUSTOMER_START1 % FLASH_PAGE_SIZE;
\r
811 memset( page, 0xff, FLASH_PAGE_SIZE );
\r
812 uint32_t size_read;
\r
813 retval = image_read_section( &image, 0, 0,
\r
814 ISS_CUSTOMER_SIZE1, &page[offset], &size_read);
\r
815 if( retval != ERROR_OK )
\r
817 LOG_ERROR("couldn't read from file '%s'", filename);
\r
818 image_close(&image);
\r
821 if( (retval = lpc2900_write_index_page( bank, 4, &page )) != ERROR_OK )
\r
823 image_close(&image);
\r
828 offset = ISS_CUSTOMER_START2 % FLASH_PAGE_SIZE;
\r
829 memset( page, 0xff, FLASH_PAGE_SIZE );
\r
830 retval = image_read_section( &image, 0, ISS_CUSTOMER_SIZE1,
\r
831 ISS_CUSTOMER_SIZE2, &page[offset], &size_read);
\r
832 if( retval != ERROR_OK )
\r
834 LOG_ERROR("couldn't read from file '%s'", filename);
\r
835 image_close(&image);
\r
838 if( (retval = lpc2900_write_index_page( bank, 5, &page )) != ERROR_OK )
\r
840 image_close(&image);
\r
844 image_close(&image);
\r
852 * Activate 'sector security' for a range of sectors.
\r
859 static int lpc2900_handle_secure_sector_command(struct command_context_s *cmd_ctx,
\r
860 char *cmd, char **args, int argc)
\r
864 return ERROR_COMMAND_SYNTAX_ERROR;
\r
867 /* Get the bank descriptor */
\r
868 flash_bank_t *bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
\r
871 command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
\r
874 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
\r
876 /* Check if command execution is allowed. */
\r
877 if( !lpc2900_info->risky )
\r
879 command_print( cmd_ctx, "Command execution not allowed! "
\r
880 "(use 'password' command first)");
\r
881 return ERROR_COMMAND_ARGUMENT_INVALID;
\r
883 lpc2900_info->risky = 0;
\r
885 /* Read sector range, and do a sanity check. */
\r
886 int first = strtoul(args[1], NULL, 0);
\r
887 int last = strtoul(args[2], NULL, 0);
\r
888 if( (first >= bank->num_sectors) ||
\r
889 (last >= bank->num_sectors) ||
\r
892 command_print( cmd_ctx, "Illegal sector range" );
\r
893 return ERROR_COMMAND_ARGUMENT_INVALID;
\r
896 uint8_t page[FLASH_PAGE_SIZE];
\r
900 /* Sectors in page 6 */
\r
901 if( (first <= 4) || (last >= 8) )
\r
903 memset( &page, 0xff, FLASH_PAGE_SIZE );
\r
904 for( sector = first; sector <= last; sector++ )
\r
908 memset( &page[0xB0 + 16*sector], 0, 16 );
\r
910 else if( sector >= 8 )
\r
912 memset( &page[0x00 + 16*(sector - 8)], 0, 16 );
\r
916 if( (retval = lpc2900_write_index_page( bank, 6, &page )) != ERROR_OK )
\r
918 LOG_ERROR("failed to update index sector page 6");
\r
923 /* Sectors in page 7 */
\r
924 if( (first <= 7) && (last >= 5) )
\r
926 memset( &page, 0xff, FLASH_PAGE_SIZE );
\r
927 for( sector = first; sector <= last; sector++ )
\r
929 if( (sector >= 5) && (sector <= 7) )
\r
931 memset( &page[0x00 + 16*(sector - 5)], 0, 16 );
\r
935 if( (retval = lpc2900_write_index_page( bank, 7, &page )) != ERROR_OK )
\r
937 LOG_ERROR("failed to update index sector page 7");
\r
942 command_print( cmd_ctx,
\r
943 "Sectors security will become effective after next power cycle");
\r
945 /* Update the sector security status */
\r
946 if ( lpc2900_read_security_status(bank) != ERROR_OK )
\r
948 LOG_ERROR( "Cannot determine sector security status" );
\r
949 return ERROR_FLASH_OPERATION_FAILED;
\r
958 * Activate JTAG protection.
\r
965 static int lpc2900_handle_secure_jtag_command(struct command_context_s *cmd_ctx,
\r
966 char *cmd, char **args, int argc)
\r
970 return ERROR_COMMAND_SYNTAX_ERROR;
\r
973 /* Get the bank descriptor */
\r
974 flash_bank_t *bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
\r
977 command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
\r
980 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
\r
982 /* Check if command execution is allowed. */
\r
983 if( !lpc2900_info->risky )
\r
985 command_print( cmd_ctx, "Command execution not allowed! "
\r
986 "(use 'password' command first)");
\r
987 return ERROR_COMMAND_ARGUMENT_INVALID;
\r
989 lpc2900_info->risky = 0;
\r
992 uint8_t page[FLASH_PAGE_SIZE];
\r
993 memset( &page, 0xff, FLASH_PAGE_SIZE );
\r
996 /* Insert "soft" protection word */
\r
997 page[0x30 + 15] = 0x7F;
\r
998 page[0x30 + 11] = 0x7F;
\r
999 page[0x30 + 7] = 0x7F;
\r
1000 page[0x30 + 3] = 0x7F;
\r
1002 /* Write to page 5 */
\r
1004 if( (retval = lpc2900_write_index_page( bank, 5, &page ))
\r
1007 LOG_ERROR("failed to update index sector page 5");
\r
1011 LOG_INFO("JTAG security set. Good bye!");
\r
1018 /*********************** Flash interface functions **************************/
\r
1022 * Register private command handlers.
\r
1026 static int lpc2900_register_commands(struct command_context_s *cmd_ctx)
\r
1028 command_t *lpc2900_cmd = register_command(cmd_ctx, NULL, "lpc2900",
\r
1029 NULL, COMMAND_ANY, NULL);
\r
1035 lpc2900_handle_signature_command,
\r
1038 "print device signature of flash bank");
\r
1044 lpc2900_handle_read_custom_command,
\r
1046 "<bank> <filename> | "
\r
1047 "read customer information from index sector to file");
\r
1053 lpc2900_handle_password_command,
\r
1055 "<bank> <password> | "
\r
1056 "enter password to enable 'dangerous' options");
\r
1062 lpc2900_handle_write_custom_command,
\r
1064 "<bank> <filename> [<type>] | "
\r
1065 "write customer info from file to index sector");
\r
1071 lpc2900_handle_secure_sector_command,
\r
1073 "<bank> <first> <last> | "
\r
1074 "activate sector security for a range of sectors");
\r
1080 lpc2900_handle_secure_jtag_command,
\r
1082 "<bank> <level> | "
\r
1083 "activate JTAG security");
\r
1090 * Evaluate flash bank command.
\r
1092 * Syntax: flash bank lpc2900 0 0 0 0 target# system_base_clock
\r
1098 * @param bank Pointer to the flash bank descriptor
\r
1100 static int lpc2900_flash_bank_command(struct command_context_s *cmd_ctx,
\r
1101 char *cmd, char **args, int argc,
\r
1102 struct flash_bank_s *bank)
\r
1104 lpc2900_flash_bank_t *lpc2900_info;
\r
1108 LOG_WARNING("incomplete flash_bank LPC2900 configuration");
\r
1109 return ERROR_FLASH_BANK_INVALID;
\r
1112 lpc2900_info = malloc(sizeof(lpc2900_flash_bank_t));
\r
1113 bank->driver_priv = lpc2900_info;
\r
1115 /* Get flash clock.
\r
1116 * Reject it if we can't meet the requirements for program time
\r
1117 * (if clock too slow), or for erase time (clock too fast).
\r
1119 lpc2900_info->clk_sys_fmc = strtoul(args[6], NULL, 0) * 1000;
\r
1121 uint32_t clock_limit;
\r
1122 /* Check program time limit */
\r
1123 clock_limit = 512000000l / FLASH_PROGRAM_TIME;
\r
1124 if (lpc2900_info->clk_sys_fmc < clock_limit)
\r
1126 LOG_WARNING("flash clock must be at least %" PRIu32 " kHz",
\r
1127 (clock_limit / 1000));
\r
1128 return ERROR_FLASH_BANK_INVALID;
\r
1131 /* Check erase time limit */
\r
1132 clock_limit = (uint32_t)((32767.0 * 512.0 * 1e6) / FLASH_ERASE_TIME);
\r
1133 if (lpc2900_info->clk_sys_fmc > clock_limit)
\r
1135 LOG_WARNING("flash clock must be a maximum of %" PRIu32" kHz",
\r
1136 (clock_limit / 1000));
\r
1137 return ERROR_FLASH_BANK_INVALID;
\r
1140 /* Chip ID will be obtained by probing the device later */
\r
1141 lpc2900_info->chipid = 0;
\r
1148 * Erase sector(s).
\r
1150 * @param bank Pointer to the flash bank descriptor
\r
1151 * @param first First sector to be erased
\r
1152 * @param last Last sector (including) to be erased
\r
1154 static int lpc2900_erase(struct flash_bank_s *bank, int first, int last)
\r
1158 int last_unsecured_sector;
\r
1159 target_t *target = bank->target;
\r
1160 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
\r
1163 status = lpc2900_is_ready(bank);
\r
1164 if (status != ERROR_OK)
\r
1169 /* Sanity check on sector range */
\r
1170 if ((first < 0) || (last < first) || (last >= bank->num_sectors))
\r
1172 LOG_INFO("Bad sector range");
\r
1173 return ERROR_FLASH_SECTOR_INVALID;
\r
1176 /* Update the info about secured sectors */
\r
1177 lpc2900_read_security_status( bank );
\r
1179 /* The selected sector range might include secured sectors. An attempt
\r
1180 * to erase such a sector will cause the erase to fail also for unsecured
\r
1181 * sectors. It is necessary to determine the last unsecured sector now,
\r
1182 * because we have to treat the last relevant sector in the list in
\r
1185 last_unsecured_sector = -1;
\r
1186 for (sector = first; sector <= last; sector++)
\r
1188 if ( !bank->sectors[sector].is_protected )
\r
1190 last_unsecured_sector = sector;
\r
1194 /* Exit now, in case of the rare constellation where all sectors in range
\r
1195 * are secured. This is regarded a success, since erasing/programming of
\r
1196 * secured sectors shall be handled transparently.
\r
1198 if ( last_unsecured_sector == -1 )
\r
1203 /* Enable flash block and set the correct CRA clock of 66 kHz */
\r
1204 lpc2900_setup(bank);
\r
1206 /* Clear END_OF_ERASE interrupt status */
\r
1207 target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_ERASE);
\r
1209 /* Set the program/erase timer to FLASH_ERASE_TIME */
\r
1210 target_write_u32(target, FPTR,
\r
1211 FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
\r
1212 FLASH_ERASE_TIME ));
\r
1214 /* Sectors are marked for erasure, then erased all together */
\r
1215 for (sector = first; sector <= last_unsecured_sector; sector++)
\r
1217 /* Only mark sectors that aren't secured. Any attempt to erase a group
\r
1218 * of sectors will fail if any single one of them is secured!
\r
1220 if ( !bank->sectors[sector].is_protected )
\r
1222 /* Unprotect the sector */
\r
1223 target_write_u32(target, bank->sectors[sector].offset, 0);
\r
1224 target_write_u32(target, FCTR,
\r
1225 FCTR_FS_LOADREQ | FCTR_FS_WPB |
\r
1226 FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
\r
1228 /* Mark the sector for erasure. The last sector in the list
\r
1229 triggers the erasure. */
\r
1230 target_write_u32(target, bank->sectors[sector].offset, 0);
\r
1231 if ( sector == last_unsecured_sector )
\r
1233 target_write_u32(target, FCTR,
\r
1234 FCTR_FS_PROGREQ | FCTR_FS_WPB | FCTR_FS_CS);
\r
1238 target_write_u32(target, FCTR,
\r
1239 FCTR_FS_LOADREQ | FCTR_FS_WPB |
\r
1240 FCTR_FS_WEB | FCTR_FS_CS);
\r
1245 /* Wait for the end of the erase operation. If it's not over after two seconds,
\r
1246 * something went dreadfully wrong... :-(
\r
1248 if( lpc2900_wait_status(bank, INTSRC_END_OF_ERASE, 2000) != ERROR_OK )
\r
1250 return ERROR_FLASH_OPERATION_FAILED;
\r
1253 /* Normal flash operating mode */
\r
1254 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
\r
1261 static int lpc2900_protect(struct flash_bank_s *bank, int set, int first, int last)
\r
1263 /* This command is not supported.
\r
1264 * "Protection" in LPC2900 terms is handled transparently. Sectors will
\r
1265 * automatically be unprotected as needed.
\r
1266 * Instead we use the concept of sector security. A secured sector is shown
\r
1267 * as "protected" in OpenOCD. Sector security is a permanent feature, and
\r
1268 * cannot be disabled once activated.
\r
1276 * Write data to flash.
\r
1278 * @param bank Pointer to the flash bank descriptor
\r
1279 * @param buffer Buffer with data
\r
1280 * @param offset Start address (relative to bank start)
\r
1281 * @param count Number of bytes to be programmed
\r
1283 static int lpc2900_write(struct flash_bank_s *bank, uint8_t *buffer,
\r
1284 uint32_t offset, uint32_t count)
\r
1286 uint8_t page[FLASH_PAGE_SIZE];
\r
1288 uint32_t num_bytes;
\r
1289 target_t *target = bank->target;
\r
1290 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
\r
1294 static const uint32_t write_target_code[] = {
\r
1295 /* Set auto latch mode: FCTR=CS|WRE|WEB */
\r
1296 0xe3a0a007, /* loop mov r10, #0x007 */
\r
1297 0xe583a000, /* str r10,[r3,#0] */
\r
1299 /* Load complete page into latches */
\r
1300 0xe3a06020, /* mov r6,#(512/16) */
\r
1301 0xe8b00f00, /* next ldmia r0!,{r8-r11} */
\r
1302 0xe8a10f00, /* stmia r1!,{r8-r11} */
\r
1303 0xe2566001, /* subs r6,#1 */
\r
1304 0x1afffffb, /* bne next */
\r
1306 /* Clear END_OF_BURN interrupt status */
\r
1307 0xe3a0a002, /* mov r10,#(1 << 1) */
\r
1308 0xe583afe8, /* str r10,[r3,#0xfe8] */
\r
1310 /* Set the erase time to FLASH_PROGRAM_TIME */
\r
1311 0xe5834008, /* str r4,[r3,#8] */
\r
1313 /* Trigger flash write
\r
1314 FCTR = CS | WRE | WPB | PROGREQ */
\r
1315 0xe3a0a083, /* mov r10,#0x83 */
\r
1316 0xe38aaa01, /* orr r10,#0x1000 */
\r
1317 0xe583a000, /* str r10,[r3,#0] */
\r
1319 /* Wait for end of burn */
\r
1320 0xe593afe0, /* wait ldr r10,[r3,#0xfe0] */
\r
1321 0xe21aa002, /* ands r10,#(1 << 1) */
\r
1322 0x0afffffc, /* beq wait */
\r
1325 0xe2522001, /* subs r2,#1 */
\r
1326 0x1affffed, /* bne loop */
\r
1328 0xeafffffe /* done b done */
\r
1332 status = lpc2900_is_ready(bank);
\r
1333 if (status != ERROR_OK)
\r
1338 /* Enable flash block and set the correct CRA clock of 66 kHz */
\r
1339 lpc2900_setup(bank);
\r
1341 /* Update the info about secured sectors */
\r
1342 lpc2900_read_security_status( bank );
\r
1344 /* Unprotect all involved sectors */
\r
1345 for (sector = 0; sector < bank->num_sectors; sector++)
\r
1347 /* Start address in or before this sector? */
\r
1348 /* End address in or behind this sector? */
\r
1349 if ( ((bank->base + offset) <
\r
1350 (bank->sectors[sector].offset + bank->sectors[sector].size)) &&
\r
1351 ((bank->base + (offset + count - 1)) >= bank->sectors[sector].offset) )
\r
1353 /* This sector is involved and needs to be unprotected.
\r
1354 * Don't do it for secured sectors.
\r
1356 if ( !bank->sectors[sector].is_protected )
\r
1358 target_write_u32(target, bank->sectors[sector].offset, 0);
\r
1359 target_write_u32(target, FCTR,
\r
1360 FCTR_FS_LOADREQ | FCTR_FS_WPB |
\r
1361 FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
\r
1366 /* Set the program/erase time to FLASH_PROGRAM_TIME */
\r
1367 uint32_t prog_time = FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
\r
1368 FLASH_PROGRAM_TIME );
\r
1370 /* If there is a working area of reasonable size, use it to program via
\r
1371 a target algorithm. If not, fall back to host programming. */
\r
1373 /* We need some room for target code. */
\r
1374 uint32_t target_code_size = sizeof(write_target_code);
\r
1376 /* Try working area allocation. Start with a large buffer, and try with
\r
1377 reduced size if that fails. */
\r
1378 working_area_t *warea;
\r
1379 uint32_t buffer_size = lpc2900_info->max_ram_block - 1 * KiB;
\r
1380 while( (retval = target_alloc_working_area(target,
\r
1381 buffer_size + target_code_size,
\r
1382 &warea)) != ERROR_OK )
\r
1384 /* Try a smaller buffer now, and stop if it's too small. */
\r
1385 buffer_size -= 1 * KiB;
\r
1386 if (buffer_size < 2 * KiB)
\r
1388 LOG_INFO( "no (large enough) working area"
\r
1389 ", falling back to host mode" );
\r
1397 reg_param_t reg_params[5];
\r
1398 armv4_5_algorithm_t armv4_5_info;
\r
1400 /* We can use target mode. Download the algorithm. */
\r
1401 retval = target_write_buffer( target,
\r
1402 (warea->address)+buffer_size,
\r
1404 (uint8_t *)write_target_code);
\r
1405 if (retval != ERROR_OK)
\r
1407 LOG_ERROR("Unable to write block write code to target");
\r
1408 target_free_all_working_areas(target);
\r
1409 return ERROR_FLASH_OPERATION_FAILED;
\r
1412 init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
\r
1413 init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
\r
1414 init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
\r
1415 init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
\r
1416 init_reg_param(®_params[4], "r4", 32, PARAM_OUT);
\r
1418 /* Write to flash in large blocks */
\r
1419 while ( count != 0 )
\r
1421 uint32_t this_npages;
\r
1422 uint8_t *this_buffer;
\r
1423 int start_sector = lpc2900_address2sector( bank, offset );
\r
1425 /* First page / last page / rest */
\r
1426 if( offset % FLASH_PAGE_SIZE )
\r
1428 /* Block doesn't start on page boundary.
\r
1429 Burn first partial page separately. */
\r
1430 memset( &page, 0xff, sizeof(page) );
\r
1431 memcpy( &page[offset % FLASH_PAGE_SIZE],
\r
1433 FLASH_PAGE_SIZE - (offset % FLASH_PAGE_SIZE) );
\r
1435 this_buffer = &page[0];
\r
1436 count = count + (offset % FLASH_PAGE_SIZE);
\r
1437 offset = offset - (offset % FLASH_PAGE_SIZE);
\r
1439 else if( count < FLASH_PAGE_SIZE )
\r
1441 /* Download last incomplete page separately. */
\r
1442 memset( &page, 0xff, sizeof(page) );
\r
1443 memcpy( &page, buffer, count );
\r
1445 this_buffer = &page[0];
\r
1446 count = FLASH_PAGE_SIZE;
\r
1450 /* Download as many full pages as possible */
\r
1451 this_npages = (count < buffer_size) ?
\r
1452 count / FLASH_PAGE_SIZE :
\r
1453 buffer_size / FLASH_PAGE_SIZE;
\r
1454 this_buffer = buffer;
\r
1456 /* Make sure we stop at the next secured sector */
\r
1457 int sector = start_sector + 1;
\r
1458 while( sector < bank->num_sectors )
\r
1461 if( bank->sectors[sector].is_protected )
\r
1463 /* Is that next sector within the current block? */
\r
1464 if( (bank->sectors[sector].offset - bank->base) <
\r
1465 (offset + (this_npages * FLASH_PAGE_SIZE)) )
\r
1467 /* Yes! Split the block */
\r
1469 (bank->sectors[sector].offset - bank->base - offset)
\r
1470 / FLASH_PAGE_SIZE;
\r
1479 /* Skip the current sector if it is secured */
\r
1480 if( bank->sectors[start_sector].is_protected )
\r
1482 LOG_DEBUG( "Skip secured sector %" PRIu32, start_sector );
\r
1484 /* Stop if this is the last sector */
\r
1485 if( start_sector == bank->num_sectors - 1 )
\r
1491 uint32_t nskip = bank->sectors[start_sector].size -
\r
1492 (offset % bank->sectors[start_sector].size);
\r
1495 count = (count >= nskip) ? (count - nskip) : 0;
\r
1499 /* Execute buffer download */
\r
1500 if ((retval = target_write_buffer(target,
\r
1502 this_npages * FLASH_PAGE_SIZE,
\r
1503 this_buffer)) != ERROR_OK)
\r
1505 LOG_ERROR("Unable to write data to target");
\r
1506 target_free_all_working_areas(target);
\r
1507 return ERROR_FLASH_OPERATION_FAILED;
\r
1510 /* Prepare registers */
\r
1511 buf_set_u32(reg_params[0].value, 0, 32, warea->address);
\r
1512 buf_set_u32(reg_params[1].value, 0, 32, offset);
\r
1513 buf_set_u32(reg_params[2].value, 0, 32, this_npages);
\r
1514 buf_set_u32(reg_params[3].value, 0, 32, FCTR);
\r
1515 buf_set_u32(reg_params[4].value, 0, 32, FPTR_EN_T | prog_time);
\r
1517 /* Execute algorithm, assume breakpoint for last instruction */
\r
1518 armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
\r
1519 armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
\r
1520 armv4_5_info.core_state = ARMV4_5_STATE_ARM;
\r
1522 retval = target_run_algorithm(target, 0, NULL, 5, reg_params,
\r
1523 (warea->address) + buffer_size,
\r
1524 (warea->address) + buffer_size + target_code_size - 4,
\r
1525 10000, /* 10s should be enough for max. 16 KiB of data */
\r
1528 if (retval != ERROR_OK)
\r
1530 LOG_ERROR("Execution of flash algorithm failed.");
\r
1531 target_free_all_working_areas(target);
\r
1532 retval = ERROR_FLASH_OPERATION_FAILED;
\r
1536 count -= this_npages * FLASH_PAGE_SIZE;
\r
1537 buffer += this_npages * FLASH_PAGE_SIZE;
\r
1538 offset += this_npages * FLASH_PAGE_SIZE;
\r
1541 /* Free all resources */
\r
1542 destroy_reg_param(®_params[0]);
\r
1543 destroy_reg_param(®_params[1]);
\r
1544 destroy_reg_param(®_params[2]);
\r
1545 destroy_reg_param(®_params[3]);
\r
1546 destroy_reg_param(®_params[4]);
\r
1547 target_free_all_working_areas(target);
\r
1551 /* Write to flash memory page-wise */
\r
1552 while ( count != 0 )
\r
1554 /* How many bytes do we copy this time? */
\r
1555 num_bytes = (count >= FLASH_PAGE_SIZE) ?
\r
1556 FLASH_PAGE_SIZE - (offset % FLASH_PAGE_SIZE) :
\r
1559 /* Don't do anything with it if the page is in a secured sector. */
\r
1560 if ( !bank->sectors[lpc2900_address2sector(bank, offset)].is_protected )
\r
1562 /* Set latch load mode */
\r
1563 target_write_u32(target, FCTR,
\r
1564 FCTR_FS_CS | FCTR_FS_WRE | FCTR_FS_WEB);
\r
1566 /* Always clear the buffer (a little overhead, but who cares) */
\r
1567 memset(page, 0xFF, FLASH_PAGE_SIZE);
\r
1569 /* Copy them to the buffer */
\r
1570 memcpy( &page[offset % FLASH_PAGE_SIZE],
\r
1571 &buffer[offset % FLASH_PAGE_SIZE],
\r
1574 /* Write whole page to flash data latches */
\r
1575 if (target_write_memory(
\r
1577 bank->base + (offset - (offset % FLASH_PAGE_SIZE)),
\r
1578 4, FLASH_PAGE_SIZE / 4, page) != ERROR_OK)
\r
1580 LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
\r
1581 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
\r
1583 return ERROR_FLASH_OPERATION_FAILED;
\r
1586 /* Clear END_OF_BURN interrupt status */
\r
1587 target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_BURN);
\r
1589 /* Set the programming time */
\r
1590 target_write_u32(target, FPTR, FPTR_EN_T | prog_time);
\r
1592 /* Trigger flash write */
\r
1593 target_write_u32(target, FCTR,
\r
1594 FCTR_FS_CS | FCTR_FS_WRE | FCTR_FS_WPB | FCTR_FS_PROGREQ);
\r
1596 /* Wait for the end of the write operation. If it's not over
\r
1597 * after one second, something went dreadfully wrong... :-(
\r
1599 if (lpc2900_wait_status(bank, INTSRC_END_OF_BURN, 1000) != ERROR_OK)
\r
1601 LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
\r
1602 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
\r
1604 return ERROR_FLASH_OPERATION_FAILED;
\r
1608 /* Update pointers and counters */
\r
1609 offset += num_bytes;
\r
1610 buffer += num_bytes;
\r
1611 count -= num_bytes;
\r
1614 retval = ERROR_OK;
\r
1617 /* Normal flash operating mode */
\r
1618 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
\r
1625 * Try and identify the device.
\r
1627 * Determine type number and its memory layout.
\r
1629 * @param bank Pointer to the flash bank descriptor
\r
1631 static int lpc2900_probe(struct flash_bank_s *bank)
\r
1633 lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
\r
1634 target_t *target = bank->target;
\r
1639 if (target->state != TARGET_HALTED)
\r
1641 LOG_ERROR("Target not halted");
\r
1642 return ERROR_TARGET_NOT_HALTED;
\r
1645 /* We want to do this only once. Check if we already have a valid CHIPID,
\r
1646 * because then we will have already successfully probed the device.
\r
1648 if (lpc2900_info->chipid == EXPECTED_CHIPID)
\r
1653 /* Probing starts with reading the CHIPID register. We will continue only
\r
1654 * if this identifies as an LPC2900 device.
\r
1656 target_read_u32(target, CHIPID, &lpc2900_info->chipid);
\r
1658 if (lpc2900_info->chipid != EXPECTED_CHIPID)
\r
1660 LOG_WARNING("Device is not an LPC29xx");
\r
1661 return ERROR_FLASH_OPERATION_FAILED;
\r
1664 /* It's an LPC29xx device. Now read the feature register FEAT0...FEAT3. */
\r
1665 uint32_t feat0, feat1, feat2, feat3;
\r
1666 target_read_u32(target, FEAT0, &feat0);
\r
1667 target_read_u32(target, FEAT1, &feat1);
\r
1668 target_read_u32(target, FEAT2, &feat2);
\r
1669 target_read_u32(target, FEAT3, &feat3);
\r
1671 /* Base address */
\r
1672 bank->base = 0x20000000;
\r
1674 /* Determine flash layout from FEAT2 register */
\r
1675 uint32_t num_64k_sectors = (feat2 >> 16) & 0xFF;
\r
1676 uint32_t num_8k_sectors = (feat2 >> 0) & 0xFF;
\r
1677 bank->num_sectors = num_64k_sectors + num_8k_sectors;
\r
1678 bank->size = KiB * (64 * num_64k_sectors + 8 * num_8k_sectors);
\r
1680 /* Determine maximum contiguous RAM block */
\r
1681 lpc2900_info->max_ram_block = 16 * KiB;
\r
1682 if( (feat1 & 0x30) == 0x30 )
\r
1684 lpc2900_info->max_ram_block = 32 * KiB;
\r
1685 if( (feat1 & 0x0C) == 0x0C )
\r
1687 lpc2900_info->max_ram_block = 48 * KiB;
\r
1691 /* Determine package code and ITCM size */
\r
1692 uint32_t package_code = feat0 & 0x0F;
\r
1693 uint32_t itcm_code = (feat1 >> 16) & 0x1F;
\r
1695 /* Determine the exact type number. */
\r
1696 uint32_t found = 1;
\r
1697 if ( (package_code == 4) && (itcm_code == 5) )
\r
1699 /* Old LPC2917 or LPC2919 (non-/01 devices) */
\r
1700 lpc2900_info->target_name = (bank->size == 768*KiB) ? "LPC2919" : "LPC2917";
\r
1704 if ( package_code == 2 )
\r
1706 /* 100-pin package */
\r
1707 if ( bank->size == 128*KiB )
\r
1709 lpc2900_info->target_name = "LPC2921";
\r
1711 else if ( bank->size == 256*KiB )
\r
1713 lpc2900_info->target_name = "LPC2923";
\r
1715 else if ( bank->size == 512*KiB )
\r
1717 lpc2900_info->target_name = "LPC2925";
\r
1724 else if ( package_code == 4 )
\r
1726 /* 144-pin package */
\r
1727 if ( (bank->size == 512*KiB) && (feat3 == 0xFFFFFCF0) )
\r
1729 lpc2900_info->target_name = "LPC2917/01";
\r
1731 else if ( (bank->size == 512*KiB) && (feat3 == 0xFFFFFFF1) )
\r
1733 lpc2900_info->target_name = "LPC2927";
\r
1735 else if ( (bank->size == 768*KiB) && (feat3 == 0xFFFFFCF8) )
\r
1737 lpc2900_info->target_name = "LPC2919/01";
\r
1739 else if ( (bank->size == 768*KiB) && (feat3 == 0xFFFFFFF9) )
\r
1741 lpc2900_info->target_name = "LPC2929";
\r
1748 else if ( package_code == 5 )
\r
1750 /* 208-pin package */
\r
1751 lpc2900_info->target_name = (bank->size == 0) ? "LPC2930" : "LPC2939";
\r
1761 LOG_WARNING("Unknown LPC29xx derivative");
\r
1762 return ERROR_FLASH_OPERATION_FAILED;
\r
1765 /* Show detected device */
\r
1766 LOG_INFO("Flash bank %" PRIu32
\r
1767 ": Device %s, %" PRIu32
\r
1768 " KiB in %" PRIu32 " sectors",
\r
1769 bank->bank_number,
\r
1770 lpc2900_info->target_name, bank->size / KiB,
\r
1771 bank->num_sectors);
\r
1773 /* Flashless devices cannot be handled */
\r
1774 if ( bank->num_sectors == 0 )
\r
1776 LOG_WARNING("Flashless device cannot be handled");
\r
1777 return ERROR_FLASH_OPERATION_FAILED;
\r
1781 * These are logical sector numbers. When doing real flash operations,
\r
1782 * the logical flash number are translated into the physical flash numbers
\r
1785 bank->sectors = malloc(sizeof(flash_sector_t) * bank->num_sectors);
\r
1788 for (i = 0; i < bank->num_sectors; i++)
\r
1790 bank->sectors[i].offset = offset;
\r
1791 bank->sectors[i].is_erased = -1;
\r
1792 bank->sectors[i].is_protected = -1;
\r
1796 bank->sectors[i].size = 8 * KiB;
\r
1798 else if ( i <= 18 )
\r
1800 bank->sectors[i].size = 64 * KiB;
\r
1804 /* We shouldn't come here. But there might be a new part out there
\r
1805 * that has more than 19 sectors. Politely ask for a fix then.
\r
1807 bank->sectors[i].size = 0;
\r
1808 LOG_ERROR("Never heard about sector %" PRIu32 " (FIXME please)", i);
\r
1811 offset += bank->sectors[i].size;
\r
1814 /* Read sector security status */
\r
1815 if ( lpc2900_read_security_status(bank) != ERROR_OK )
\r
1817 LOG_ERROR("Cannot determine sector security status");
\r
1818 return ERROR_FLASH_OPERATION_FAILED;
\r
1826 * Run a blank check for each sector.
\r
1828 * For speed reasons, the device isn't read word by word.
\r
1829 * A hash value is calculated by the hardware ("BIST") for each sector.
\r
1830 * This value is then compared against the known hash of an empty sector.
\r
1832 * @param bank Pointer to the flash bank descriptor
\r
1834 static int lpc2900_erase_check(struct flash_bank_s *bank)
\r
1836 uint32_t status = lpc2900_is_ready(bank);
\r
1837 if (status != ERROR_OK)
\r
1839 LOG_INFO("Processor not halted/not probed");
\r
1843 /* Use the BIST (Built-In Selft Test) to generate a signature of each flash
\r
1844 * sector. Compare against the expected signature of an empty sector.
\r
1847 for ( sector = 0; sector < bank->num_sectors; sector++ )
\r
1849 uint32_t signature[4];
\r
1850 if ( (status = lpc2900_run_bist128( bank,
\r
1851 bank->sectors[sector].offset,
\r
1852 bank->sectors[sector].offset +
\r
1853 (bank->sectors[sector].size - 1),
\r
1854 &signature)) != ERROR_OK )
\r
1859 /* The expected signatures for an empty sector are different
\r
1860 * for 8 KiB and 64 KiB sectors.
\r
1862 if ( bank->sectors[sector].size == 8*KiB )
\r
1864 bank->sectors[sector].is_erased =
\r
1865 (signature[3] == 0x01ABAAAA) &&
\r
1866 (signature[2] == 0xAAAAAAAA) &&
\r
1867 (signature[1] == 0xAAAAAAAA) &&
\r
1868 (signature[0] == 0xAAA00AAA);
\r
1870 if ( bank->sectors[sector].size == 64*KiB )
\r
1872 bank->sectors[sector].is_erased =
\r
1873 (signature[3] == 0x11801222) &&
\r
1874 (signature[2] == 0xB88844FF) &&
\r
1875 (signature[1] == 0x11A22008) &&
\r
1876 (signature[0] == 0x2B1BFE44);
\r
1885 * Get protection (sector security) status.
\r
1887 * Determine the status of "sector security" for each sector.
\r
1888 * A secured sector is one that can never be erased/programmed again.
\r
1890 * @param bank Pointer to the flash bank descriptor
\r
1892 static int lpc2900_protect_check(struct flash_bank_s *bank)
\r
1894 return lpc2900_read_security_status(bank);
\r
1899 * Print info about the driver (not the device).
\r
1901 * @param bank Pointer to the flash bank descriptor
\r
1902 * @param buf Buffer to take the string
\r
1903 * @param buf_size Maximum number of characters that the buffer can take
\r
1905 static int lpc2900_info(struct flash_bank_s *bank, char *buf, int buf_size)
\r
1907 snprintf(buf, buf_size, "lpc2900 flash driver");
\r
1913 flash_driver_t lpc2900_flash =
\r
1915 .name = "lpc2900",
\r
1916 .register_commands = lpc2900_register_commands,
\r
1917 .flash_bank_command = lpc2900_flash_bank_command,
\r
1918 .erase = lpc2900_erase,
\r
1919 .protect = lpc2900_protect,
\r
1920 .write = lpc2900_write,
\r
1921 .probe = lpc2900_probe,
\r
1922 .auto_probe = lpc2900_probe,
\r
1923 .erase_check = lpc2900_erase_check,
\r
1924 .protect_check = lpc2900_protect_check,
\r
1925 .info = lpc2900_info
\r