image_t -> struct image
[fw/openocd] / src / flash / lpc2900.c
1 /***************************************************************************
2  *   Copyright (C) 2009 by                                                 *
3  *   Rolf Meeser <rolfm_9dq@yahoo.de>                                      *
4  *                                                                         *
5  *   This program is free software; you can redistribute it and/or modify  *
6  *   it under the terms of the GNU General Public License as published by  *
7  *   the Free Software Foundation; either version 2 of the License, or     *
8  *   (at your option) any later version.                                   *
9  *                                                                         *
10  *   This program is distributed in the hope that it will be useful,       *
11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
13  *   GNU General Public License for more details.                          *
14  *                                                                         *
15  *   You should have received a copy of the GNU General Public License     *
16  *   along with this program; if not, write to the                         *
17  *   Free Software Foundation, Inc.,                                       *
18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
19  ***************************************************************************/
20
21 #ifdef HAVE_CONFIG_H
22 #include "config.h"
23 #endif
24
25
26 #include "image.h"
27
28 #include "lpc2900.h"
29 #include "binarybuffer.h"
30 #include "armv4_5.h"
31
32
33 /* 1024 bytes */
34 #define KiB                 1024
35
36 /* Some flash constants */
37 #define FLASH_PAGE_SIZE     512     /* bytes */
38 #define FLASH_ERASE_TIME    100000  /* microseconds */
39 #define FLASH_PROGRAM_TIME  1000    /* microseconds */
40
41 /* Chip ID / Feature Registers */
42 #define CHIPID          0xE0000000  /* Chip ID */
43 #define FEAT0           0xE0000100  /* Chip feature 0 */
44 #define FEAT1           0xE0000104  /* Chip feature 1 */
45 #define FEAT2           0xE0000108  /* Chip feature 2 (contains flash size indicator) */
46 #define FEAT3           0xE000010C  /* Chip feature 3 */
47
48 #define EXPECTED_CHIPID 0x209CE02B  /* Chip ID of all LPC2900 devices */
49
50 /* Flash/EEPROM Control Registers */
51 #define FCTR            0x20200000  /* Flash control */
52 #define FPTR            0x20200008  /* Flash program-time */
53 #define FTCTR           0x2020000C  /* Flash test control */
54 #define FBWST           0x20200010  /* Flash bridge wait-state */
55 #define FCRA            0x2020001C  /* Flash clock divider */
56 #define FMSSTART        0x20200020  /* Flash Built-In Selft Test start address */
57 #define FMSSTOP         0x20200024  /* Flash Built-In Selft Test stop address */
58 #define FMS16           0x20200028  /* Flash 16-bit signature */
59 #define FMSW0           0x2020002C  /* Flash 128-bit signature Word 0 */
60 #define FMSW1           0x20200030  /* Flash 128-bit signature Word 1 */
61 #define FMSW2           0x20200034  /* Flash 128-bit signature Word 2 */
62 #define FMSW3           0x20200038  /* Flash 128-bit signature Word 3 */
63
64 #define EECMD           0x20200080  /* EEPROM command */
65 #define EEADDR          0x20200084  /* EEPROM address */
66 #define EEWDATA         0x20200088  /* EEPROM write data */
67 #define EERDATA         0x2020008C  /* EEPROM read data */
68 #define EEWSTATE        0x20200090  /* EEPROM wait state */
69 #define EECLKDIV        0x20200094  /* EEPROM clock divider */
70 #define EEPWRDWN        0x20200098  /* EEPROM power-down/start */
71 #define EEMSSTART       0x2020009C  /* EEPROM BIST start address */
72 #define EEMSSTOP        0x202000A0  /* EEPROM BIST stop address */
73 #define EEMSSIG         0x202000A4  /* EEPROM 24-bit BIST signature */
74
75 #define INT_CLR_ENABLE  0x20200FD8  /* Flash/EEPROM interrupt clear enable */
76 #define INT_SET_ENABLE  0x20200FDC  /* Flash/EEPROM interrupt set enable */
77 #define INT_STATUS      0x20200FE0  /* Flash/EEPROM interrupt status */
78 #define INT_ENABLE      0x20200FE4  /* Flash/EEPROM interrupt enable */
79 #define INT_CLR_STATUS  0x20200FE8  /* Flash/EEPROM interrupt clear status */
80 #define INT_SET_STATUS  0x20200FEC  /* Flash/EEPROM interrupt set status */
81
82 /* Interrupt sources */
83 #define INTSRC_END_OF_PROG    (1 << 28)
84 #define INTSRC_END_OF_BIST    (1 << 27)
85 #define INTSRC_END_OF_RDWR    (1 << 26)
86 #define INTSRC_END_OF_MISR    (1 << 2)
87 #define INTSRC_END_OF_BURN    (1 << 1)
88 #define INTSRC_END_OF_ERASE   (1 << 0)
89
90
91 /* FCTR bits */
92 #define FCTR_FS_LOADREQ       (1 << 15)
93 #define FCTR_FS_CACHECLR      (1 << 14)
94 #define FCTR_FS_CACHEBYP      (1 << 13)
95 #define FCTR_FS_PROGREQ       (1 << 12)
96 #define FCTR_FS_RLS           (1 << 11)
97 #define FCTR_FS_PDL           (1 << 10)
98 #define FCTR_FS_PD            (1 << 9)
99 #define FCTR_FS_WPB           (1 << 7)
100 #define FCTR_FS_ISS           (1 << 6)
101 #define FCTR_FS_RLD           (1 << 5)
102 #define FCTR_FS_DCR           (1 << 4)
103 #define FCTR_FS_WEB           (1 << 2)
104 #define FCTR_FS_WRE           (1 << 1)
105 #define FCTR_FS_CS            (1 << 0)
106 /* FPTR bits */
107 #define FPTR_EN_T             (1 << 15)
108 /* FTCTR bits */
109 #define FTCTR_FS_BYPASS_R     (1 << 29)
110 #define FTCTR_FS_BYPASS_W     (1 << 28)
111 /* FMSSTOP bits */
112 #define FMSSTOP_MISR_START    (1 << 17)
113 /* EEMSSTOP bits */
114 #define EEMSSTOP_STRTBIST     (1 << 31)
115
116 /* Index sector */
117 #define ISS_CUSTOMER_START1   (0x830)
118 #define ISS_CUSTOMER_END1     (0xA00)
119 #define ISS_CUSTOMER_SIZE1    (ISS_CUSTOMER_END1 - ISS_CUSTOMER_START1)
120 #define ISS_CUSTOMER_NWORDS1  (ISS_CUSTOMER_SIZE1 / 4)
121 #define ISS_CUSTOMER_START2   (0xA40)
122 #define ISS_CUSTOMER_END2     (0xC00)
123 #define ISS_CUSTOMER_SIZE2    (ISS_CUSTOMER_END2 - ISS_CUSTOMER_START2)
124 #define ISS_CUSTOMER_NWORDS2  (ISS_CUSTOMER_SIZE2 / 4)
125 #define ISS_CUSTOMER_SIZE     (ISS_CUSTOMER_SIZE1 + ISS_CUSTOMER_SIZE2)
126
127
128
129 /**
130  * Private data for \c lpc2900 flash driver.
131  */
132 struct lpc2900_flash_bank
133 {
134         /**
135          * Holds the value read from CHIPID register.
136          * The driver will not load if the chipid doesn't match the expected
137          * value of 0x209CE02B of the LPC2900 family. A probe will only be done
138          * if the chipid does not yet contain the expected value.
139          */
140         uint32_t chipid;
141
142         /**
143          * String holding device name.
144          * This string is set by the probe function to the type number of the
145          * device. It takes the form "LPC29xx".
146          */
147         char * target_name;
148
149         /**
150          * System clock frequency.
151          * Holds the clock frequency in Hz, as passed by the configuration file
152          * to the <tt>flash bank</tt> command.
153          */
154         uint32_t clk_sys_fmc;
155
156         /**
157          * Flag to indicate that dangerous operations are possible.
158          * This flag can be set by passing the correct password to the
159          * <tt>lpc2900 password</tt> command. If set, other dangerous commands,
160          * which operate on the index sector, can be executed.
161          */
162         uint32_t risky;
163
164         /**
165          * Maximum contiguous block of internal SRAM (bytes).
166          * Autodetected by the driver. Not the total amount of SRAM, only the
167          * the largest \em contiguous block!
168          */
169         uint32_t max_ram_block;
170
171 };
172
173
174 static uint32_t lpc2900_wait_status(flash_bank_t *bank, uint32_t mask, int timeout);
175 static void lpc2900_setup(struct flash_bank_s *bank);
176 static uint32_t lpc2900_is_ready(struct flash_bank_s *bank);
177 static uint32_t lpc2900_read_security_status(struct flash_bank_s *bank);
178 static uint32_t lpc2900_run_bist128(struct flash_bank_s *bank,
179                                     uint32_t addr_from, uint32_t addr_to,
180                                     uint32_t (*signature)[4] );
181 static uint32_t lpc2900_address2sector(struct flash_bank_s *bank, uint32_t offset);
182 static uint32_t lpc2900_calc_tr( uint32_t clock, uint32_t time );
183
184
185 /***********************  Helper functions  **************************/
186
187
188 /**
189  * Wait for an event in mask to occur in INT_STATUS.
190  *
191  * Return when an event occurs, or after a timeout.
192  *
193  * @param[in] bank Pointer to the flash bank descriptor
194  * @param[in] mask Mask to be used for INT_STATUS
195  * @param[in] timeout Timeout in ms
196  */
197 static uint32_t lpc2900_wait_status( flash_bank_t *bank,
198                                      uint32_t mask,
199                                      int timeout )
200 {
201         uint32_t int_status;
202         target_t *target = bank->target;
203
204
205         do
206         {
207                 alive_sleep(1);
208                 timeout--;
209                 target_read_u32(target, INT_STATUS, &int_status);
210         }
211         while( ((int_status & mask) == 0) && (timeout != 0) );
212
213         if (timeout == 0)
214         {
215                 LOG_DEBUG("Timeout!");
216                 return ERROR_FLASH_OPERATION_FAILED;
217         }
218
219         return ERROR_OK;
220 }
221
222
223
224 /**
225  * Set up the flash for erase/program operations.
226  *
227  * Enable the flash, and set the correct CRA clock of 66 kHz.
228  *
229  * @param bank Pointer to the flash bank descriptor
230  */
231 static void lpc2900_setup( struct flash_bank_s *bank )
232 {
233         uint32_t fcra;
234         struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
235
236
237         /* Power up the flash block */
238         target_write_u32( bank->target, FCTR, FCTR_FS_WEB | FCTR_FS_CS );
239
240
241         fcra = (lpc2900_info->clk_sys_fmc / (3 * 66000)) - 1;
242         target_write_u32( bank->target, FCRA, fcra );
243 }
244
245
246
247 /**
248  * Check if device is ready.
249  *
250  * Check if device is ready for flash operation:
251  * Must have been successfully probed.
252  * Must be halted.
253  */
254 static uint32_t lpc2900_is_ready( struct flash_bank_s *bank )
255 {
256         struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
257
258         if( lpc2900_info->chipid != EXPECTED_CHIPID )
259         {
260                 return ERROR_FLASH_BANK_NOT_PROBED;
261         }
262
263         if( bank->target->state != TARGET_HALTED )
264         {
265                 LOG_ERROR( "Target not halted" );
266                 return ERROR_TARGET_NOT_HALTED;
267         }
268
269         return ERROR_OK;
270 }
271
272
273 /**
274  * Read the status of sector security from the index sector.
275  *
276  * @param bank Pointer to the flash bank descriptor
277  */
278 static uint32_t lpc2900_read_security_status( struct flash_bank_s *bank )
279 {
280         uint32_t status;
281         if( (status = lpc2900_is_ready( bank )) != ERROR_OK )
282         {
283                 return status;
284         }
285
286         target_t *target = bank->target;
287
288         /* Enable ISS access */
289         target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS);
290
291         /* Read the relevant block of memory from the ISS sector */
292         uint32_t iss_secured_field[ 0x230/16 ][ 4 ];
293         target_read_memory(target, bank->base + 0xC00, 4, 0x230/4,
294                                    (uint8_t *)iss_secured_field);
295
296         /* Disable ISS access */
297         target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
298
299         /* Check status of each sector. Note that the sector numbering in the LPC2900
300          * is different from the logical sector numbers used in OpenOCD!
301          * Refer to the user manual for details.
302          *
303          * All zeros (16x 0x00) are treated as a secured sector (is_protected = 1)
304          * All ones (16x 0xFF) are treated as a non-secured sector (is_protected = 0)
305          * Anything else is undefined (is_protected = -1). This is treated as
306          * a protected sector!
307          */
308         int sector;
309         int index;
310         for( sector = 0; sector < bank->num_sectors; sector++ )
311         {
312                 /* Convert logical sector number to physical sector number */
313                 if( sector <= 4 )
314                 {
315                         index = sector + 11;
316                 }
317                 else if( sector <= 7 )
318                 {
319                         index = sector + 27;
320                 }
321                 else
322                 {
323                         index = sector - 8;
324                 }
325
326                 bank->sectors[sector].is_protected = -1;
327
328                 if (
329                     (iss_secured_field[index][0] == 0x00000000) &&
330                     (iss_secured_field[index][1] == 0x00000000) &&
331                     (iss_secured_field[index][2] == 0x00000000) &&
332                     (iss_secured_field[index][3] == 0x00000000) )
333                 {
334                         bank->sectors[sector].is_protected = 1;
335                 }
336
337                 if (
338                     (iss_secured_field[index][0] == 0xFFFFFFFF) &&
339                     (iss_secured_field[index][1] == 0xFFFFFFFF) &&
340                     (iss_secured_field[index][2] == 0xFFFFFFFF) &&
341                     (iss_secured_field[index][3] == 0xFFFFFFFF) )
342                 {
343                         bank->sectors[sector].is_protected = 0;
344                 }
345         }
346
347         return ERROR_OK;
348 }
349
350
351 /**
352  * Use BIST to calculate a 128-bit hash value over a range of flash.
353  *
354  * @param bank Pointer to the flash bank descriptor
355  * @param addr_from
356  * @param addr_to
357  * @param signature
358  */
359 static uint32_t lpc2900_run_bist128(struct flash_bank_s *bank,
360                                     uint32_t addr_from,
361                                     uint32_t addr_to,
362                                     uint32_t (*signature)[4] )
363 {
364         target_t *target = bank->target;
365
366         /* Clear END_OF_MISR interrupt status */
367         target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_MISR );
368
369         /* Start address */
370         target_write_u32( target, FMSSTART, addr_from >> 4);
371         /* End address, and issue start command */
372         target_write_u32( target, FMSSTOP, (addr_to >> 4) | FMSSTOP_MISR_START );
373
374         /* Poll for end of operation. Calculate a reasonable timeout. */
375         if( lpc2900_wait_status( bank, INTSRC_END_OF_MISR, 1000 ) != ERROR_OK )
376         {
377                 return ERROR_FLASH_OPERATION_FAILED;
378         }
379
380         /* Return the signature */
381         target_read_memory( target, FMSW0, 4, 4, (uint8_t *)signature );
382
383         return ERROR_OK;
384 }
385
386
387 /**
388  * Return sector number for given address.
389  *
390  * Return the (logical) sector number for a given relative address.
391  * No sanity check is done. It assumed that the address is valid.
392  *
393  * @param bank Pointer to the flash bank descriptor
394  * @param offset Offset address relative to bank start
395  */
396 static uint32_t lpc2900_address2sector( struct flash_bank_s *bank,
397                                         uint32_t offset )
398 {
399         uint32_t address = bank->base + offset;
400
401
402         /* Run through all sectors of this bank */
403         int sector;
404         for( sector = 0; sector < bank->num_sectors; sector++ )
405         {
406                 /* Return immediately if address is within the current sector */
407                 if( address < (bank->sectors[sector].offset + bank->sectors[sector].size) )
408                 {
409                         return sector;
410                 }
411         }
412
413         /* We should never come here. If we do, return an arbitrary sector number. */
414         return 0;
415 }
416
417
418
419
420 /**
421  * Write one page to the index sector.
422  *
423  * @param bank Pointer to the flash bank descriptor
424  * @param pagenum Page number (0...7)
425  * @param page Page array (FLASH_PAGE_SIZE bytes)
426  */
427 static int lpc2900_write_index_page( struct flash_bank_s *bank,
428                                      int pagenum,
429                                      uint8_t (*page)[FLASH_PAGE_SIZE] )
430 {
431         /* Only pages 4...7 are user writable */
432         if ((pagenum < 4) || (pagenum > 7))
433         {
434                 LOG_ERROR("Refuse to burn index sector page %d", pagenum);
435                 return ERROR_COMMAND_ARGUMENT_INVALID;
436         }
437
438         /* Get target, and check if it's halted */
439         target_t *target = bank->target;
440         if( target->state != TARGET_HALTED )
441         {
442                 LOG_ERROR( "Target not halted" );
443                 return ERROR_TARGET_NOT_HALTED;
444         }
445
446         /* Private info */
447         struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
448
449         /* Enable flash block and set the correct CRA clock of 66 kHz */
450         lpc2900_setup( bank );
451
452         /* Un-protect the index sector */
453         target_write_u32( target, bank->base, 0 );
454         target_write_u32( target, FCTR,
455                           FCTR_FS_LOADREQ | FCTR_FS_WPB | FCTR_FS_ISS |
456                           FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS );
457
458         /* Set latch load mode */
459         target_write_u32( target, FCTR,
460                           FCTR_FS_ISS | FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS );
461
462         /* Write whole page to flash data latches */
463         if( target_write_memory( target,
464                                  bank->base + pagenum * FLASH_PAGE_SIZE,
465                                  4, FLASH_PAGE_SIZE / 4, (uint8_t *)page) != ERROR_OK )
466         {
467                 LOG_ERROR("Index sector write failed @ page %d", pagenum);
468                 target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
469
470                 return ERROR_FLASH_OPERATION_FAILED;
471         }
472
473         /* Clear END_OF_BURN interrupt status */
474         target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_BURN );
475
476         /* Set the program/erase time to FLASH_PROGRAM_TIME */
477         target_write_u32(target, FPTR,
478                          FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
479                                                       FLASH_PROGRAM_TIME ));
480
481         /* Trigger flash write */
482         target_write_u32( target, FCTR,
483                           FCTR_FS_PROGREQ | FCTR_FS_ISS |
484                           FCTR_FS_WPB | FCTR_FS_WRE | FCTR_FS_CS );
485
486         /* Wait for the end of the write operation. If it's not over after one
487          * second, something went dreadfully wrong... :-(
488          */
489         if (lpc2900_wait_status(bank, INTSRC_END_OF_BURN, 1000) != ERROR_OK)
490         {
491                 LOG_ERROR("Index sector write failed @ page %d", pagenum);
492                 target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
493
494                 return ERROR_FLASH_OPERATION_FAILED;
495         }
496
497         target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
498
499         return ERROR_OK;
500 }
501
502
503
504 /**
505  * Calculate FPTR.TR register value for desired program/erase time.
506  *
507  * @param clock System clock in Hz
508  * @param time Program/erase time in Âµs
509  */
510 static uint32_t lpc2900_calc_tr( uint32_t clock, uint32_t time )
511 {
512         /*           ((time[µs]/1e6) * f[Hz]) + 511
513          * FPTR.TR = -------------------------------
514          *                         512
515          *
516          * The result is the
517          */
518
519         uint32_t tr_val = (uint32_t)((((time / 1e6) * clock) + 511.0) / 512.0);
520
521         return tr_val;
522 }
523
524
525 /***********************  Private flash commands  **************************/
526
527
528 /**
529  * Command to determine the signature of the whole flash.
530  *
531  * Uses the Built-In-Self-Test (BIST) to generate a 128-bit hash value
532  * of the flash content.
533  */
534 COMMAND_HANDLER(lpc2900_handle_signature_command)
535 {
536         uint32_t status;
537         uint32_t signature[4];
538
539
540         if( argc < 1 )
541         {
542                 LOG_WARNING( "Too few arguments. Call: lpc2900 signature <bank#>" );
543                 return ERROR_FLASH_BANK_INVALID;
544         }
545
546         flash_bank_t *bank;
547         int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
548         if (ERROR_OK != retval)
549                 return retval;
550
551         if( bank->target->state != TARGET_HALTED )
552         {
553                 LOG_ERROR( "Target not halted" );
554                 return ERROR_TARGET_NOT_HALTED;
555         }
556
557         /* Run BIST over whole flash range */
558         if( (status = lpc2900_run_bist128( bank,
559                                            bank->base,
560                                            bank->base + (bank->size - 1),
561                                            &signature)
562                                          ) != ERROR_OK )
563         {
564                 return status;
565         }
566
567         command_print( cmd_ctx, "signature: 0x%8.8" PRIx32
568                                           ":0x%8.8" PRIx32
569                                           ":0x%8.8" PRIx32
570                                           ":0x%8.8" PRIx32,
571                       signature[3], signature[2], signature[1], signature[0] );
572
573         return ERROR_OK;
574 }
575
576
577
578 /**
579  * Store customer info in file.
580  *
581  * Read customer info from index sector, and store that block of data into
582  * a disk file. The format is binary.
583  */
584 COMMAND_HANDLER(lpc2900_handle_read_custom_command)
585 {
586         if( argc < 2 )
587         {
588                 return ERROR_COMMAND_SYNTAX_ERROR;
589         }
590
591         flash_bank_t *bank;
592         int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
593         if (ERROR_OK != retval)
594                 return retval;
595
596         struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
597         lpc2900_info->risky = 0;
598
599         /* Get target, and check if it's halted */
600         target_t *target = bank->target;
601         if( target->state != TARGET_HALTED )
602         {
603                 LOG_ERROR( "Target not halted" );
604                 return ERROR_TARGET_NOT_HALTED;
605         }
606
607         /* Storage for customer info. Read in two parts */
608         uint32_t customer[ ISS_CUSTOMER_NWORDS1 + ISS_CUSTOMER_NWORDS2 ];
609
610         /* Enable access to index sector */
611         target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS );
612
613         /* Read two parts */
614         target_read_memory( target, bank->base+ISS_CUSTOMER_START1, 4,
615                                     ISS_CUSTOMER_NWORDS1,
616                                     (uint8_t *)&customer[0] );
617         target_read_memory( target, bank->base+ISS_CUSTOMER_START2, 4,
618                                     ISS_CUSTOMER_NWORDS2,
619                                     (uint8_t *)&customer[ISS_CUSTOMER_NWORDS1] );
620
621         /* Deactivate access to index sector */
622         target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
623
624         /* Try and open the file */
625         struct fileio fileio;
626         const char *filename = args[1];
627         int ret = fileio_open( &fileio, filename, FILEIO_WRITE, FILEIO_BINARY );
628         if( ret != ERROR_OK )
629         {
630                 LOG_WARNING( "Could not open file %s", filename );
631                 return ret;
632         }
633
634         uint32_t nwritten;
635         ret = fileio_write( &fileio, sizeof(customer),
636                         (const uint8_t *)customer, &nwritten );
637         if( ret != ERROR_OK )
638         {
639                 LOG_ERROR( "Write operation to file %s failed", filename );
640                 fileio_close( &fileio );
641                 return ret;
642         }
643
644         fileio_close( &fileio );
645
646         return ERROR_OK;
647 }
648
649
650
651
652 /**
653  * Enter password to enable potentially dangerous options.
654  */
655 COMMAND_HANDLER(lpc2900_handle_password_command)
656 {
657         if (argc < 2)
658         {
659                 return ERROR_COMMAND_SYNTAX_ERROR;
660         }
661
662         flash_bank_t *bank;
663         int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
664         if (ERROR_OK != retval)
665                 return retval;
666
667         struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
668
669 #define ISS_PASSWORD "I_know_what_I_am_doing"
670
671         lpc2900_info->risky = !strcmp( args[1], ISS_PASSWORD );
672
673         if( !lpc2900_info->risky )
674         {
675                 command_print(cmd_ctx, "Wrong password (use '%s')", ISS_PASSWORD);
676                 return ERROR_COMMAND_ARGUMENT_INVALID;
677         }
678
679         command_print(cmd_ctx,
680                   "Potentially dangerous operation allowed in next command!");
681
682         return ERROR_OK;
683 }
684
685
686
687 /**
688  * Write customer info from file to the index sector.
689  */
690 COMMAND_HANDLER(lpc2900_handle_write_custom_command)
691 {
692         if (argc < 2)
693         {
694                 return ERROR_COMMAND_SYNTAX_ERROR;
695         }
696
697         flash_bank_t *bank;
698         int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
699         if (ERROR_OK != retval)
700                 return retval;
701
702         struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
703
704         /* Check if command execution is allowed. */
705         if( !lpc2900_info->risky )
706         {
707                 command_print( cmd_ctx, "Command execution not allowed!" );
708                 return ERROR_COMMAND_ARGUMENT_INVALID;
709         }
710         lpc2900_info->risky = 0;
711
712         /* Get target, and check if it's halted */
713         target_t *target = bank->target;
714         if (target->state != TARGET_HALTED)
715         {
716                 LOG_ERROR("Target not halted");
717                 return ERROR_TARGET_NOT_HALTED;
718         }
719
720         /* The image will always start at offset 0 */
721         struct image image;
722         image.base_address_set = 1;
723         image.base_address = 0;
724         image.start_address_set = 0;
725
726         const char *filename = args[1];
727         const char *type = (argc >= 3) ? args[2] : NULL;
728         retval = image_open(&image, filename, type);
729         if (retval != ERROR_OK)
730         {
731                 return retval;
732         }
733
734         /* Do a sanity check: The image must be exactly the size of the customer
735            programmable area. Any other size is rejected. */
736         if( image.num_sections != 1 )
737         {
738                 LOG_ERROR("Only one section allowed in image file.");
739                 return ERROR_COMMAND_SYNTAX_ERROR;
740         }
741         if( (image.sections[0].base_address != 0) ||
742         (image.sections[0].size != ISS_CUSTOMER_SIZE) )
743         {
744                 LOG_ERROR("Incorrect image file size. Expected %d, "
745                         "got %" PRIu32,
746                    ISS_CUSTOMER_SIZE, image.sections[0].size);
747                 return ERROR_COMMAND_SYNTAX_ERROR;
748         }
749
750         /* Well boys, I reckon this is it... */
751
752         /* Customer info is split into two blocks in pages 4 and 5. */
753         uint8_t page[FLASH_PAGE_SIZE];
754
755         /* Page 4 */
756         uint32_t offset = ISS_CUSTOMER_START1 % FLASH_PAGE_SIZE;
757         memset( page, 0xff, FLASH_PAGE_SIZE );
758         uint32_t size_read;
759         retval = image_read_section( &image, 0, 0,
760                                      ISS_CUSTOMER_SIZE1, &page[offset], &size_read);
761         if( retval != ERROR_OK )
762         {
763                 LOG_ERROR("couldn't read from file '%s'", filename);
764                 image_close(&image);
765                 return retval;
766         }
767         if( (retval = lpc2900_write_index_page( bank, 4, &page )) != ERROR_OK )
768         {
769                 image_close(&image);
770                 return retval;
771         }
772
773         /* Page 5 */
774         offset = ISS_CUSTOMER_START2 % FLASH_PAGE_SIZE;
775         memset( page, 0xff, FLASH_PAGE_SIZE );
776         retval = image_read_section( &image, 0, ISS_CUSTOMER_SIZE1,
777                                      ISS_CUSTOMER_SIZE2, &page[offset], &size_read);
778         if( retval != ERROR_OK )
779         {
780                 LOG_ERROR("couldn't read from file '%s'", filename);
781                 image_close(&image);
782                 return retval;
783         }
784         if( (retval = lpc2900_write_index_page( bank, 5, &page )) != ERROR_OK )
785         {
786                 image_close(&image);
787                 return retval;
788         }
789
790         image_close(&image);
791
792         return ERROR_OK;
793 }
794
795
796
797 /**
798  * Activate 'sector security' for a range of sectors.
799  */
800 COMMAND_HANDLER(lpc2900_handle_secure_sector_command)
801 {
802         if (argc < 3)
803         {
804                 return ERROR_COMMAND_SYNTAX_ERROR;
805         }
806
807         /* Get the bank descriptor */
808         flash_bank_t *bank;
809         int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
810         if (ERROR_OK != retval)
811                 return retval;
812
813         struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
814
815         /* Check if command execution is allowed. */
816         if( !lpc2900_info->risky )
817         {
818                 command_print( cmd_ctx, "Command execution not allowed! "
819                 "(use 'password' command first)");
820                 return ERROR_COMMAND_ARGUMENT_INVALID;
821         }
822         lpc2900_info->risky = 0;
823
824         /* Read sector range, and do a sanity check. */
825         int first, last;
826         COMMAND_PARSE_NUMBER(int, args[1], first);
827         COMMAND_PARSE_NUMBER(int, args[2], last);
828         if( (first >= bank->num_sectors) ||
829             (last >= bank->num_sectors) ||
830             (first > last) )
831         {
832                 command_print( cmd_ctx, "Illegal sector range" );
833                 return ERROR_COMMAND_ARGUMENT_INVALID;
834         }
835
836         uint8_t page[FLASH_PAGE_SIZE];
837         int sector;
838
839         /* Sectors in page 6 */
840         if( (first <= 4) || (last >= 8) )
841         {
842                 memset( &page, 0xff, FLASH_PAGE_SIZE );
843                 for( sector = first; sector <= last; sector++ )
844                 {
845                         if( sector <= 4 )
846                         {
847                                 memset( &page[0xB0 + 16*sector], 0, 16 );
848                         }
849                         else if( sector >= 8 )
850                         {
851                                 memset( &page[0x00 + 16*(sector - 8)], 0, 16 );
852                         }
853                 }
854
855                 if( (retval = lpc2900_write_index_page( bank, 6, &page )) != ERROR_OK )
856                 {
857                         LOG_ERROR("failed to update index sector page 6");
858                         return retval;
859                 }
860         }
861
862         /* Sectors in page 7 */
863         if( (first <= 7) && (last >= 5) )
864         {
865                 memset( &page, 0xff, FLASH_PAGE_SIZE );
866                 for( sector = first; sector <= last; sector++ )
867                 {
868                         if( (sector >= 5) && (sector <= 7) )
869                         {
870                                 memset( &page[0x00 + 16*(sector - 5)], 0, 16 );
871                         }
872                 }
873
874                 if( (retval = lpc2900_write_index_page( bank, 7, &page )) != ERROR_OK )
875                 {
876                         LOG_ERROR("failed to update index sector page 7");
877                         return retval;
878                 }
879         }
880
881         command_print( cmd_ctx,
882                 "Sectors security will become effective after next power cycle");
883
884         /* Update the sector security status */
885         if ( lpc2900_read_security_status(bank) != ERROR_OK )
886         {
887                 LOG_ERROR( "Cannot determine sector security status" );
888                 return ERROR_FLASH_OPERATION_FAILED;
889         }
890
891         return ERROR_OK;
892 }
893
894
895
896 /**
897  * Activate JTAG protection.
898  */
899 COMMAND_HANDLER(lpc2900_handle_secure_jtag_command)
900 {
901         if (argc < 1)
902         {
903                 return ERROR_COMMAND_SYNTAX_ERROR;
904         }
905
906         /* Get the bank descriptor */
907         flash_bank_t *bank;
908         int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
909         if (ERROR_OK != retval)
910                 return retval;
911
912         struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
913
914         /* Check if command execution is allowed. */
915         if( !lpc2900_info->risky )
916         {
917                 command_print( cmd_ctx, "Command execution not allowed! "
918                                         "(use 'password' command first)");
919                 return ERROR_COMMAND_ARGUMENT_INVALID;
920         }
921         lpc2900_info->risky = 0;
922
923         /* Prepare page */
924         uint8_t page[FLASH_PAGE_SIZE];
925         memset( &page, 0xff, FLASH_PAGE_SIZE );
926
927
928         /* Insert "soft" protection word */
929         page[0x30 + 15] = 0x7F;
930         page[0x30 + 11] = 0x7F;
931         page[0x30 +  7] = 0x7F;
932         page[0x30 +  3] = 0x7F;
933
934         /* Write to page 5 */
935         if( (retval = lpc2900_write_index_page( bank, 5, &page ))
936                         != ERROR_OK )
937         {
938                 LOG_ERROR("failed to update index sector page 5");
939                 return retval;
940         }
941
942         LOG_INFO("JTAG security set. Good bye!");
943
944         return ERROR_OK;
945 }
946
947
948
949 /***********************  Flash interface functions  **************************/
950
951
952 /**
953  * Register private command handlers.
954  */
955 static int lpc2900_register_commands(struct command_context_s *cmd_ctx)
956 {
957         command_t *lpc2900_cmd = register_command(cmd_ctx, NULL, "lpc2900",
958                                                   NULL, COMMAND_ANY, NULL);
959
960         register_command(
961             cmd_ctx,
962             lpc2900_cmd,
963             "signature",
964             lpc2900_handle_signature_command,
965             COMMAND_EXEC,
966             "<bank> | "
967             "print device signature of flash bank");
968
969         register_command(
970             cmd_ctx,
971             lpc2900_cmd,
972             "read_custom",
973             lpc2900_handle_read_custom_command,
974             COMMAND_EXEC,
975             "<bank> <filename> | "
976             "read customer information from index sector to file");
977
978         register_command(
979             cmd_ctx,
980             lpc2900_cmd,
981             "password",
982             lpc2900_handle_password_command,
983             COMMAND_EXEC,
984             "<bank> <password> | "
985             "enter password to enable 'dangerous' options");
986
987         register_command(
988             cmd_ctx,
989             lpc2900_cmd,
990             "write_custom",
991             lpc2900_handle_write_custom_command,
992             COMMAND_EXEC,
993             "<bank> <filename> [<type>] | "
994             "write customer info from file to index sector");
995
996         register_command(
997             cmd_ctx,
998             lpc2900_cmd,
999             "secure_sector",
1000             lpc2900_handle_secure_sector_command,
1001             COMMAND_EXEC,
1002             "<bank> <first> <last> | "
1003             "activate sector security for a range of sectors");
1004
1005         register_command(
1006             cmd_ctx,
1007             lpc2900_cmd,
1008             "secure_jtag",
1009             lpc2900_handle_secure_jtag_command,
1010             COMMAND_EXEC,
1011             "<bank> <level> | "
1012             "activate JTAG security");
1013
1014         return ERROR_OK;
1015 }
1016
1017
1018 /// Evaluate flash bank command.
1019 FLASH_BANK_COMMAND_HANDLER(lpc2900_flash_bank_command)
1020 {
1021         struct lpc2900_flash_bank *lpc2900_info;
1022
1023         if (argc < 6)
1024         {
1025                 LOG_WARNING("incomplete flash_bank LPC2900 configuration");
1026                 return ERROR_FLASH_BANK_INVALID;
1027         }
1028
1029         lpc2900_info = malloc(sizeof(struct lpc2900_flash_bank));
1030         bank->driver_priv = lpc2900_info;
1031
1032         /* Get flash clock.
1033          * Reject it if we can't meet the requirements for program time
1034          * (if clock too slow), or for erase time (clock too fast).
1035          */
1036         uint32_t clk_sys_fmc;
1037         COMMAND_PARSE_NUMBER(u32, args[6], clk_sys_fmc);
1038         lpc2900_info->clk_sys_fmc = clk_sys_fmc * 1000;
1039
1040         uint32_t clock_limit;
1041         /* Check program time limit */
1042         clock_limit = 512000000l / FLASH_PROGRAM_TIME;
1043         if (lpc2900_info->clk_sys_fmc < clock_limit)
1044         {
1045                 LOG_WARNING("flash clock must be at least %" PRIu32 " kHz",
1046                     (clock_limit / 1000));
1047                 return ERROR_FLASH_BANK_INVALID;
1048         }
1049
1050         /* Check erase time limit */
1051         clock_limit = (uint32_t)((32767.0 * 512.0 * 1e6) / FLASH_ERASE_TIME);
1052         if (lpc2900_info->clk_sys_fmc > clock_limit)
1053         {
1054                 LOG_WARNING("flash clock must be a maximum of %" PRIu32" kHz",
1055                     (clock_limit / 1000));
1056                 return ERROR_FLASH_BANK_INVALID;
1057         }
1058
1059         /* Chip ID will be obtained by probing the device later */
1060         lpc2900_info->chipid = 0;
1061
1062         return ERROR_OK;
1063 }
1064
1065
1066 /**
1067  * Erase sector(s).
1068  *
1069  * @param bank Pointer to the flash bank descriptor
1070  * @param first First sector to be erased
1071  * @param last Last sector (including) to be erased
1072  */
1073 static int lpc2900_erase(struct flash_bank_s *bank, int first, int last)
1074 {
1075         uint32_t status;
1076         int sector;
1077         int last_unsecured_sector;
1078         target_t *target = bank->target;
1079         struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
1080
1081
1082         status = lpc2900_is_ready(bank);
1083         if (status != ERROR_OK)
1084         {
1085                 return status;
1086         }
1087
1088         /* Sanity check on sector range */
1089         if ((first < 0) || (last < first) || (last >= bank->num_sectors))
1090         {
1091                 LOG_INFO("Bad sector range");
1092                 return ERROR_FLASH_SECTOR_INVALID;
1093         }
1094
1095         /* Update the info about secured sectors */
1096         lpc2900_read_security_status( bank );
1097
1098         /* The selected sector range might include secured sectors. An attempt
1099          * to erase such a sector will cause the erase to fail also for unsecured
1100          * sectors. It is necessary to determine the last unsecured sector now,
1101          * because we have to treat the last relevant sector in the list in
1102          * a special way.
1103          */
1104         last_unsecured_sector = -1;
1105         for (sector = first; sector <= last; sector++)
1106         {
1107                 if ( !bank->sectors[sector].is_protected )
1108                 {
1109                         last_unsecured_sector = sector;
1110                 }
1111         }
1112
1113         /* Exit now, in case of the rare constellation where all sectors in range
1114          * are secured. This is regarded a success, since erasing/programming of
1115          * secured sectors shall be handled transparently.
1116          */
1117         if ( last_unsecured_sector == -1 )
1118         {
1119                 return ERROR_OK;
1120         }
1121
1122         /* Enable flash block and set the correct CRA clock of 66 kHz */
1123         lpc2900_setup(bank);
1124
1125         /* Clear END_OF_ERASE interrupt status */
1126         target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_ERASE);
1127
1128         /* Set the program/erase timer to FLASH_ERASE_TIME */
1129         target_write_u32(target, FPTR,
1130                          FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
1131                                                       FLASH_ERASE_TIME ));
1132
1133         /* Sectors are marked for erasure, then erased all together */
1134         for (sector = first; sector <= last_unsecured_sector; sector++)
1135         {
1136                 /* Only mark sectors that aren't secured. Any attempt to erase a group
1137                  * of sectors will fail if any single one of them is secured!
1138                  */
1139                 if ( !bank->sectors[sector].is_protected )
1140                 {
1141                         /* Unprotect the sector */
1142                         target_write_u32(target, bank->sectors[sector].offset, 0);
1143                         target_write_u32(target, FCTR,
1144                                          FCTR_FS_LOADREQ | FCTR_FS_WPB |
1145                                          FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
1146
1147                         /* Mark the sector for erasure. The last sector in the list
1148                            triggers the erasure. */
1149                         target_write_u32(target, bank->sectors[sector].offset, 0);
1150                         if ( sector == last_unsecured_sector )
1151                         {
1152                                 target_write_u32(target, FCTR,
1153                                                  FCTR_FS_PROGREQ | FCTR_FS_WPB | FCTR_FS_CS);
1154                         }
1155                         else
1156                         {
1157                                 target_write_u32(target, FCTR,
1158                                                  FCTR_FS_LOADREQ | FCTR_FS_WPB |
1159                                                  FCTR_FS_WEB | FCTR_FS_CS);
1160                         }
1161                 }
1162         }
1163
1164         /* Wait for the end of the erase operation. If it's not over after two seconds,
1165          * something went dreadfully wrong... :-(
1166          */
1167         if( lpc2900_wait_status(bank, INTSRC_END_OF_ERASE, 2000) != ERROR_OK )
1168         {
1169                 return ERROR_FLASH_OPERATION_FAILED;
1170         }
1171
1172         /* Normal flash operating mode */
1173         target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
1174
1175         return ERROR_OK;
1176 }
1177
1178
1179
1180 static int lpc2900_protect(struct flash_bank_s *bank, int set, int first, int last)
1181 {
1182         /* This command is not supported.
1183      * "Protection" in LPC2900 terms is handled transparently. Sectors will
1184      * automatically be unprotected as needed.
1185      * Instead we use the concept of sector security. A secured sector is shown
1186      * as "protected" in OpenOCD. Sector security is a permanent feature, and
1187      * cannot be disabled once activated.
1188      */
1189
1190         return ERROR_OK;
1191 }
1192
1193
1194 /**
1195  * Write data to flash.
1196  *
1197  * @param bank Pointer to the flash bank descriptor
1198  * @param buffer Buffer with data
1199  * @param offset Start address (relative to bank start)
1200  * @param count Number of bytes to be programmed
1201  */
1202 static int lpc2900_write(struct flash_bank_s *bank, uint8_t *buffer,
1203                          uint32_t offset, uint32_t count)
1204 {
1205         uint8_t page[FLASH_PAGE_SIZE];
1206         uint32_t status;
1207         uint32_t num_bytes;
1208         target_t *target = bank->target;
1209         struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
1210         int sector;
1211         int retval;
1212
1213         static const uint32_t write_target_code[] = {
1214                 /* Set auto latch mode: FCTR=CS|WRE|WEB */
1215                 0xe3a0a007,   /* loop       mov r10, #0x007 */
1216                 0xe583a000,   /*            str r10,[r3,#0] */
1217
1218                 /* Load complete page into latches */
1219                 0xe3a06020,   /*            mov r6,#(512/16) */
1220                 0xe8b00f00,   /* next       ldmia r0!,{r8-r11} */
1221                 0xe8a10f00,   /*            stmia r1!,{r8-r11} */
1222                 0xe2566001,   /*            subs r6,#1 */
1223                 0x1afffffb,   /*            bne next */
1224
1225                 /* Clear END_OF_BURN interrupt status */
1226                 0xe3a0a002,   /*            mov r10,#(1 << 1) */
1227                 0xe583afe8,   /*            str r10,[r3,#0xfe8] */
1228
1229                 /* Set the erase time to FLASH_PROGRAM_TIME */
1230                 0xe5834008,   /*            str r4,[r3,#8] */
1231
1232                 /* Trigger flash write
1233                         FCTR = CS | WRE | WPB | PROGREQ */
1234                 0xe3a0a083,   /*            mov r10,#0x83 */
1235                 0xe38aaa01,   /*            orr r10,#0x1000 */
1236                 0xe583a000,   /*            str r10,[r3,#0] */
1237
1238                 /* Wait for end of burn */
1239                 0xe593afe0,   /* wait       ldr r10,[r3,#0xfe0] */
1240                 0xe21aa002,   /*            ands r10,#(1 << 1) */
1241                 0x0afffffc,   /*            beq wait */
1242
1243                 /* End? */
1244                 0xe2522001,   /*            subs r2,#1 */
1245                 0x1affffed,   /*            bne loop */
1246
1247                 0xeafffffe    /* done       b done */
1248         };
1249
1250
1251         status = lpc2900_is_ready(bank);
1252         if (status != ERROR_OK)
1253         {
1254                 return status;
1255         }
1256
1257         /* Enable flash block and set the correct CRA clock of 66 kHz */
1258         lpc2900_setup(bank);
1259
1260         /* Update the info about secured sectors */
1261         lpc2900_read_security_status( bank );
1262
1263         /* Unprotect all involved sectors */
1264         for (sector = 0; sector < bank->num_sectors; sector++)
1265         {
1266                 /* Start address in or before this sector? */
1267                 /* End address in or behind this sector? */
1268                 if ( ((bank->base + offset) <
1269                           (bank->sectors[sector].offset + bank->sectors[sector].size)) &&
1270                      ((bank->base + (offset + count - 1)) >= bank->sectors[sector].offset) )
1271                 {
1272                         /* This sector is involved and needs to be unprotected.
1273                                 * Don't do it for secured sectors.
1274                                 */
1275                         if ( !bank->sectors[sector].is_protected )
1276                         {
1277                                 target_write_u32(target, bank->sectors[sector].offset, 0);
1278                                 target_write_u32(target, FCTR,
1279                                                  FCTR_FS_LOADREQ | FCTR_FS_WPB |
1280                                                  FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
1281                         }
1282                 }
1283         }
1284
1285         /* Set the program/erase time to FLASH_PROGRAM_TIME */
1286         uint32_t prog_time = FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
1287                                                           FLASH_PROGRAM_TIME );
1288
1289         /* If there is a working area of reasonable size, use it to program via
1290            a target algorithm. If not, fall back to host programming. */
1291
1292         /* We need some room for target code. */
1293         uint32_t target_code_size = sizeof(write_target_code);
1294
1295         /* Try working area allocation. Start with a large buffer, and try with
1296            reduced size if that fails. */
1297         struct working_area *warea;
1298         uint32_t buffer_size = lpc2900_info->max_ram_block - 1 * KiB;
1299         while( (retval = target_alloc_working_area(target,
1300                                                    buffer_size + target_code_size,
1301                                                    &warea)) != ERROR_OK )
1302         {
1303                 /* Try a smaller buffer now, and stop if it's too small. */
1304                 buffer_size -= 1 * KiB;
1305                 if (buffer_size < 2 * KiB)
1306                 {
1307                         LOG_INFO( "no (large enough) working area"
1308                                   ", falling back to host mode" );
1309                         warea = NULL;
1310                         break;
1311                 }
1312         };
1313
1314         if( warea )
1315         {
1316                 struct reg_param reg_params[5];
1317                 struct armv4_5_algorithm armv4_5_info;
1318
1319                 /* We can use target mode. Download the algorithm. */
1320                 retval = target_write_buffer( target,
1321                                               (warea->address)+buffer_size,
1322                                               target_code_size,
1323                                               (uint8_t *)write_target_code);
1324                 if (retval != ERROR_OK)
1325                 {
1326                         LOG_ERROR("Unable to write block write code to target");
1327                         target_free_all_working_areas(target);
1328                         return ERROR_FLASH_OPERATION_FAILED;
1329                 }
1330
1331                 init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
1332                 init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
1333                 init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
1334                 init_reg_param(&reg_params[3], "r3", 32, PARAM_OUT);
1335                 init_reg_param(&reg_params[4], "r4", 32, PARAM_OUT);
1336
1337                 /* Write to flash in large blocks */
1338                 while ( count != 0 )
1339                 {
1340                         uint32_t this_npages;
1341                         uint8_t *this_buffer;
1342                         int start_sector = lpc2900_address2sector( bank, offset );
1343
1344                         /* First page / last page / rest */
1345                         if( offset % FLASH_PAGE_SIZE )
1346                         {
1347                                 /* Block doesn't start on page boundary.
1348                                    Burn first partial page separately. */
1349                                 memset( &page, 0xff, sizeof(page) );
1350                                 memcpy( &page[offset % FLASH_PAGE_SIZE],
1351                                         buffer,
1352                                         FLASH_PAGE_SIZE - (offset % FLASH_PAGE_SIZE) );
1353                                 this_npages = 1;
1354                                 this_buffer = &page[0];
1355                                 count = count + (offset % FLASH_PAGE_SIZE);
1356                                 offset = offset - (offset % FLASH_PAGE_SIZE);
1357                         }
1358                         else if( count < FLASH_PAGE_SIZE )
1359                         {
1360                                 /* Download last incomplete page separately. */
1361                                 memset( &page, 0xff, sizeof(page) );
1362                                 memcpy( &page, buffer, count );
1363                                 this_npages = 1;
1364                                 this_buffer = &page[0];
1365                                 count = FLASH_PAGE_SIZE;
1366                         }
1367                         else
1368                         {
1369                                 /* Download as many full pages as possible */
1370                                 this_npages = (count < buffer_size) ?
1371                                                count / FLASH_PAGE_SIZE :
1372                                                buffer_size / FLASH_PAGE_SIZE;
1373                                 this_buffer = buffer;
1374
1375                                 /* Make sure we stop at the next secured sector */
1376                                 int sector = start_sector + 1;
1377                                 while( sector < bank->num_sectors )
1378                                 {
1379                                         /* Secured? */
1380                                         if( bank->sectors[sector].is_protected )
1381                                         {
1382                                                 /* Is that next sector within the current block? */
1383                                                 if( (bank->sectors[sector].offset - bank->base) <
1384                                                         (offset + (this_npages * FLASH_PAGE_SIZE)) )
1385                                                 {
1386                                                         /* Yes! Split the block */
1387                                                         this_npages =
1388                                                           (bank->sectors[sector].offset - bank->base - offset)
1389                                                               / FLASH_PAGE_SIZE;
1390                                                         break;
1391                                                 }
1392                                         }
1393
1394                                         sector++;
1395                                 }
1396                         }
1397
1398                         /* Skip the current sector if it is secured */
1399                         if (bank->sectors[start_sector].is_protected)
1400                         {
1401                                 LOG_DEBUG("Skip secured sector %d",
1402                                                 start_sector);
1403
1404                                 /* Stop if this is the last sector */
1405                                 if (start_sector == bank->num_sectors - 1)
1406                                 {
1407                                         break;
1408                                 }
1409
1410                                 /* Skip */
1411                                 uint32_t nskip = bank->sectors[start_sector].size -
1412                                                  (offset % bank->sectors[start_sector].size);
1413                                 offset += nskip;
1414                                 buffer += nskip;
1415                                 count = (count >= nskip) ? (count - nskip) : 0;
1416                                 continue;
1417                         }
1418
1419                         /* Execute buffer download */
1420                         if ((retval = target_write_buffer(target,
1421                                                           warea->address,
1422                                                           this_npages * FLASH_PAGE_SIZE,
1423                                                           this_buffer)) != ERROR_OK)
1424                         {
1425                                 LOG_ERROR("Unable to write data to target");
1426                                 target_free_all_working_areas(target);
1427                                 return ERROR_FLASH_OPERATION_FAILED;
1428                         }
1429
1430                         /* Prepare registers */
1431                         buf_set_u32(reg_params[0].value, 0, 32, warea->address);
1432                         buf_set_u32(reg_params[1].value, 0, 32, offset);
1433                         buf_set_u32(reg_params[2].value, 0, 32, this_npages);
1434                         buf_set_u32(reg_params[3].value, 0, 32, FCTR);
1435                         buf_set_u32(reg_params[4].value, 0, 32, FPTR_EN_T | prog_time);
1436
1437                         /* Execute algorithm, assume breakpoint for last instruction */
1438                         armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
1439                         armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
1440                         armv4_5_info.core_state = ARMV4_5_STATE_ARM;
1441
1442                         retval = target_run_algorithm(target, 0, NULL, 5, reg_params,
1443                                 (warea->address) + buffer_size,
1444                                 (warea->address) + buffer_size + target_code_size - 4,
1445                                 10000, /* 10s should be enough for max. 16 KiB of data */
1446                                 &armv4_5_info);
1447
1448                         if (retval != ERROR_OK)
1449                         {
1450                                 LOG_ERROR("Execution of flash algorithm failed.");
1451                                 target_free_all_working_areas(target);
1452                                 retval = ERROR_FLASH_OPERATION_FAILED;
1453                                 break;
1454                         }
1455
1456                         count -= this_npages * FLASH_PAGE_SIZE;
1457                         buffer += this_npages * FLASH_PAGE_SIZE;
1458                         offset += this_npages * FLASH_PAGE_SIZE;
1459                 }
1460
1461                 /* Free all resources */
1462                 destroy_reg_param(&reg_params[0]);
1463                 destroy_reg_param(&reg_params[1]);
1464                 destroy_reg_param(&reg_params[2]);
1465                 destroy_reg_param(&reg_params[3]);
1466                 destroy_reg_param(&reg_params[4]);
1467                 target_free_all_working_areas(target);
1468         }
1469         else
1470         {
1471                 /* Write to flash memory page-wise */
1472                 while ( count != 0 )
1473                 {
1474                         /* How many bytes do we copy this time? */
1475                         num_bytes = (count >= FLASH_PAGE_SIZE) ?
1476                                     FLASH_PAGE_SIZE - (offset % FLASH_PAGE_SIZE) :
1477                                     count;
1478
1479                         /* Don't do anything with it if the page is in a secured sector. */
1480                         if ( !bank->sectors[lpc2900_address2sector(bank, offset)].is_protected )
1481                         {
1482                                 /* Set latch load mode */
1483                                 target_write_u32(target, FCTR,
1484                                                  FCTR_FS_CS | FCTR_FS_WRE | FCTR_FS_WEB);
1485
1486                                 /* Always clear the buffer (a little overhead, but who cares) */
1487                                 memset(page, 0xFF, FLASH_PAGE_SIZE);
1488
1489                                 /* Copy them to the buffer */
1490                                 memcpy( &page[offset % FLASH_PAGE_SIZE],
1491                                         &buffer[offset % FLASH_PAGE_SIZE],
1492                                         num_bytes );
1493
1494                                 /* Write whole page to flash data latches */
1495                                 if (target_write_memory(
1496                                                  target,
1497                                                  bank->base + (offset - (offset % FLASH_PAGE_SIZE)),
1498                                                  4, FLASH_PAGE_SIZE / 4, page) != ERROR_OK)
1499                                 {
1500                                         LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
1501                                         target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
1502
1503                                         return ERROR_FLASH_OPERATION_FAILED;
1504                                 }
1505
1506                                 /* Clear END_OF_BURN interrupt status */
1507                                 target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_BURN);
1508
1509                                 /* Set the programming time */
1510                                 target_write_u32(target, FPTR, FPTR_EN_T | prog_time);
1511
1512                                 /* Trigger flash write */
1513                                 target_write_u32(target, FCTR,
1514                                     FCTR_FS_CS | FCTR_FS_WRE | FCTR_FS_WPB | FCTR_FS_PROGREQ);
1515
1516                                 /* Wait for the end of the write operation. If it's not over
1517                                  * after one second, something went dreadfully wrong... :-(
1518                                  */
1519                                 if (lpc2900_wait_status(bank, INTSRC_END_OF_BURN, 1000) != ERROR_OK)
1520                                 {
1521                                         LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
1522                                         target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
1523
1524                                         return ERROR_FLASH_OPERATION_FAILED;
1525                                 }
1526                         }
1527
1528                         /* Update pointers and counters */
1529                         offset += num_bytes;
1530                         buffer += num_bytes;
1531                         count -= num_bytes;
1532                 }
1533
1534                 retval = ERROR_OK;
1535         }
1536
1537         /* Normal flash operating mode */
1538         target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
1539
1540         return retval;
1541 }
1542
1543
1544 /**
1545  * Try and identify the device.
1546  *
1547  * Determine type number and its memory layout.
1548  *
1549  * @param bank Pointer to the flash bank descriptor
1550  */
1551 static int lpc2900_probe(struct flash_bank_s *bank)
1552 {
1553         struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
1554         target_t *target = bank->target;
1555         int i = 0;
1556         uint32_t offset;
1557
1558
1559         if (target->state != TARGET_HALTED)
1560         {
1561                 LOG_ERROR("Target not halted");
1562                 return ERROR_TARGET_NOT_HALTED;
1563         }
1564
1565         /* We want to do this only once. Check if we already have a valid CHIPID,
1566          * because then we will have already successfully probed the device.
1567          */
1568         if (lpc2900_info->chipid == EXPECTED_CHIPID)
1569         {
1570                 return ERROR_OK;
1571         }
1572
1573         /* Probing starts with reading the CHIPID register. We will continue only
1574          * if this identifies as an LPC2900 device.
1575          */
1576         target_read_u32(target, CHIPID, &lpc2900_info->chipid);
1577
1578         if (lpc2900_info->chipid != EXPECTED_CHIPID)
1579         {
1580                 LOG_WARNING("Device is not an LPC29xx");
1581                 return ERROR_FLASH_OPERATION_FAILED;
1582         }
1583
1584         /* It's an LPC29xx device. Now read the feature register FEAT0...FEAT3. */
1585         uint32_t feat0, feat1, feat2, feat3;
1586         target_read_u32(target, FEAT0, &feat0);
1587         target_read_u32(target, FEAT1, &feat1);
1588         target_read_u32(target, FEAT2, &feat2);
1589         target_read_u32(target, FEAT3, &feat3);
1590
1591         /* Base address */
1592         bank->base = 0x20000000;
1593
1594         /* Determine flash layout from FEAT2 register */
1595         uint32_t num_64k_sectors = (feat2 >> 16) & 0xFF;
1596         uint32_t num_8k_sectors = (feat2 >> 0) & 0xFF;
1597         bank->num_sectors = num_64k_sectors + num_8k_sectors;
1598         bank->size = KiB * (64 * num_64k_sectors + 8 * num_8k_sectors);
1599
1600         /* Determine maximum contiguous RAM block */
1601         lpc2900_info->max_ram_block = 16 * KiB;
1602         if( (feat1 & 0x30) == 0x30 )
1603         {
1604                 lpc2900_info->max_ram_block = 32 * KiB;
1605                 if( (feat1 & 0x0C) == 0x0C )
1606                 {
1607                         lpc2900_info->max_ram_block = 48 * KiB;
1608                 }
1609         }
1610
1611         /* Determine package code and ITCM size */
1612         uint32_t package_code = feat0 & 0x0F;
1613         uint32_t itcm_code = (feat1 >> 16) & 0x1F;
1614
1615         /* Determine the exact type number. */
1616         uint32_t found = 1;
1617         if ( (package_code == 4) && (itcm_code == 5) )
1618         {
1619                 /* Old LPC2917 or LPC2919 (non-/01 devices) */
1620                 lpc2900_info->target_name = (bank->size == 768*KiB) ? "LPC2919" : "LPC2917";
1621         }
1622         else
1623         {
1624                 if ( package_code == 2 )
1625                 {
1626                         /* 100-pin package */
1627                         if ( bank->size == 128*KiB )
1628                         {
1629                                 lpc2900_info->target_name = "LPC2921";
1630                         }
1631                         else if ( bank->size == 256*KiB )
1632                         {
1633                                 lpc2900_info->target_name = "LPC2923";
1634                         }
1635                         else if ( bank->size == 512*KiB )
1636                         {
1637                                 lpc2900_info->target_name = "LPC2925";
1638                         }
1639                         else
1640                         {
1641                                 found = 0;
1642                         }
1643                 }
1644                 else if ( package_code == 4 )
1645                 {
1646                         /* 144-pin package */
1647                         if ( (bank->size == 512*KiB) && (feat3 == 0xFFFFFCF0) )
1648                         {
1649                                 lpc2900_info->target_name = "LPC2917/01";
1650                         }
1651                         else if ( (bank->size == 512*KiB) && (feat3 == 0xFFFFFFF1) )
1652                         {
1653                                 lpc2900_info->target_name = "LPC2927";
1654                         }
1655                         else if ( (bank->size == 768*KiB) && (feat3 == 0xFFFFFCF8) )
1656                         {
1657                                 lpc2900_info->target_name = "LPC2919/01";
1658                         }
1659                         else if ( (bank->size == 768*KiB) && (feat3 == 0xFFFFFFF9) )
1660                         {
1661                                 lpc2900_info->target_name = "LPC2929";
1662                         }
1663                         else
1664                         {
1665                                 found = 0;
1666                         }
1667                 }
1668                 else if ( package_code == 5 )
1669                 {
1670                         /* 208-pin package */
1671                         lpc2900_info->target_name = (bank->size == 0) ? "LPC2930" : "LPC2939";
1672                 }
1673                 else
1674                 {
1675                         found = 0;
1676                 }
1677         }
1678
1679         if ( !found )
1680         {
1681                 LOG_WARNING("Unknown LPC29xx derivative");
1682                 return ERROR_FLASH_OPERATION_FAILED;
1683         }
1684
1685         /* Show detected device */
1686         LOG_INFO("Flash bank %d"
1687                  ": Device %s, %" PRIu32
1688                  " KiB in %d sectors",
1689                  bank->bank_number,
1690                  lpc2900_info->target_name, bank->size / KiB,
1691                  bank->num_sectors);
1692
1693         /* Flashless devices cannot be handled */
1694         if ( bank->num_sectors == 0 )
1695         {
1696                 LOG_WARNING("Flashless device cannot be handled");
1697                 return ERROR_FLASH_OPERATION_FAILED;
1698         }
1699
1700         /* Sector layout.
1701          * These are logical sector numbers. When doing real flash operations,
1702          * the logical flash number are translated into the physical flash numbers
1703          * of the device.
1704          */
1705         bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
1706
1707         offset = 0;
1708         for (i = 0; i < bank->num_sectors; i++)
1709         {
1710                 bank->sectors[i].offset = offset;
1711                 bank->sectors[i].is_erased = -1;
1712                 bank->sectors[i].is_protected = -1;
1713
1714                 if ( i <= 7 )
1715                 {
1716                         bank->sectors[i].size = 8 * KiB;
1717                 }
1718                 else if ( i <= 18 )
1719                 {
1720                         bank->sectors[i].size = 64 * KiB;
1721                 }
1722                 else
1723                 {
1724                         /* We shouldn't come here. But there might be a new part out there
1725                          * that has more than 19 sectors. Politely ask for a fix then.
1726                          */
1727                         bank->sectors[i].size = 0;
1728                         LOG_ERROR("Never heard about sector %d", i);
1729                 }
1730
1731                 offset += bank->sectors[i].size;
1732         }
1733
1734         /* Read sector security status */
1735         if ( lpc2900_read_security_status(bank) != ERROR_OK )
1736         {
1737                 LOG_ERROR("Cannot determine sector security status");
1738                 return ERROR_FLASH_OPERATION_FAILED;
1739         }
1740
1741         return ERROR_OK;
1742 }
1743
1744
1745 /**
1746  * Run a blank check for each sector.
1747  *
1748  * For speed reasons, the device isn't read word by word.
1749  * A hash value is calculated by the hardware ("BIST") for each sector.
1750  * This value is then compared against the known hash of an empty sector.
1751  *
1752  * @param bank Pointer to the flash bank descriptor
1753  */
1754 static int lpc2900_erase_check(struct flash_bank_s *bank)
1755 {
1756         uint32_t status = lpc2900_is_ready(bank);
1757         if (status != ERROR_OK)
1758         {
1759                 LOG_INFO("Processor not halted/not probed");
1760                 return status;
1761         }
1762
1763         /* Use the BIST (Built-In Selft Test) to generate a signature of each flash
1764          * sector. Compare against the expected signature of an empty sector.
1765          */
1766         int sector;
1767         for ( sector = 0; sector < bank->num_sectors; sector++ )
1768         {
1769                 uint32_t signature[4];
1770                 if ( (status = lpc2900_run_bist128( bank,
1771                                                     bank->sectors[sector].offset,
1772                                                     bank->sectors[sector].offset +
1773                                                        (bank->sectors[sector].size - 1),
1774                                                     &signature)) != ERROR_OK )
1775                 {
1776                         return status;
1777                 }
1778
1779                 /* The expected signatures for an empty sector are different
1780                  * for 8 KiB and 64 KiB sectors.
1781                  */
1782                 if ( bank->sectors[sector].size == 8*KiB )
1783                 {
1784                         bank->sectors[sector].is_erased =
1785                             (signature[3] == 0x01ABAAAA) &&
1786                             (signature[2] == 0xAAAAAAAA) &&
1787                             (signature[1] == 0xAAAAAAAA) &&
1788                             (signature[0] == 0xAAA00AAA);
1789                 }
1790                 if ( bank->sectors[sector].size == 64*KiB )
1791                 {
1792                         bank->sectors[sector].is_erased =
1793                             (signature[3] == 0x11801222) &&
1794                             (signature[2] == 0xB88844FF) &&
1795                             (signature[1] == 0x11A22008) &&
1796                             (signature[0] == 0x2B1BFE44);
1797                 }
1798         }
1799
1800         return ERROR_OK;
1801 }
1802
1803
1804 /**
1805  * Get protection (sector security) status.
1806  *
1807  * Determine the status of "sector security" for each sector.
1808  * A secured sector is one that can never be erased/programmed again.
1809  *
1810  * @param bank Pointer to the flash bank descriptor
1811  */
1812 static int lpc2900_protect_check(struct flash_bank_s *bank)
1813 {
1814         return lpc2900_read_security_status(bank);
1815 }
1816
1817
1818 /**
1819  * Print info about the driver (not the device).
1820  *
1821  * @param bank Pointer to the flash bank descriptor
1822  * @param buf Buffer to take the string
1823  * @param buf_size Maximum number of characters that the buffer can take
1824  */
1825 static int lpc2900_info(struct flash_bank_s *bank, char *buf, int buf_size)
1826 {
1827         snprintf(buf, buf_size, "lpc2900 flash driver");
1828
1829         return ERROR_OK;
1830 }
1831
1832
1833 struct flash_driver lpc2900_flash =
1834 {
1835         .name               = "lpc2900",
1836         .register_commands  = lpc2900_register_commands,
1837         .flash_bank_command = lpc2900_flash_bank_command,
1838         .erase              = lpc2900_erase,
1839         .protect            = lpc2900_protect,
1840         .write              = lpc2900_write,
1841         .probe              = lpc2900_probe,
1842         .auto_probe         = lpc2900_probe,
1843         .erase_check        = lpc2900_erase_check,
1844         .protect_check      = lpc2900_protect_check,
1845         .info               = lpc2900_info
1846 };