1 /***************************************************************************
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2 * Copyright (C) 2006 by Magnus Lundin *
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3 * lundin@mlu.mine.nu *
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5 * This program is free software; you can redistribute it and/or modify *
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6 * it under the terms of the GNU General Public License as published by *
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7 * the Free Software Foundation; either version 2 of the License, or *
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8 * (at your option) any later version. *
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10 * This program is distributed in the hope that it will be useful, *
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11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
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12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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13 * GNU General Public License for more details. *
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15 * You should have received a copy of the GNU General Public License *
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16 * along with this program; if not, write to the *
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17 * Free Software Foundation, Inc., *
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18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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19 ***************************************************************************/
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26 typedef struct at91sam7_flash_bank_s
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29 u32 working_area_size;
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31 /* chip id register */
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43 /* flash geometry */
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46 u16 pages_in_lockregion;
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47 u8 num_erase_regions;
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49 u32 *erase_region_info;
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51 /* nv memory bits */
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57 u8 flashmode[4]; /* 0: not init, 1: fmcn for nvbits (1uS), 2: fmcn for flash (1.5uS) */
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59 /* main clock status */
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65 } at91sam7_flash_bank_t;
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67 /* AT91SAM7 control registers */
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68 #define DBGU_CIDR 0xFFFFF240
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69 #define CKGR_MCFR 0xFFFFFC24
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70 #define CKGR_MCFR_MAINRDY 0x10000
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71 #define CKGR_PLLR 0xFFFFFC2c
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72 #define CKGR_PLLR_DIV 0xff
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73 #define CKGR_PLLR_MUL 0x07ff0000
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74 #define PMC_MCKR 0xFFFFFC30
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75 #define PMC_MCKR_CSS 0x03
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76 #define PMC_MCKR_PRES 0x1c
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78 /* Flash Controller Commands */
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88 /* MC_FSR bit definitions */
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89 #define MC_FSR_FRDY 1
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90 #define MC_FSR_EOL 2
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92 /* AT91SAM7 constants */
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93 #define RC_FREQ 32000
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95 /* FLASH_TIMING_MODES */
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96 #define FMR_TIMING_NONE 0
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97 #define FMR_TIMING_NVBITS 1
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98 #define FMR_TIMING_FLASH 2
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100 #endif /* AT91SAM7_H */
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