2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 #define CC1200_READ (7)
22 #define CC1200_BURST (6)
25 #define CC1200_IOCFG3 0x00
26 #define CC1200_IOCFG_GPIO_ATRAN 7
27 #define CC1200_IOCFG_GPIO_INV 6
28 #define CC1200_IOCFG_GPIO_CFG 0
29 #define CC1200_IOCFG_GPIO_CFG_RXFIFO_THR 0
30 #define CC1200_IOCFG_GPIO_CFG_RXFIFO_THR_PKT 1
31 #define CC1200_IOCFG_GPIO_CFG_TXFIFO_THR 2
32 #define CC1200_IOCFG_GPIO_CFG_TXFIFO_THR_PKT 3
33 #define CC1200_IOCFG_GPIO_CFG_RXFIFO_OVERFLOW 4
34 #define CC1200_IOCFG_GPIO_CFG_TXFIFO_UNDERFLOW 5
35 #define CC1200_IOCFG_GPIO_CFG_PKT_SYNC_RXTX 6
36 #define CC1200_IOCFG_GPIO_CFG_CRC_OK 7
37 #define CC1200_IOCFG_GPIO_CFG_SERIAL_CLK 8
38 #define CC1200_IOCFG_GPIO_CFG_SERIAL_RX 9
39 #define CC1200_IOCFG_GPIO_CFG_PQT_REACHED 11
40 #define CC1200_IOCFG_GPIO_CFG_PQT_VALID 12
41 #define CC1200_IOCFG_GPIO_CFG_RSSI_VALID 13
42 #define CC1200_IOCFG_GPIO3_CFG_RSSI_UPDATE 14
43 #define CC1200_IOCFG_GPIO2_CFG_RSSI_UPDATE 14
44 #define CC1200_IOCFG_GPIO1_CFG_AGC_HOLD 14
45 #define CC1200_IOCFG_GPIO0_CFG_AGC_UPDATE 14
46 #define CC1200_IOCFG_GPIO3_CFG_CGA_STATUS 15
47 #define CC1200_IOCFG_GPIO2_CFG_TXONCCA_DONE 15
48 #define CC1200_IOCFG_GPIO1_CFG_CCA_STATUS 15
49 #define CC1200_IOCFG_GPIO0_CFG_TXONCCA_FAILED 15
50 #define CC1200_IOCFG_GPIO_CFG_CARRIER_SENSE_VALID 16
51 #define CC1200_IOCFG_GPIO_CFG_CARRIER_SENSE 17
52 #define CC1200_IOCFG_GPIO3_CFG_DSSS_CLK 18
53 #define CC1200_IOCFG_GPIO2_CFG_DSSS_DATA0 18
54 #define CC1200_IOCFG_GPIO1_CFG_DSSS_CLK 18
55 #define CC1200_IOCFG_GPIO0_CFG_DSSS_DATA1 18
56 #define CC1200_IOCFG_GPIO_CFG_PKT_CRC_OK 19
57 #define CC1200_IOCFG_GPIO_CFG_MARC_MCU_WAKEUP 20
58 #define CC1200_IOCFG_GPIO_CFG_SYNC_LOW0_HIGH1 21
59 #define CC1200_IOCFG_GPIO_CFG_LNA_PA_REG_PD 23
60 #define CC1200_IOCFG_GPIO_CFG_LNA_PD 24
61 #define CC1200_IOCFG_GPIO_CFG_PA_RD 25
62 #define CC1200_IOCFG_GPIO_CFG_RX0TX1_CFG 26
63 #define CC1200_IOCFG_GPIO_CFG_IMAGE_FOUND 28
64 #define CC1200_IOCFG_GPIO_CFG_CLKEN_SOFT 29
65 #define CC1200_IOCFG_GPIO_CFG_SOFT_TX_DATA_CLK 30
66 #define CC1200_IOCFG_GPIO_CFG_RSSI_STEP_FOUND 33
67 #define CC1200_IOCFG_GPIO_CFG_RSSI_STEP_EVENT 34
68 #define CC1200_IOCFG_GPIO_CFG_ANTENNA_SELECT 36
69 #define CC1200_IOCFG_GPIO_CFG_MARC_2PIN_STATUS1 37
70 #define CC1200_IOCFG_GPIO_CFG_MARC_2PIN_STATUS0 38
71 #define CC1200_IOCFG_GPIO2_CFG_TXFIFO_OVERFLOW 39
72 #define CC1200_IOCFG_GPIO0_CFG_RXFIFO_UNDERFLOW 39
73 #define CC1200_IOCFG_GPIO3_CFG_MAGN_VALID 40
74 #define CC1200_IOCFG_GPIO2_CFG_CHFILT_VALID 40
75 #define CC1200_IOCFG_GPIO1_CFG_RCC_CAL_VALID 40
76 #define CC1200_IOCFG_GPIO0_CFG_CHFILTER_STARTUP_VALID 40
77 #define CC1200_IOCFG_GPIO3_CFG_COLLISION_FOUND 41
78 #define CC1200_IOCFG_GPIO2_CFG_SYNC_EVENT 41
79 #define CC1200_IOCFG_GPIO1_CFG_COLLISION_FOUND 41
80 #define CC1200_IOCFG_GPIO0_CFG_COLLISION_EVENT 41
81 #define CC1200_IOCFG_GPIO_CFG_PA_RAMP_UP 42
82 #define CC1200_IOCFG_GPIO3_CFG_CRC_FAILED 43
83 #define CC1200_IOCFG_GPIO2_CFG_LENGTH_FAILED 43
84 #define CC1200_IOCFG_GPIO1_CFG_ADDR_FAILED 43
85 #define CC1200_IOCFG_GPIO0_CFG_UART_FRAMING_ERROR 43
86 #define CC1200_IOCFG_GPIO_CFG_AGC_STABLE_GAIN 44
87 #define CC1200_IOCFG_GPIO_CFG_AGC_UPDATE 45
88 #define CC1200_IOCFG_GPIO3_CFG_ADC_CLOCK 46
89 #define CC1200_IOCFG_GPIO2_CFG_ADC_Q_DATA_SAMPLE 46
90 #define CC1200_IOCFG_GPIO1_CFG_ADC_CLOCK 46
91 #define CC1200_IOCFG_GPIO0_CFG_ADC_I_DATA_SAMPLE 46
92 #define CC1200_IOCFG_GPIO_CFG_HIGHZ 48
93 #define CC1200_IOCFG_GPIO_CFG_EXT_CLOCK 49
94 #define CC1200_IOCFG_GPIO_CFG_CHIP_RDY 50
95 #define CC1200_IOCFG_GPIO_CFG_HW0 51
96 #define CC1200_IOCFG_GPIO_CFG_CLOCK_32K 54
97 #define CC1200_IOCFG_GPIO_CFG_WOR_EVENT0 55
98 #define CC1200_IOCFG_GPIO_CFG_WOR_EVENT1 56
99 #define CC1200_IOCFG_GPIO_CFG_WOR_EVENT2 57
100 #define CC1200_IOCFG_GPIO_CFG_XOSC_STABLE 59
101 #define CC1200_IOCFG_GPIO_CFG_EXT_OSC_EN 60
102 #define CC1200_IOCFG_GPIO_CFG_MASK 0x3f
104 #define CC1200_IOCFG2 0x01
105 #define CC1200_IOCFG1 0x02
106 #define CC1200_IOCFG0 0x03
107 #define CC1200_SYNC3 0x04
108 #define CC1200_SYNC2 0x05
109 #define CC1200_SYNC1 0x06
110 #define CC1200_SYNC0 0x07
112 #define CC1200_SYNC_CFG1 0x08
114 #define CC1200_SYNC_CFG1_SYNC_MODE 5
115 #define CC1200_SYNC_CFG1_SYNC_MODE_NONE 0
116 #define CC1200_SYNC_CFG1_SYNC_MODE_11_BITS 1
117 #define CC1200_SYNC_CFG1_SYNC_MODE_16_BITS 2
118 #define CC1200_SYNC_CFG1_SYNC_MODE_18_BITS 3
119 #define CC1200_SYNC_CFG1_SYNC_MODE_24_BITS 4
120 #define CC1200_SYNC_CFG1_SYNC_MODE_32_BITS 5
121 #define CC1200_SYNC_CFG1_SYNC_MODE_16H_BITS 6
122 #define CC1200_SYNC_CFG1_SYNC_MODE_16D_BITS 7
123 #define CC1200_SYNC_CFG1_SYNC_MODE_MASK 7
125 #define CC1200_SYNC_CFG1_SYNC_THR 0
126 #define CC1200_SYNC_CFG1_SYNC_MASK 0x1f
128 #define CC1200_SYNC_CFG0 0x09
129 #define CC1200_SYNC_CFG0_AUTO_CLEAR 5
130 #define CC1200_SYNC_CFG0_RX_CONFIG_LIMITATION 4
131 #define CC1200_SYNC_CFG0_PQT_GATING_EN 3
132 #define CC1200_SYNC_CFG0_EXT_SYNC_DETECT 2
134 #define CC1200_SYNC_CFG0_SYNC_STRICT_SYNC_CHECK 0
135 #define CC1200_SYNC_CFG0_SYNC_STRICT_SYNC_CHECK_LEVEL_1 0
136 #define CC1200_SYNC_CFG0_SYNC_STRICT_SYNC_CHECK_LEVEL_2 1
137 #define CC1200_SYNC_CFG0_SYNC_STRICT_SYNC_CHECK_LEVEL_3 2
138 #define CC1200_SYNC_CFG0_SYNC_STRICT_SYNC_CHECK_DISABLED 3
139 #define CC1200_SYNC_CFG0_SYNC_STRICT_SYNC_CHECK_MASK 3
141 #define CC1200_DEVIATION_M 0x0a
142 #define CC1200_MODCFG_DEV_E 0x0b
143 #define CC1200_MODCFG_DEV_E_MODEM_MODE 6
144 #define CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL 0
145 #define CC1200_MODCFG_DEV_E_MODEM_MODE_DSSS_REPEAT 1
146 #define CC1200_MODCFG_DEV_E_MODEM_MODE_DSSS_PN 2
147 #define CC1200_MODCFG_DEV_E_MODEM_MODE_CARRIER_SENSE 3
148 #define CC1200_MODCFG_DEV_E_MODEM_MODE_MASK 3
149 #define CC1200_MODCFG_DEV_E_MOD_FORMAT 3
150 #define CC1200_MODCFG_DEV_E_MOD_FORMAT_2_FSK 0
151 #define CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK 1
152 #define CC1200_MODCFG_DEV_E_MOD_FORMAT_ASK_OOK 3
153 #define CC1200_MODCFG_DEV_E_MOD_FORMAT_4_FSK 4
154 #define CC1200_MODCFG_DEV_E_MOD_FORMAT_4_GFSK 5
155 #define CC1200_MODCFG_DEV_E_MOD_FORMAT_MASK 7
156 #define CC1200_MODCFG_DEV_E_DEV_E 0
157 #define CC1200_MODCFG_DEV_E_DEV_E_MASK 7
159 #define CC1200_DCFILT_CFG 0x0c
160 #define CC1200_PREAMBLE_CFG1 0x0d
161 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE 2
162 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_NONE 0
163 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_0_5_BYTE 1
164 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_1_BYTE 2
165 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_1_5_BYTE 3
166 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_2_BYTES 4
167 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_3_BYTES 5
168 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_4_BYTES 6
169 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_5_BYTES 7
170 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_6_BYTES 8
171 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_7_BYTES 9
172 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_8_BYTES 10
173 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_12_BYTES 11
174 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_24_BYTES 12
175 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_30_BYTES 13
176 #define CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_MASK 0xf
178 #define CC1200_PREAMBLE_CFG1_PREAMBLE_WORD 0
179 #define CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_AA 0
180 #define CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_55 1
181 #define CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_33 2
182 #define CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_CC 3
183 #define CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_MASK 3
185 #define CC1200_PREAMBLE_CFG0 0x0e
186 #define CC1200_PREAMBLE_CFG0_PQT_EN 7
187 #define CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT 4
188 #define CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT_11 0
189 #define CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT_12 1
190 #define CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT_13 2
191 #define CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT_15 3
192 #define CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT_16 4
193 #define CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT_17 5
194 #define CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT_24 6
195 #define CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT_32 7
196 #define CC1200_PREAMBLE_CFG0_PQT 0
197 #define CC1200_PREAMBLE_CFG0_PQT_MASK 0xf
199 #define CC1200_IQIC 0x0f
200 #define CC1200_CHAN_BW 0x10
201 #define CC1200_CHAN_BW_ADC_CIC_DECFACT 6
202 #define CC1200_CHAN_BW_ADC_CIC_DECFACT_12 0
203 #define CC1200_CHAN_BW_ADC_CIC_DECFACT_24 1
204 #define CC1200_CHAN_BW_ADC_CIC_DECFACT_48 2
205 #define CC1200_CHAN_BW_BB_CIC_DECFACT 0
207 #define CC1200_MDMCFG1 0x11
208 #define CC1200_MDMCFG1_CARRIER_SENSE_GATE 7
209 #define CC1200_MDMCFG1_FIFO_EN 6
210 #define CC1200_MDMCFG1_MANCHESTER_EN 5
211 #define CC1200_MDMCFG1_INVERT_DATA_EN 4
212 #define CC1200_MDMCFG1_COLLISION_DETECT_EN 3
213 #define CC1200_MDMCFG1_DVGA_GAIN 1
214 #define CC1200_MDMCFG1_DVGA_GAIN_0 0
215 #define CC1200_MDMCFG1_DVGA_GAIN_3 1
216 #define CC1200_MDMCFG1_DVGA_GAIN_6 2
217 #define CC1200_MDMCFG1_DVGA_GAIN_9 3
218 #define CC1200_MDMCFG1_DVGA_GAIN_MASK 3
219 #define CC1200_MDMCFG1_SINGLE_ADC_EN 0
221 #define CC1200_MDMCFG0 0x12
222 #define CC1200_MDMCFG0_TRANSPARENT_MODE_EN 6
223 #define CC1200_MDMCFG0_TRANSPARENT_INTFACT 4
224 #define CC1200_MDMCFG0_DATA_FILTER_EN 3
225 #define CC1200_MDMCFG0_VITERBI_EN 2
227 #define CC1200_SYMBOL_RATE2 0x13
228 #define CC1200_SYMBOL_RATE2_DATARATE_E 4
229 #define CC1200_SYMBOL_RATE2_DATARATE_E_MASK 0xf
230 #define CC1200_SYMBOL_RATE2_DATARATE_M_19_16 0
231 #define CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK 0xf
233 #define CC1200_SYMBOL_RATE1 0x14
234 #define CC1200_SYMBOL_RATE0 0x15
235 #define CC1200_AGC_REF 0x16
236 #define CC1200_AGC_CS_THR 0x17
237 #define CC1200_AGC_GAIN_ADJUST 0x18
239 #define CC1200_AGC_CFG3 0x19
240 #define CC1200_AGC_CFG3_RSSI_STEP_THR 7
241 #define CC1200_AGC_CFG3_AGC_MIN_GAIN 0
242 #define CC1200_AGC_CFG3_AGC_MIN_GAIN_MASK 0x1f
244 #define CC1200_AGC_CFG2 0x1a
245 #define CC1200_AGC_CFG2_START_PREVIOUS_GAIN_EN 7
246 #define CC1200_AGC_CFG2_FE_PERFORMANCE_MODE 5
247 #define CC1200_AGC_CFG2_FE_PERFORMANCE_MODE_OPTIMIZE_LINEARITY 0
248 #define CC1200_AGC_CFG2_FE_PERFORMANCE_MODE_NORMAL 1
249 #define CC1200_AGC_CFG2_FE_PERFORMANCE_MODE_LOW_POWER 2
250 #define CC1200_AGC_CFG2_FE_PERFORMANCE_MODE_MASK 3
251 #define CC1200_AGC_CFG2_AGC_MAX_GAIN 0
252 #define CC1200_AGC_CFG2_AGC_MAX_MASK 0x1f
254 #define CC1200_AGC_CFG1 0x1b
255 #define CC1200_AGC_CFG1_RSSI_STEP_THR 6
256 #define CC1200_AGC_CFG1_AGC_WIN_SIZE 3
257 #define CC1200_AGC_CFG1_AGC_WIN_SIZE_8 0
258 #define CC1200_AGC_CFG1_AGC_WIN_SIZE_16 1
259 #define CC1200_AGC_CFG1_AGC_WIN_SIZE_32 2
260 #define CC1200_AGC_CFG1_AGC_WIN_SIZE_64 3
261 #define CC1200_AGC_CFG1_AGC_WIN_SIZE_128 4
262 #define CC1200_AGC_CFG1_AGC_WIN_SIZE_256 5
263 #define CC1200_AGC_CFG1_AGC_WIN_SIZE_MASK 7
264 #define CC1200_AGC_CFG1_AGC_SETTLE_WAIT 0
265 #define CC1200_AGC_CFG1_AGC_SETTLE_WAIT_24 0
266 #define CC1200_AGC_CFG1_AGC_SETTLE_WAIT_32 1
267 #define CC1200_AGC_CFG1_AGC_SETTLE_WAIT_40 2
268 #define CC1200_AGC_CFG1_AGC_SETTLE_WAIT_48 3
269 #define CC1200_AGC_CFG1_AGC_SETTLE_WAIT_64 4
270 #define CC1200_AGC_CFG1_AGC_SETTLE_WAIT_80 5
271 #define CC1200_AGC_CFG1_AGC_SETTLE_WAIT_96 6
272 #define CC1200_AGC_CFG1_AGC_SETTLE_WAIT_127 7
274 #define CC1200_AGC_CFG0 0x1c
276 #define CC1200_AGC_CFG0_AGC_HYST_LEVEL 6
277 #define CC1200_AGC_CFG0_AGC_HYST_LEVEL_2 0
278 #define CC1200_AGC_CFG0_AGC_HYST_LEVEL_4 1
279 #define CC1200_AGC_CFG0_AGC_HYST_LEVEL_7 2
280 #define CC1200_AGC_CFG0_AGC_HYST_LEVEL_10 3
282 #define CC1200_AGC_CFG0_AGC_SLEWRATE_LIMIT 4
283 #define CC1200_AGC_CFG0_AGC_SLEWRATE_LIMIT_60 0
284 #define CC1200_AGC_CFG0_AGC_SLEWRATE_LIMIT_30 1
285 #define CC1200_AGC_CFG0_AGC_SLEWRATE_LIMIT_18 2
286 #define CC1200_AGC_CFG0_AGC_SLEWRATE_LIMIT_9 3
288 #define CC1200_AGC_CFG0_RSSI_VALID_CNT 2
289 #define CC1200_AGC_CFG0_RSSI_VALID_CNT_2 0
290 #define CC1200_AGC_CFG0_RSSI_VALID_CNT_3 1
291 #define CC1200_AGC_CFG0_RSSI_VALID_CNT_5 2
292 #define CC1200_AGC_CFG0_RSSI_VALID_CNT_9 3
294 #define CC1200_AGC_CFG0_AGC_ASK_DECAY 0
295 #define CC1200_AGC_CFG0_AGC_ASK_DECAY_1200 0
296 #define CC1200_AGC_CFG0_AGC_ASK_DECAY_2400 1
297 #define CC1200_AGC_CFG0_AGC_ASK_DECAY_4700 2
298 #define CC1200_AGC_CFG0_AGC_ASK_DECAY_9500 3
300 #define CC1200_FIFO_CFG 0x1d
301 #define CC1200_FIFO_CFG_CRC_AUTOFLUSH 7
302 #define CC1200_FIFO_CFG_FIFO_THR 0
304 #define CC1200_DEV_ADDR 0x1e
305 #define CC1200_SETTLING_CFG 0x1f
306 #define CC1200_SETTLING_CFG_FS_AUTOCAL 3
307 #define CC1200_SETTLING_CFG_FS_AUTOCAL_NEVER 0
308 #define CC1200_SETTLING_CFG_FS_AUTOCAL_IDLE_TO_ON 1
309 #define CC1200_SETTLING_CFG_FS_AUTOCAL_ON_TO_IDLE 2
310 #define CC1200_SETTLING_CFG_FS_AUTOCAL_EVERY_4TH_TIME 3
311 #define CC1200_SETTLING_CFG_FS_AUTOCAL_MASK 3
312 #define CC1200_SETTLING_CFG_LOCK_TIME 1
313 #define CC1200_SETTLING_CFG_LOCK_TIME_50_20 0
314 #define CC1200_SETTLING_CFG_LOCK_TIME_75_30 1
315 #define CC1200_SETTLING_CFG_LOCK_TIME_100_40 2
316 #define CC1200_SETTLING_CFG_LOCK_TIME_150_60 3
317 #define CC1200_SETTLING_CFG_LOCK_TIME_MASK 3
318 #define CC1200_SETTLING_CFG_FSREG_TIME 0
319 #define CC1200_SETTLING_CFG_FSREG_TIME_30 0
320 #define CC1200_SETTLING_CFG_FSREG_TIME_60 1
321 #define CC1200_SETTLING_CFG_FSREG_TIME_MASK 1
323 #define CC1200_FS_CFG 0x20
324 #define CC1200_FS_CFG_LOCK_EN 4
325 #define CC1200_FS_CFG_FSD_BANDSELECT 0
326 #define CC1200_FS_CFG_FSD_BANDSELECT_820_960 2
327 #define CC1200_FS_CFG_FSD_BANDSELECT_410_480 4
328 #define CC1200_FS_CFG_FSD_BANDSELECT_273_320 6
329 #define CC1200_FS_CFG_FSD_BANDSELECT_205_240 8
330 #define CC1200_FS_CFG_FSD_BANDSELECT_164_192 10
331 #define CC1200_FS_CFG_FSD_BANDSELECT_136_160 11
332 #define CC1200_FS_CFG_FSD_BANDSELECT_MASK 0xf
334 #define CC1200_WOR_CFG1 0x21
335 #define CC1200_WOR_CFG0 0x22
336 #define CC1200_WOR_EVENT0_MSB 0x23
337 #define CC1200_WOR_EVENT0_LSB 0x24
338 #define CC1200_RXDCM_TIME 0x25
339 #define CC1200_PKT_CFG2 0x26
340 #define CC1200_PKT_CFG2_BYTE_SWAP_EN 6
341 #define CC1200_PKT_CFG2_FG_MODE_EN 5
342 #define CC1200_PKT_CFG2_CCA_MODE 2
343 #define CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR 0
344 #define CC1200_PKT_CFG2_CCA_MODE_RSSI_THRESHOLD 1
345 #define CC1200_PKT_CFG2_CCA_MODE_NOT_RECEIVING 2
346 #define CC1200_PKT_CFG2_CCA_MODE_RSSI_OR_NOT 3
347 #define CC1200_PKT_CFG2_CCA_MODE_RSSI_AND_ETSI_LBT 4
348 #define CC1200_PKT_CFG2_CCA_MODE_MASK 7
349 #define CC1200_PKT_CFG2_PKT_FORMAT 0
350 #define CC1200_PKT_CFG2_PKT_FORMAT_NORMAL 0
351 #define CC1200_PKT_CFG2_PKT_FORMAT_SYNCHRONOUS_SERIAL 1
352 #define CC1200_PKT_CFG2_PKT_FORMAT_RANDOM 2
353 #define CC1200_PKT_CFG2_PKT_FORMAT_TRANSPARENT_SERIAL 3
354 #define CC1200_PKT_CFG2_PKT_FORMAT_MASK 3
356 #define CC1200_PKT_CFG1 0x27
357 #define CC1200_PKT_CFG1_FEC_EN 7
358 #define CC1200_PKT_CFG1_WHITE_DATA 6
359 #define CC1200_PKT_CFG1_PN9_SWAP_EN 5
360 #define CC1200_PKT_CFG1_ADDR_CHECK_CFG 3
361 #define CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE 0
362 #define CC1200_PKT_CFG1_ADDR_CHECK_CFG_CHECK 1
363 #define CC1200_PKT_CFG1_ADDR_CHECK_CFG_00_BROADCAST 2
364 #define CC1200_PKT_CFG1_ADDR_CHECK_CFG_00_FF_BROADCAST 3
365 #define CC1200_PKT_CFG1_ADDR_CHECK_CFG_MASK 3
366 #define CC1200_PKT_CFG1_CRC_CFG 1
367 #define CC1200_PKT_CFG1_CRC_CFG_DISABLED 0
368 #define CC1200_PKT_CFG1_CRC_CFG_CRC16_INIT_ONES 1
369 #define CC1200_PKT_CFG1_CRC_CFG_CRC16_INIT_ZEROS 2
370 #define CC1200_PKT_CFG1_CRC_CFG_MASK 3
371 #define CC1200_PKT_CFG1_APPEND_STATUS 0
373 #define CC1200_PKT_CFG0 0x28
374 #define CC1200_PKT_CFG0_RESERVED7 7
375 #define CC1200_PKT_CFG0_LENGTH_CONFIG 5
376 #define CC1200_PKT_CFG0_LENGTH_CONFIG_FIXED 0
377 #define CC1200_PKT_CFG0_LENGTH_CONFIG_VARIABLE 1
378 #define CC1200_PKT_CFG0_LENGTH_CONFIG_INFINITE 2
379 #define CC1200_PKT_CFG0_LENGTH_CONFIG_VARIABLE_5LSB 3
380 #define CC1200_PKT_CFG0_LENGTH_CONFIG_MASK 3
381 #define CC1200_PKT_CFG0_PKG_BIT_LEN 2
382 #define CC1200_PKT_CFG0_PKG_BIT_LEN_MASK 7
383 #define CC1200_PKT_CFG0_UART_MODE_EN 1
384 #define CC1200_PKT_CFG0_UART_SWAP_EN 0
386 #define CC1200_RFEND_CFG1 0x29
387 #define CC1200_RFEND_CFG1_RXOFF_MODE 4
388 #define CC1200_RFEND_CFG1_RXOFF_MODE_IDLE 0
389 #define CC1200_RFEND_CFG1_RXOFF_MODE_FSTXON 1
390 #define CC1200_RFEND_CFG1_RXOFF_MODE_TX 2
391 #define CC1200_RFEND_CFG1_RXOFF_MODE_RX 3
392 #define CC1200_RFEND_CFG1_RX_TIME 1
393 #define CC1200_RFEND_CFG1_RX_TIME_INFINITE 7
394 #define CC1200_RFEND_CFG1_RX_TIME_QUAL 0
395 #define CC1200_RFEND_CFG0 0x2a
396 #define CC1200_RFEND_CFG0_CAL_END_WAKE_UP_EN 6
397 #define CC1200_RFEND_CFG0_TXOFF_MODE 4
398 #define CC1200_RFEND_CFG0_TXOFF_MODE_IDLE 0
399 #define CC1200_RFEND_CFG0_TXOFF_MODE_FSTXON 1
400 #define CC1200_RFEND_CFG0_TXOFF_MODE_TX 2
401 #define CC1200_RFEND_CFG0_TXOFF_MODE_RX 3
402 #define CC1200_RFEND_CFG0_TERM_ON_BAD_PACKET_EN 3
403 #define CC1200_RFEND_CFG0_ANT_DIV_RX_TERM_CFG 0
404 #define CC1200_PA_CFG1 0x2b
405 #define CC1200_PA_CFG0 0x2c
406 #define CC1200_ASK_CFG 0x2d
407 #define CC1200_PKT_LEN 0x2e
409 #define CC1200_EXTENDED 0x2f
411 /* Command strobes */
412 #define CC1200_SRES 0x30
413 #define CC1200_SFSTXON 0x31
414 #define CC1200_SXOFF 0x32
415 #define CC1200_SCAL 0x33
416 #define CC1200_SRX 0x34
417 #define CC1200_STX 0x35
418 #define CC1200_SIDLE 0x36
419 #define CC1200_SAFC 0x37
420 #define CC1200_SWOR 0x38
421 #define CC1200_SPWD 0x39
422 #define CC1200_SFRX 0x3a
423 #define CC1200_SFTX 0x3b
424 #define CC1200_SWORRST 0x3c
425 #define CC1200_SNOP 0x3d
427 #define CC1200_DIRECT_FIFO 0x3e
428 #define CC1200_FIFO 0x3f
430 #define CC1200_FIFO_SIZE 128
432 /* Extended register space */
434 #define CC1200_EXTENDED_BIT 0x8000
436 #define CC1200_IS_EXTENDED(r) ((r) & CC1200_EXTENDED_BIT)
438 #define CC1200_IF_MIX_CFG (CC1200_EXTENDED_BIT | 0x00)
439 #define CC1200_FREQOFF_CFG (CC1200_EXTENDED_BIT | 0x01)
440 #define CC1200_TOC_CFG (CC1200_EXTENDED_BIT | 0x02)
442 #define CC1200_TOC_CFG_TOC_LIMIT 6
443 #define CC1200_TOC_CFG_TOC_LIMIT_0_2 0
444 #define CC1200_TOC_CFG_TOC_LIMIT_2 1
445 #define CC1200_TOC_CFG_TOC_LIMIT_12 3
447 #define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN 3
448 #define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_8 0
449 #define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_16 1
450 #define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_32 2
451 #define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_64 3
452 #define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_128 4
453 #define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_256 5
454 #define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_8_16 0
455 #define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_6_16 1
456 #define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_2_16 2
457 #define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_1_16 3
458 #define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_1_16_SYNC 4
460 #define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN 0
461 #define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_8 0
462 #define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_16 1
463 #define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_32 2
464 #define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_64 3
465 #define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_128 4
466 #define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_256 5
467 #define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_FREEZE 0
468 #define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_6_32 1
469 #define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_2_32 2
470 #define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_1_32 3
471 #define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_1_32_SYNC 4
473 #define CC1200_MARC_SPARE (CC1200_EXTENDED_BIT | 0x03)
474 #define CC1200_ECG_CFG (CC1200_EXTENDED_BIT | 0x04)
475 #define CC1200_MDMCFG2 (CC1200_EXTENDED_BIT | 0x05)
477 #define CC1200_MDMCFG2_ASK_SHAPE 6
478 #define CC1200_MDMCFG2_ASK_SHAPE_8 0
479 #define CC1200_MDMCFG2_ASK_SHAPE_16 1
480 #define CC1200_MDMCFG2_ASK_SHAPE_32 2
481 #define CC1200_MDMCFG2_ASK_SHAPE_128 3
482 #define CC1200_MDMCFG2_SYMBOL_MAP_CFG 4
483 #define CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 0
484 #define CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_1 1
485 #define CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_2 2
486 #define CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_3 3
487 #define CC1200_MDMCFG2_UPSAMPLER_P 1
488 #define CC1200_MDMCFG2_UPSAMPLER_P_1 0
489 #define CC1200_MDMCFG2_UPSAMPLER_P_2 1
490 #define CC1200_MDMCFG2_UPSAMPLER_P_4 2
491 #define CC1200_MDMCFG2_UPSAMPLER_P_8 3
492 #define CC1200_MDMCFG2_UPSAMPLER_P_16 4
493 #define CC1200_MDMCFG2_UPSAMPLER_P_32 5
494 #define CC1200_MDMCFG2_UPSAMPLER_P_64 6
495 #define CC1200_MDMCFG2_CFM_DATA_EN 0
497 #define CC1200_EXT_CTRL (CC1200_EXTENDED_BIT | 0x06)
498 #define CC1200_RCCAL_FINE (CC1200_EXTENDED_BIT | 0x07)
499 #define CC1200_RCCAL_COARSE (CC1200_EXTENDED_BIT | 0x08)
500 #define CC1200_RCCAL_OFFSET (CC1200_EXTENDED_BIT | 0x09)
501 #define CC1200_FREQOFF1 (CC1200_EXTENDED_BIT | 0x0A)
502 #define CC1200_FREQOFF0 (CC1200_EXTENDED_BIT | 0x0B)
503 #define CC1200_FREQ2 (CC1200_EXTENDED_BIT | 0x0C)
504 #define CC1200_FREQ1 (CC1200_EXTENDED_BIT | 0x0D)
505 #define CC1200_FREQ0 (CC1200_EXTENDED_BIT | 0x0E)
506 #define CC1200_IF_ADC2 (CC1200_EXTENDED_BIT | 0x0F)
507 #define CC1200_IF_ADC1 (CC1200_EXTENDED_BIT | 0x10)
508 #define CC1200_IF_ADC0 (CC1200_EXTENDED_BIT | 0x11)
509 #define CC1200_FS_DIG1 (CC1200_EXTENDED_BIT | 0x12)
510 #define CC1200_FS_DIG0 (CC1200_EXTENDED_BIT | 0x13)
511 #define CC1200_FS_CAL3 (CC1200_EXTENDED_BIT | 0x14)
512 #define CC1200_FS_CAL2 (CC1200_EXTENDED_BIT | 0x15)
513 #define CC1200_FS_CAL1 (CC1200_EXTENDED_BIT | 0x16)
514 #define CC1200_FS_CAL0 (CC1200_EXTENDED_BIT | 0x17)
515 #define CC1200_FS_CHP (CC1200_EXTENDED_BIT | 0x18)
516 #define CC1200_FS_DIVTWO (CC1200_EXTENDED_BIT | 0x19)
517 #define CC1200_FS_DSM1 (CC1200_EXTENDED_BIT | 0x1A)
518 #define CC1200_FS_DSM0 (CC1200_EXTENDED_BIT | 0x1B)
519 #define CC1200_FS_DVC1 (CC1200_EXTENDED_BIT | 0x1C)
520 #define CC1200_FS_DVC0 (CC1200_EXTENDED_BIT | 0x1D)
521 #define CC1200_FS_LBI (CC1200_EXTENDED_BIT | 0x1E)
522 #define CC1200_FS_PFD (CC1200_EXTENDED_BIT | 0x1F)
523 #define CC1200_FS_PRE (CC1200_EXTENDED_BIT | 0x20)
524 #define CC1200_FS_REG_DIV_CML (CC1200_EXTENDED_BIT | 0x21)
525 #define CC1200_FS_SPARE (CC1200_EXTENDED_BIT | 0x22)
526 #define CC1200_FS_VCO4 (CC1200_EXTENDED_BIT | 0x23)
527 #define CC1200_FS_VCO3 (CC1200_EXTENDED_BIT | 0x24)
528 #define CC1200_FS_VCO2 (CC1200_EXTENDED_BIT | 0x25)
529 #define CC1200_FS_VCO1 (CC1200_EXTENDED_BIT | 0x26)
530 #define CC1200_FS_VCO0 (CC1200_EXTENDED_BIT | 0x27)
531 #define CC1200_GBIAS6 (CC1200_EXTENDED_BIT | 0x28)
532 #define CC1200_GBIAS5 (CC1200_EXTENDED_BIT | 0x29)
533 #define CC1200_GBIAS4 (CC1200_EXTENDED_BIT | 0x2A)
534 #define CC1200_GBIAS3 (CC1200_EXTENDED_BIT | 0x2B)
535 #define CC1200_GBIAS2 (CC1200_EXTENDED_BIT | 0x2C)
536 #define CC1200_GBIAS1 (CC1200_EXTENDED_BIT | 0x2D)
537 #define CC1200_GBIAS0 (CC1200_EXTENDED_BIT | 0x2E)
538 #define CC1200_IFAMP (CC1200_EXTENDED_BIT | 0x2F)
539 #define CC1200_LNA (CC1200_EXTENDED_BIT | 0x30)
540 #define CC1200_RXMIX (CC1200_EXTENDED_BIT | 0x31)
541 #define CC1200_XOSC5 (CC1200_EXTENDED_BIT | 0x32)
542 #define CC1200_XOSC4 (CC1200_EXTENDED_BIT | 0x33)
543 #define CC1200_XOSC3 (CC1200_EXTENDED_BIT | 0x34)
544 #define CC1200_XOSC2 (CC1200_EXTENDED_BIT | 0x35)
545 #define CC1200_XOSC1 (CC1200_EXTENDED_BIT | 0x36)
546 #define CC1200_XOSC0 (CC1200_EXTENDED_BIT | 0x37)
547 #define CC1200_ANALOG_SPARE (CC1200_EXTENDED_BIT | 0x38)
548 #define CC1200_PA_CFG3 (CC1200_EXTENDED_BIT | 0x39)
549 #define CC1200_WOR_TIME1 (CC1200_EXTENDED_BIT | 0x64)
550 #define CC1200_WOR_TIME0 (CC1200_EXTENDED_BIT | 0x65)
551 #define CC1200_WOR_CAPTURE1 (CC1200_EXTENDED_BIT | 0x66)
552 #define CC1200_WOR_CAPTURE0 (CC1200_EXTENDED_BIT | 0x67)
553 #define CC1200_BIST (CC1200_EXTENDED_BIT | 0x68)
554 #define CC1200_DCFILTOFFSET_I1 (CC1200_EXTENDED_BIT | 0x69)
555 #define CC1200_DCFILTOFFSET_I0 (CC1200_EXTENDED_BIT | 0x6A)
556 #define CC1200_DCFILTOFFSET_Q1 (CC1200_EXTENDED_BIT | 0x6B)
557 #define CC1200_DCFILTOFFSET_Q0 (CC1200_EXTENDED_BIT | 0x6C)
558 #define CC1200_IQIE_I1 (CC1200_EXTENDED_BIT | 0x6D)
559 #define CC1200_IQIE_I0 (CC1200_EXTENDED_BIT | 0x6E)
560 #define CC1200_IQIE_Q1 (CC1200_EXTENDED_BIT | 0x6f)
561 #define CC1200_IQIE_Q0 (CC1200_EXTENDED_BIT | 0x70)
562 #define CC1200_RSSI1 (CC1200_EXTENDED_BIT | 0x71)
563 #define CC1200_RSSI0 (CC1200_EXTENDED_BIT | 0x72)
564 #define CC1200_MARCSTATE (CC1200_EXTENDED_BIT | 0x73)
565 #define CC1200_LQI_VAL (CC1200_EXTENDED_BIT | 0x74)
566 #define CC1200_PQT_SYNC_ERR (CC1200_EXTENDED_BIT | 0x75)
567 #define CC1200_DEM_STATUS (CC1200_EXTENDED_BIT | 0x76)
568 #define CC1200_FREQOFF_EST1 (CC1200_EXTENDED_BIT | 0x77)
569 #define CC1200_FREQOFF_EST0 (CC1200_EXTENDED_BIT | 0x78)
570 #define CC1200_AGC_GAIN3 (CC1200_EXTENDED_BIT | 0x79)
571 #define CC1200_AGC_GAIN2 (CC1200_EXTENDED_BIT | 0x7a)
572 #define CC1200_AGC_GAIN1 (CC1200_EXTENDED_BIT | 0x7b)
573 #define CC1200_AGC_GAIN0 (CC1200_EXTENDED_BIT | 0x7c)
574 #define CC1200_SOFT_RX_DATA_OUT (CC1200_EXTENDED_BIT | 0x7d)
575 #define CC1200_SOFT_TX_DATA_IN (CC1200_EXTENDED_BIT | 0x7e)
576 #define CC1200_ASK_SOFT_RX_DATA (CC1200_EXTENDED_BIT | 0x7f)
577 #define CC1200_RNDGEN (CC1200_EXTENDED_BIT | 0x80)
578 #define CC1200_MAGN2 (CC1200_EXTENDED_BIT | 0x81)
579 #define CC1200_MAGN1 (CC1200_EXTENDED_BIT | 0x82)
580 #define CC1200_MAGN0 (CC1200_EXTENDED_BIT | 0x83)
581 #define CC1200_ANG1 (CC1200_EXTENDED_BIT | 0x84)
582 #define CC1200_ANG0 (CC1200_EXTENDED_BIT | 0x85)
583 #define CC1200_CHFILT_I2 (CC1200_EXTENDED_BIT | 0x86)
584 #define CC1200_CHFILT_I1 (CC1200_EXTENDED_BIT | 0x87)
585 #define CC1200_CHFILT_I0 (CC1200_EXTENDED_BIT | 0x88)
586 #define CC1200_CHFILT_Q2 (CC1200_EXTENDED_BIT | 0x89)
587 #define CC1200_CHFILT_Q1 (CC1200_EXTENDED_BIT | 0x8a)
588 #define CC1200_CHFILT_Q0 (CC1200_EXTENDED_BIT | 0x8b)
589 #define CC1200_GPIO_STATUS (CC1200_EXTENDED_BIT | 0x8c)
590 #define CC1200_FSCAL_CTRL (CC1200_EXTENDED_BIT | 0x8d)
591 #define CC1200_PHASE_ADJUST (CC1200_EXTENDED_BIT | 0x8e)
592 #define CC1200_PARTNUMBER (CC1200_EXTENDED_BIT | 0x8f)
593 #define CC1200_PARTVERSION (CC1200_EXTENDED_BIT | 0x90)
594 #define CC1200_SERIAL_STATUS (CC1200_EXTENDED_BIT | 0x91)
595 #define CC1200_MODEM_STATUS1 (CC1200_EXTENDED_BIT | 0x92)
596 #define CC1200_MODEM_STATUS1_SYNC_FOUND 7
597 #define CC1200_MODEM_STATUS1_RXFIFO_FULL 6
598 #define CC1200_MODEM_STATUS1_RXFIFO_THR 5
599 #define CC1200_MODEM_STATUS1_RXFIFO_EMPTY 4
600 #define CC1200_MODEM_STATUS1_RXFIFO_OVERFLOW 3
601 #define CC1200_MODEM_STATUS1_RXFIFO_UNDERFLOW 2
602 #define CC1200_MODEM_STATUS1_PQT_REACHED 1
603 #define CC1200_MODEM_STATUS1_PQT_VALID 0
605 #define CC1200_MODEM_STATUS0 (CC1200_EXTENDED_BIT | 0x93)
606 #define CC1200_MODEM_STATUS0_FEC_RX_OVERFLOW 6
607 #define CC1200_MODEM_STATUS0_SYNC_SENT 4
608 #define CC1200_MODEM_STATUS0_TXFIFO_FULL 3
609 #define CC1200_MODEM_STATUS0_TXFIFO_THR 2
610 #define CC1200_MODEM_STATUS0_TXFIFO_OVERFLOW 1
611 #define CC1200_MODEM_STATUS0_TXFIFO_UNDERFLOW 0
613 #define CC1200_MARC_STATUS1 (CC1200_EXTENDED_BIT | 0x94)
614 #define CC1200_MARC_STATUS1_NO_FAILURE 0
615 #define CC1200_MARC_STATUS1_RX_TIMEOUT 1
616 #define CC1200_MARC_STATUS1_RX_TERMINATION 2
617 #define CC1200_MARC_STATUS1_EWOR_SYNC_LOST 3
618 #define CC1200_MARC_STATUS1_MAXIMUM_LENGTH 4
619 #define CC1200_MARC_STATUS1_ADDRESS 5
620 #define CC1200_MARC_STATUS1_CRC 6
621 #define CC1200_MARC_STATUS1_TX_FIFO_OVERFLOW 7
622 #define CC1200_MARC_STATUS1_TX_FIFO_UNDERFLOW 8
623 #define CC1200_MARC_STATUS1_RX_FIFO_OVERFLOW 9
624 #define CC1200_MARC_STATUS1_RX_FIFO_UNDERFLOW 10
625 #define CC1200_MARC_STATUS1_TX_ON_CCA_FAILED 11
626 #define CC1200_MARC_STATUS1_TX_FINISHED 0x40
627 #define CC1200_MARC_STATUS1_RX_FINISHED 0x80
628 #define CC1200_MARC_STATUS0 (CC1200_EXTENDED_BIT | 0x95)
629 #define CC1200_PA_IFAMP_TEST (CC1200_EXTENDED_BIT | 0x96)
630 #define CC1200_FSRF_TEST (CC1200_EXTENDED_BIT | 0x97)
631 #define CC1200_PRE_TEST (CC1200_EXTENDED_BIT | 0x98)
632 #define CC1200_PRE_OVR (CC1200_EXTENDED_BIT | 0x99)
633 #define CC1200_ADC_TEST (CC1200_EXTENDED_BIT | 0x9a)
634 #define CC1200_DVC_TEST (CC1200_EXTENDED_BIT | 0x9b)
635 #define CC1200_ATEST (CC1200_EXTENDED_BIT | 0x9c)
636 #define CC1200_ATEST_LVDS (CC1200_EXTENDED_BIT | 0x9d)
637 #define CC1200_ATEST_MODE (CC1200_EXTENDED_BIT | 0x9e)
638 #define CC1200_XOSC_TEST1 (CC1200_EXTENDED_BIT | 0x9f)
639 #define CC1200_XOSC_TEST0 (CC1200_EXTENDED_BIT | 0xa0)
640 #define CC1200_RXFIRST (CC1200_EXTENDED_BIT | 0xd2)
641 #define CC1200_TXFIRST (CC1200_EXTENDED_BIT | 0xd3)
642 #define CC1200_RXLAST (CC1200_EXTENDED_BIT | 0xd4)
643 #define CC1200_TXLAST (CC1200_EXTENDED_BIT | 0xd5)
644 #define CC1200_NUM_TXBYTES (CC1200_EXTENDED_BIT | 0xd6)
645 #define CC1200_NUM_RXBYTES (CC1200_EXTENDED_BIT | 0xd7)
646 #define CC1200_FIFO_NUM_TXBYTES (CC1200_EXTENDED_BIT | 0xd8)
647 #define CC1200_FIFO_NUM_RXBYTES (CC1200_EXTENDED_BIT | 0xd9)
648 #define CC1200_RXFIFO_PRE_BUF (CC1200_EXTENDED_BIT | 0xda)
649 #define CC1200_AES_WORKSPACE_0 (CC1200_EXTENDED_BIT | 0xe0)
652 #define CC1200_STATUS_CHIP_RDY 7
653 #define CC1200_STATUS_STATE 4
654 #define CC1200_STATUS_STATE_IDLE 0
655 #define CC1200_STATUS_STATE_RX 1
656 #define CC1200_STATUS_STATE_TX 2
657 #define CC1200_STATUS_STATE_FSTXON 3
658 #define CC1200_STATUS_STATE_CALIBRATE 4
659 #define CC1200_STATUS_STATE_SETTLING 5
660 #define CC1200_STATUS_STATE_RX_FIFO_ERROR 6
661 #define CC1200_STATUS_STATE_TX_FIFO_ERROR 7
662 #define CC1200_STATUS_STATE_MASK 7
664 #endif /* _AO_CC1200_H_ */