2 * Copyright © 2009 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 volatile __data uint16_t ao_tick_count;
22 uint16_t ao_time(void) __critical
27 #define T1_CLOCK_DIVISOR 8 /* 24e6/8 = 3e6 */
28 #define T1_SAMPLE_TIME 30000 /* 3e6/30000 = 100 */
31 volatile __data uint8_t ao_adc_interval = 1;
32 volatile __data uint8_t ao_adc_count;
35 void ao_timer_isr(void) __interrupt 9
39 if (++ao_adc_count == ao_adc_interval) {
42 #if (AO_DATA_ALL & ~(AO_DATA_ADC))
43 ao_wakeup(DATA_TO_XDATA(&ao_adc_count));
51 ao_timer_set_adc_interval(uint8_t interval) __critical
53 ao_adc_interval = interval;
61 /* NOTE: This uses a timer only present on cc1111 architecture. */
66 /* set the sample rate */
67 T1CC0H = T1_SAMPLE_TIME >> 8;
68 T1CC0L = (uint8_t) T1_SAMPLE_TIME;
70 T1CCTL0 = T1CCTL_MODE_COMPARE;
74 /* clear timer value */
77 /* enable overflow interrupt */
79 /* enable timer 1 interrupt */
82 /* enable timer 1 in module mode, dividing by 8 */
83 T1CTL = T1CTL_MODE_MODULO | T1CTL_DIV_8;
86 #ifndef NEEDS_CC1111_CLOCK_HACK
87 #define NEEDS_CC1111_CLOCK_HACK 1
90 #if NEEDS_CC1111_CLOCK_HACK
102 * AltOS always cranks the clock to the max frequency
107 #if NEEDS_CC1111_CLOCK_HACK
108 /* Power up both oscillators */
109 SLEEP &= ~(SLEEP_OSC_PD);
111 /* Switch to the HFRC oscillator */
112 CLKCON = (CLKCON & ~CLKCON_OSC_MASK) | (CLKCON_OSC_RC);
114 /* Wait for the HFRC oscillator to be stable */
115 while (!(SLEEP & SLEEP_HFRC_STB))
118 /* Delay for 'a while' waiting for the crystal to
119 * stabilize -- the XOSC_STB bit isn't reliable
121 * http://www.ti.com/lit/er/swrz022c/swrz022c.pdf
127 /* Switch system clock to crystal oscilator */
128 CLKCON = (CLKCON & ~CLKCON_OSC_MASK) | (CLKCON_OSC_XTAL);
130 /* Wait for the HFRC oscillator to be stable */
131 while (!(SLEEP & SLEEP_XOSC_STB))
134 /* Power down the unused HFRC oscillator */
135 SLEEP |= SLEEP_OSC_PD;
137 /* Crank up the timer tick and system clock speed */
138 CLKCON = ((CLKCON & ~(CLKCON_TICKSPD_MASK | CLKCON_CLKSPD_MASK)) |
139 (CLKCON_TICKSPD_1 | CLKCON_CLKSPD_1));
141 while ((CLKCON & (CLKCON_TICKSPD_MASK|CLKCON_CLKSPD_MASK)) !=
142 (CLKCON_TICKSPD_1 | CLKCON_CLKSPD_1))