1 *FDS9926A at Temp. Electrical Model
\r
2 *-------------------------------------
\r
3 .SUBCKT FDS9926A 20 10 30 50
\r
4 *20=DRAIN 10=GATE 30=SOURCE 50=VTEMP
\r
7 M1 2 1 4x 4x DMOS L=1u W=1u
\r
8 .MODEL DMOS NMOS(VTO=1.2 KP=2.93E+1
\r
9 +THETA=.133333 VMAX=9E5 LEVEL=3)
\r
13 .MODEL DDS D( M=4.32E-1 VJ=6.89E-1 CJO=196p)
\r
15 .MODEL DBODY D(IS=2.53E-11 N=1.074937 RS=.00065 TT=6.9n)
\r
21 .MODEL INTER NMOS(VTO=0 KP=10 LEVEL=1)
\r
26 .MODEL DGD D(M=2.95E-1 VJ=1.54E-2 CJO=587p)
\r
30 EOUT 4x 6x poly(2) (1x,0) (3x,0) 0 0 0 0 1
\r
36 ED 101 0 VALUE {V(50,100)}
\r
40 EVTO 102 0 101 0 .001
\r
42 *DIODE THEMO BREAKDOWN SECTION
\r
43 EBL VB1 VB2 101 0 .08
\r
46 .MODEL DBLK D(IS=1E-14 CJO=.1p RS=.1)
\r
49 *FDS9926A (Rev.A) 8/25/03
\r