2 Last week somebody asked for a list of opcodes.
3 Well, here is mine. Have fun!
5 | Herbert Oppmann | email: htoppman@cip.informatik.uni-erlangen.de |
6 | irc: mtx | mail: Drausnickstrasse 29, D-8520 Erlangen |
8 ------------ 8< ---------- 8< ---------------
9 8080/Z80/HD64180 opcodes
12 HX, LX highbyte/lowbyte of IX
18 + HD 64180 (reacts with a trap to illegal Z80 opcodes)
20 Hex Instruction Comment (applies to Z80 only)
21 -----------------------------------------------
273 CB 30 / SLIA B (Shift Left Inverted Arithmetic)
274 CB 31 / SLIA C like SLA, but shifts in a 1 bit
498 All other DD combinations not listed below:
499 DD is ignored, all following bytes are treated as instructions
502 DD 21 nnnn * LD IX,nnnn
503 DD 22 nnnn * LD (nnnn),IX
509 DD 2A nnnn * LD IX,(nnnn)
514 DD 34 dd * INC (IX+dd)
515 DD 35 dd * DEC (IX+dd)
516 DD 36 dd nn * LD (IX+dd),nn
520 DD 46 dd * LD B,(IX+dd)
523 DD 4E dd * LD C,(IX+dd)
526 DD 56 dd * LD D,(IX+dd)
529 DD 5E dd * LD E,(IX+dd)
536 DD 66 dd * LD H,(IX+dd)
544 DD 6E dd * LD L,(IX+dd)
546 DD 70 dd * LD (IX+dd),B
547 DD 71 dd * LD (IX+dd),C
548 DD 72 dd * LD (IX+dd),D
549 DD 73 dd * LD (IX+dd),E
550 DD 74 dd * LD (IX+dd),H
551 DD 75 dd * LD (IX+dd),L
552 DD 77 dd * LD (IX+dd),A
555 DD 7E dd * LD A,(IX+dd)
558 DD 86 dd * ADD A,(IX+dd) /* add +dd, kpb */
561 DD 8E dd * ADC A,(IX+dd) /* add +dd, kpb */
564 DD 96 dd * SUB (IX+dd)
567 DD 9E dd * SBC A,(IX+dd)
570 DD A6 dd * AND (IX+dd)
573 DD AE dd * XOR (IX+dd)
576 DD B6 dd * OR (IX+dd)
579 DD BE dd * CP (IX+dd)
580 DD CB dd 00 / RLC (IX+dd)->B result is placed in a register
581 DD CB dd 01 / RLC (IX+dd)->C additionally
582 DD CB dd 02 / RLC (IX+dd)->D
583 DD CB dd 03 / RLC (IX+dd)->E
584 DD CB dd 04 / RLC (IX+dd)->H
585 DD CB dd 05 / RLC (IX+dd)->L
586 DD CB dd 06 * RLC (IX+dd)
587 DD CB dd 07 / RLC (IX+dd)->A
588 DD CB dd 08 / RRC (IX+dd)->B
589 DD CB dd 09 / RRC (IX+dd)->C
590 DD CB dd 0A / RRC (IX+dd)->D
591 DD CB dd 0B / RRC (IX+dd)->E
592 DD CB dd 0C / RRC (IX+dd)->H
593 DD CB dd 0D / RRC (IX+dd)->L
594 DD CB dd 0E * RRC (IX+dd)
595 DD CB dd 0F / RRC (IX+dd)->A
596 DD CB dd 10 / RL (IX+dd)->B
597 DD CB dd 11 / RL (IX+dd)->C
598 DD CB dd 12 / RL (IX+dd)->D
599 DD CB dd 13 / RL (IX+dd)->E
600 DD CB dd 14 / RL (IX+dd)->H
601 DD CB dd 15 / RL (IX+dd)->L
602 DD CB dd 16 * RL (IX+dd)
603 DD CB dd 17 / RL (IX+dd)->A
604 DD CB dd 18 / RR (IX+dd)->B
605 DD CB dd 19 / RR (IX+dd)->C
606 DD CB dd 1A / RR (IX+dd)->D
607 DD CB dd 1B / RR (IX+dd)->E
608 DD CB dd 1C / RR (IX+dd)->H
609 DD CB dd 1D / RR (IX+dd)->L
610 DD CB dd 1E * RR (IX+dd)
611 DD CB dd 1F / RR (IX+dd)->A
612 DD CB dd 20 / SLA (IX+dd)->B
613 DD CB dd 21 / SLA (IX+dd)->C
614 DD CB dd 22 / SLA (IX+dd)->D
615 DD CB dd 23 / SLA (IX+dd)->E
616 DD CB dd 24 / SLA (IX+dd)->H
617 DD CB dd 25 / SLA (IX+dd)->L
618 DD CB dd 26 * SLA (IX+dd)
619 DD CB dd 27 / SLA (IX+dd)->A
620 DD CB dd 28 / SRA (IX+dd)->B
621 DD CB dd 29 / SRA (IX+dd)->C
622 DD CB dd 2A / SRA (IX+dd)->D
623 DD CB dd 2B / SRA (IX+dd)->E
624 DD CB dd 2C / SRA (IX+dd)->H
625 DD CB dd 2D / SRA (IX+dd)->L
626 DD CB dd 2E * SRA (IX+dd)
627 DD CB dd 2F / SRA (IX+dd)->A
628 DD CB dd 30 / SLIA (IX+dd)->B
629 DD CB dd 31 / SLIA (IX+dd)->C
630 DD CB dd 32 / SLIA (IX+dd)->D
631 DD CB dd 33 / SLIA (IX+dd)->E
632 DD CB dd 34 / SLIA (IX+dd)->H
633 DD CB dd 35 / SLIA (IX+dd)->L
634 DD CB dd 36 / SLIA (IX+dd)
635 DD CB dd 37 / SLIA (IX+dd)->A
636 DD CB dd 38 / SRL (IX+dd)->B
637 DD CB dd 39 / SRL (IX+dd)->C
638 DD CB dd 3A / SRL (IX+dd)->D
639 DD CB dd 3B / SRL (IX+dd)->E
640 DD CB dd 3C / SRL (IX+dd)->H
641 DD CB dd 3D / SRL (IX+dd)->L
642 DD CB dd 3E * SRL (IX+dd)
643 DD CB dd 3F / SRL (IX+dd)->A
644 DD CB dd 46 * BIT 0,(IX+dd) all other BIT combinations
645 DD CB dd 4E * BIT 1,(IX+dd) react like the documented ones
646 DD CB dd 56 * BIT 2,(IX+dd) because there is no write
647 DD CB dd 5E * BIT 3,(IX+dd)
648 DD CB dd 66 * BIT 4,(IX+dd)
649 DD CB dd 6E * BIT 5,(IX+dd)
650 DD CB dd 76 * BIT 6,(IX+dd)
651 DD CB dd 7E * BIT 7,(IX+dd)
652 DD CB dd 80 / RES 0,(IX+dd)->B
653 DD CB dd 81 / RES 0,(IX+dd)->C
654 DD CB dd 82 / RES 0,(IX+dd)->D
655 DD CB dd 83 / RES 0,(IX+dd)->E
656 DD CB dd 84 / RES 0,(IX+dd)->H
657 DD CB dd 85 / RES 0,(IX+dd)->L
658 DD CB dd 86 * RES 0,(IX+dd)
659 DD CB dd 87 / RES 0,(IX+dd)->A
660 DD CB dd 88 / RES 1,(IX+dd)->B
661 DD CB dd 89 / RES 1,(IX+dd)->C
662 DD CB dd 8A / RES 1,(IX+dd)->D
663 DD CB dd 8B / RES 1,(IX+dd)->E
664 DD CB dd 8C / RES 1,(IX+dd)->H
665 DD CB dd 8D / RES 1,(IX+dd)->L
666 DD CB dd 8E * RES 1,(IX+dd)
667 DD CB dd 8F / RES 1,(IX+dd)->A
668 DD CB dd 90 / RES 2,(IX+dd)->B
669 DD CB dd 91 / RES 2,(IX+dd)->C
670 DD CB dd 92 / RES 2,(IX+dd)->D
671 DD CB dd 93 / RES 2,(IX+dd)->E
672 DD CB dd 94 / RES 2,(IX+dd)->H
673 DD CB dd 95 / RES 2,(IX+dd)->L
674 DD CB dd 96 * RES 2,(IX+dd)
675 DD CB dd 97 / RES 2,(IX+dd)->A
676 DD CB dd 98 / RES 3,(IX+dd)->B
677 DD CB dd 99 / RES 3,(IX+dd)->C
678 DD CB dd 9A / RES 3,(IX+dd)->D
679 DD CB dd 9B / RES 3,(IX+dd)->E
680 DD CB dd 9C / RES 3,(IX+dd)->H
681 DD CB dd 9D / RES 3,(IX+dd)->L
682 DD CB dd 9E * RES 3,(IX+dd)
683 DD CB dd 9F / RES 3,(IX+dd)->A
684 DD CB dd A0 / RES 4,(IX+dd)->B
685 DD CB dd A1 / RES 4,(IX+dd)->C
686 DD CB dd A2 / RES 4,(IX+dd)->D
687 DD CB dd A3 / RES 4,(IX+dd)->E
688 DD CB dd A4 / RES 4,(IX+dd)->H
689 DD CB dd A5 / RES 4,(IX+dd)->L
690 DD CB dd A6 * RES 4,(IX+dd)
691 DD CB dd A7 / RES 4,(IX+dd)->A
692 DD CB dd A8 / RES 5,(IX+dd)->B
693 DD CB dd A9 / RES 5,(IX+dd)->C
694 DD CB dd AA / RES 5,(IX+dd)->D
695 DD CB dd AB / RES 5,(IX+dd)->E
696 DD CB dd AC / RES 5,(IX+dd)->H
697 DD CB dd AD / RES 5,(IX+dd)->L
698 DD CB dd AE * RES 5,(IX+dd)
699 DD CB dd AF / RES 5,(IX+dd)->A
700 DD CB dd B0 / RES 6,(IX+dd)->B
701 DD CB dd B1 / RES 6,(IX+dd)->C
702 DD CB dd B2 / RES 6,(IX+dd)->D
703 DD CB dd B3 / RES 6,(IX+dd)->E
704 DD CB dd B4 / RES 6,(IX+dd)->H
705 DD CB dd B5 / RES 6,(IX+dd)->L
706 DD CB dd B6 * RES 6,(IX+dd)
707 DD CB dd B7 / RES 6,(IX+dd)->A
708 DD CB dd B8 / RES 7,(IX+dd)->B
709 DD CB dd B9 / RES 7,(IX+dd)->C
710 DD CB dd BA / RES 7,(IX+dd)->D
711 DD CB dd BB / RES 7,(IX+dd)->E
712 DD CB dd BC / RES 7,(IX+dd)->H
713 DD CB dd BD / RES 7,(IX+dd)->L
714 DD CB dd BE * RES 7,(IX+dd)
715 DD CB dd BF / RES 7,(IX+dd)->A
716 DD CB dd C0 / SET 0,(IX+dd)->B
717 DD CB dd C1 / SET 0,(IX+dd)->C
718 DD CB dd C2 / SET 0,(IX+dd)->D
719 DD CB dd C3 / SET 0,(IX+dd)->E
720 DD CB dd C4 / SET 0,(IX+dd)->H
721 DD CB dd C5 / SET 0,(IX+dd)->L
722 DD CB dd C6 * SET 0,(IX+dd)
723 DD CB dd C7 / SET 0,(IX+dd)->A
724 DD CB dd C8 / SET 1,(IX+dd)->B
725 DD CB dd C9 / SET 1,(IX+dd)->C
726 DD CB dd CA / SET 1,(IX+dd)->D
727 DD CB dd CB / SET 1,(IX+dd)->E
728 DD CB dd CC / SET 1,(IX+dd)->H
729 DD CB dd CD / SET 1,(IX+dd)->L
730 DD CB dd CE * SET 1,(IX+dd)
731 DD CB dd CF / SET 1,(IX+dd)->A
732 DD CB dd D0 / SET 2,(IX+dd)->B
733 DD CB dd D1 / SET 2,(IX+dd)->C
734 DD CB dd D2 / SET 2,(IX+dd)->D
735 DD CB dd D3 / SET 2,(IX+dd)->E
736 DD CB dd D4 / SET 2,(IX+dd)->H
737 DD CB dd D5 / SET 2,(IX+dd)->L
738 DD CB dd D6 * SET 2,(IX+dd)
739 DD CB dd D7 / SET 2,(IX+dd)->A
740 DD CB dd D8 / SET 3,(IX+dd)->B
741 DD CB dd D9 / SET 3,(IX+dd)->C
742 DD CB dd DA / SET 3,(IX+dd)->D
743 DD CB dd DB / SET 3,(IX+dd)->E
744 DD CB dd DC / SET 3,(IX+dd)->H
745 DD CB dd DD / SET 3,(IX+dd)->L
746 DD CB dd DE * SET 3,(IX+dd)
747 DD CB dd DF / SET 3,(IX+dd)->A
748 DD CB dd E0 / SET 4,(IX+dd)->B
749 DD CB dd E1 / SET 4,(IX+dd)->C
750 DD CB dd E2 / SET 4,(IX+dd)->D
751 DD CB dd E3 / SET 4,(IX+dd)->E
752 DD CB dd E4 / SET 4,(IX+dd)->H
753 DD CB dd E5 / SET 4,(IX+dd)->L
754 DD CB dd E6 * SET 4,(IX+dd)
755 DD CB dd E7 / SET 4,(IX+dd)->A
756 DD CB dd E8 / SET 5,(IX+dd)->B
757 DD CB dd E9 / SET 5,(IX+dd)->C
758 DD CB dd EA / SET 5,(IX+dd)->D
759 DD CB dd EB / SET 5,(IX+dd)->E
760 DD CB dd EC / SET 5,(IX+dd)->H
761 DD CB dd ED / SET 5,(IX+dd)->L
762 DD CB dd EE * SET 5,(IX+dd)
763 DD CB dd EF / SET 5,(IX+dd)->A
764 DD CB dd F0 / SET 6,(IX+dd)->B
765 DD CB dd F1 / SET 6,(IX+dd)->C
766 DD CB dd F2 / SET 6,(IX+dd)->D
767 DD CB dd F3 / SET 6,(IX+dd)->E
768 DD CB dd F4 / SET 6,(IX+dd)->H
769 DD CB dd F5 / SET 6,(IX+dd)->L
770 DD CB dd F6 * SET 6,(IX+dd)
771 DD CB dd F7 / SET 6,(IX+dd)->A
772 DD CB dd F8 / SET 7,(IX+dd)->B
773 DD CB dd F9 / SET 7,(IX+dd)->C
774 DD CB dd FA / SET 7,(IX+dd)->D
775 DD CB dd FB / SET 7,(IX+dd)->E
776 DD CB dd FC / SET 7,(IX+dd)->H
777 DD CB dd FD / SET 7,(IX+dd)->L
778 DD CB dd FE * SET 7,(IX+dd)
779 DD CB dd FF / SET 7,(IX+dd)->A
800 All other ED combinations not listed below:
801 in the range ED40 - ED7F: valid opcodes are mirrored
802 elsewhere: ED and the next byte is ignored,
803 all following bytes treated as instructions
804 ED 00 nn + IN0 B,(nn)
805 ED 01 nn + OUT0 (nn),B
807 ED 08 nn + IN0 C,(nn)
808 ED 09 nn + OUT0 (nn),C
810 ED 10 nn + IN0 D,(nn)
811 ED 11 nn + OUT0 (nn),D
813 ED 18 nn + IN0 E,(nn)
814 ED 19 nn + OUT0 (nn),E
816 ED 20 nn + IN0 H,(nn)
817 ED 21 nn + OUT0 (nn),H
819 ED 28 nn + IN0 L,(nn)
820 ED 29 nn + OUT0 (nn),L
822 ED 30 nn + IN0 (nn) set flags only
824 ED 38 nn + IN0 A,(nn)
825 ED 39 nn + OUT0 (nn),A
830 ED 43 nnnn * LD (nnnn),BC
838 ED 4B nnnn * LD BC,(nnnn)
845 ED 53 nnnn * LD (nnnn),DE
851 ED 5B nnnn * LD DE,(nnnn)
858 ED 63 nnnn * LD (nnnn),HL opcode 22 does the same faster
864 ED 6B nnnn * LD HL,(nnnn) opcode 2A does the same faster
867 ED 70 / IN (C) set flags only (TSTI)
868 ^--- can be viewed as *, because SGS manual and HD64180
869 manual list this instruction as valid Z80
872 ED 73 nnnn * LD (nnnn),SP
878 ED 7B nnnn * LD SP,(nnnn)
915 FD ... * like DD ..., with IY instead of IX
920 From: peterm@maths.grace.cri.nz (Peter McGavin)
921 Newsgroups: comp.sys.sinclair
922 Subject: Re: Undocumented Z80 opcodes
923 Date: 05 Jan 1994 20:44:15 GMT
924 Organization: Applied Maths, Industrial Research Ltd, NZ
925 NNTP-Posting-Host: kea.grace.cri.nz
926 In-reply-to: agulbra@tigern.nvg.unit.no's message of 5 Jan 1994 17:47:59 +0100
928 In article, <2geqvv$nlq@tigern.nvg.unit.no>,
929 agulbra@tigern.nvg.unit.no (Arnt Gulbrandsen) wrote:
930 >I believe that list originally was written by from David Librik
931 ><librik@cory.eecs.berkeley.edu>. David (with someone else, I think)
932 >reverse-engineered the Z80 and wrote a list of what he found, a list
933 >which I think I sent to Peter.
935 Actually I got it from Simon Owen (S.N.Owen@newcastle.ac.uk).
937 Here it is: (sorry it's a bit wide)
938 ------------------------------------------------------------------------------
941 + Instruction is unchanged by index prefix
942 * Instruction thought of as 'undocumented'
946 IM * - is either IM 0 or IM 1 (more likely IM 0), hard to decide which
948 IN X,(C) reads into nowhere (not even (HL)) but affects the flags.
949 OUT (C),X performs OUT (C),0
951 *NOP indicated instruction has no effect on anything [ 2M cycles delay ? ]
953 instructions with an ED prefix cannot have a preceding DD prefix as well.
955 Instructions like LD B,RL (IX+d) perform RL (IX+d) and load B with the result
956 AS WELL AS affecting the contents of (IX+d). 2 for price of 1 !
960 +-------------------------------+-------------------+------------------+------------------+-------------------------+
961 | Hex | Dec | Normal | DD Prefix | CB Prefix | ED Prefix | DDCB prefix |
962 +-------------------------------+-------------------+------------------+------------------+-------------------------+
963 |[ 00 | 000 ] | NOP | +NOP | RLC B | *NOP | *LD B,RLC (IX+d) |
964 |[ 01 | 001 ] | LD BC,nn | +LD BC,nn | RLC C | *NOP | *LD C,RLC (IX+d) |
965 |[ 02 | 002 ] | LD (BC),A | +LD (BC),A | RLC D | *NOP | *LD D,RLC (IX+d) |
966 |[ 03 | 003 ] | INC BC | +INC BC | RLC E | *NOP | *LD E,RLC (IX+d) |
967 |[ 04 | 004 ] | INC B | +INC B | RLC H | *NOP | *LD H,RLC (IX+d) |
968 |[ 05 | 005 ] | DEC B | +DEC B | RLC L | *NOP | *LD L,RLC (IX+d) |
969 |[ 06 | 006 ] | LD B,n | +LD B,n | RLC (HL) | *NOP | RLC (IX+d) |
970 |[ 07 | 007 ] | RLCA | +RLCA | RLC A | *NOP | *LD A,RLC (IX+d) |
971 |[ 08 | 008 ] | EX AF,AF' | +EX AF,AF' | RRC B | *NOP | *LD B,RRC (IX+d) |
972 |[ 09 | 009 ] | ADD HL,BC | ADD IX,BC | RRC C | *NOP | *LD C,RRC (IX+d) |
973 |[ 0a | 010 ] | LD A,(BC) | +LD A,(BC) | RRC D | *NOP | *LD D,RRC (IX+d) |
974 |[ 0b | 011 ] | DEC BC | +DEC BC | RRC E | *NOP | *LD E,RRC (IX+d) |
975 |[ 0c | 012 ] | INC C | +INC C | RRC H | *NOP | *LD H,RRC (IX+d) |
976 |[ 0d | 013 ] | DEC C | +DEC C | RRC L | *NOP | *LD L,RRC (IX+d) |
977 |[ 0e | 014 ] | LD C,n | +LD C,n | RRC (HL) | *NOP | RRC (IX+d) |
978 |[ 0f | 015 ] | RRCA | +RRCA | RRC A | *NOP | *LD A,RRC (IX+d) |
979 |[ 10 | 016 ] | DJNZ d | +DJNZ d | RL B | *NOP | *LD B,RL (IX+d) |
980 |[ 11 | 017 ] | LD DE,nn | +LD DE,nn | RL C | *NOP | *LD C,RL (IX+d) |
981 |[ 12 | 018 ] | LD (DE),A | +LD (DE),A | RL D | *NOP | *LD D,RL (IX+d) |
982 |[ 13 | 019 ] | INC DE | +INC DE | RL E | *NOP | *LD E,RL (IX+d) |
983 |[ 14 | 020 ] | INC D | +INC D | RL H | *NOP | *LD H,RL (IX+d) |
984 |[ 15 | 021 ] | DEC D | +DEC D | RL L | *NOP | *LD L,RL (IX+d) |
985 |[ 16 | 022 ] | LD D,n | +LD D,n | RL (HL) | *NOP | RL (IX+d) |
986 |[ 17 | 023 ] | RLA | +RLA | RL A | *NOP | *LD A,RL (IX+d) |
987 |[ 18 | 024 ] | JR d | +JR d | RR B | *NOP | *LD B,RR (IX+d) |
988 |[ 19 | 025 ] | ADD HL,DE | ADD IX,DE | RR C | *NOP | *LD C,RR (IX+d) |
989 |[ 1a | 026 ] | LD A,(DE) | +LD A,(DE) | RR D | *NOP | *LD D,RR (IX+d) |
990 |[ 1b | 027 ] | DEC DE | +DEC DE | RR E | *NOP | *LD E,RR (IX+d) |
991 |[ 1c | 028 ] | INC E | +INC E | RR H | *NOP | *LD H,RR (IX+d) |
992 |[ 1d | 029 ] | DEC E | +DEC E | RR L | *NOP | *LD L,RR (IX+d) |
993 |[ 1e | 030 ] | LD E,n | +LD E,n | RR (HL) | *NOP | RR (IX+d) |
994 |[ 1f | 031 ] | RRA | +RRA | RR A | *NOP | *LD A,RR (IX+d) |
995 |[ 20 | 032 ] | JR NZ,d | +JR NZ,d | SLA B | *NOP | *LD B,SLA (IX+d) |
996 |[ 21 | 033 ] | LD HL,nn | LD IX,nn | SLA C | *NOP | *LD C,SLA (IX+d) |
997 |[ 22 | 034 ] | LD (nn),HL | LD (nn),IX | SLA D | *NOP | *LD D,SLA (IX+d) |
998 |[ 23 | 035 ] | INC HL | INC IX | SLA E | *NOP | *LD E,SLA (IX+d) |
999 |[ 24 | 036 ] | INC H | *INC IXh | SLA H | *NOP | *LD H,SLA (IX+d) |
1000 |[ 25 | 037 ] | DEC H | *DEC IXh | SLA L | *NOP | *LD L,SLA (IX+d) |
1001 |[ 26 | 038 ] | LD H,n | *LD IXh,n | SLA (HL) | *NOP | SLA (IX+d) |
1002 |[ 27 | 039 ] | DAA | +DAA | SLA A | *NOP | *LD A,SLA (IX+d) |
1003 |[ 28 | 040 ] | JR Z,d | +JR Z,d | SRA B | *NOP | *LD B,SRA (IX+d) |
1004 |[ 29 | 041 ] | ADD HL,HL | ADD IX,IX | SRA C | *NOP | *LD C,SRA (IX+d) |
1005 |[ 2a | 042 ] | LD HL,(nn) | LD IX,(nn) | SRA D | *NOP | *LD D,SRA (IX+d) |
1006 |[ 2b | 043 ] | DEC HL | DEC IX | SRA E | *NOP | *LD E,SRA (IX+d) |
1007 |[ 2c | 044 ] | INC L | *INC IXl | SRA H | *NOP | *LD H,SRA (IX+d) |
1008 |[ 2d | 045 ] | DEC L | *DEC IXl | SRA L | *NOP | *LD L,SRA (IX+d) |
1009 |[ 2e | 046 ] | LD L,n | *LD IXl,n | SRA (HL) | *NOP | SRA (IX+d) |
1010 |[ 2f | 047 ] | CPL | +CPL | SRA A | *NOP | *LD A,SRA (IX+d) |
1011 |[ 30 | 048 ] | JR NC,d | +JR NC,d | SLL B | *NOP | *LD B,SLL (IX+d) |
1012 |[ 31 | 049 ] | LD SP,nn | +LD SP,nn | SLL C | *NOP | *LD C,SLL (IX+d) |
1013 |[ 32 | 050 ] | LD (nn),A | +LD (nn),A | SLL D | *NOP | *LD D,SLL (IX+d) |
1014 |[ 33 | 051 ] | INC SP | +INC SP | SLL E | *NOP | *LD E,SLL (IX+d) |
1015 |[ 34 | 052 ] | INC (HL) | INC (IX+d) | SLL H | *NOP | *LD H,SLL (IX+d) |
1016 |[ 35 | 053 ] | DEC (HL) | DEC (IX+d) | SLL L | *NOP | *LD L,SLL (IX+d) |
1017 |[ 36 | 054 ] | LD (HL),n | LD (IX+d),n | SLL (HL) | *NOP | SLL (IX+d) |
1018 |[ 37 | 055 ] | SCF | +SCF | SLL A | *NOP | *LD A,SLL (IX+d) |
1019 |[ 38 | 056 ] | JR C,d | +JR C,d | SRL B | *NOP | *LD B,SRL (IX+d) |
1020 |[ 39 | 057 ] | ADD HL,SP | ADD IX,SP | SRL C | *NOP | *LD C,SRL (IX+d) |
1021 |[ 3a | 058 ] | LD A,(nn) | +LD A,(nn) | SRL D | *NOP | *LD D,SRL (IX+d) |
1022 |[ 3b | 059 ] | DEC SP | +DEC SP | SRL E | *NOP | *LD E,SRL (IX+d) |
1023 |[ 3c | 060 ] | INC A | +INC A | SRL H | *NOP | *LD H,SRL (IX+d) |
1024 |[ 3d | 061 ] | DEC A | +DEC A | SRL L | *NOP | *LD L,SRL (IX+d) |
1025 |[ 3e | 062 ] | LD A,n | +LD A,n | SRL (HL) | *NOP | SRL (IX+d) |
1026 |[ 3f | 063 ] | CCF | +CCF | SRL A | *NOP | *LD A,SRL (IX+d) |
1027 |[ 40 | 064 ] | LD B,B | +LD B,B | BIT 0,B | IN B,(C) | *BIT 0,(IX+d) |
1028 |[ 41 | 065 ] | LD B,C | +LD B,C | BIT 0,C | OUT (C),B | *BIT 0,(IX+d) |
1029 |[ 42 | 066 ] | LD B,D | +LD B,D | BIT 0,D | SBC HL,BC | *BIT 0,(IX+d) |
1030 |[ 43 | 067 ] | LD B,E | +LD B,E | BIT 0,E | LD (nn),BC | *BIT 0,(IX+d) |
1031 |[ 44 | 068 ] | LD B,H | *LD B,IXh | BIT 0,H | NEG | *BIT 0,(IX+d) |
1032 |[ 45 | 069 ] | LD B,L | *LD B,IXl | BIT 0,L | RETN | *BIT 0,(IX+d) |
1033 |[ 46 | 070 ] | LD B,(HL) | LD B,(IX+d) | BIT 0,(HL) | IM 0 | BIT 0,(IX+d) |
1034 |[ 47 | 071 ] | LD B,A | +LD B,A | BIT 0,A | LD I,A | *BIT 0,(IX+d) |
1035 |[ 48 | 072 ] | LD C,B | +LD C,B | BIT 1,B | IN C,(C) | *BIT 1,(IX+d) |
1036 |[ 49 | 073 ] | LD C,C | +LD C,C | BIT 1,C | OUT (C),C | *BIT 1,(IX+d) |
1037 |[ 4a | 074 ] | LD C,D | +LD C,D | BIT 1,D | ADC HL,BC | *BIT 1,(IX+d) |
1038 |[ 4b | 075 ] | LD C,E | +LD C,E | BIT 1,E | LD BC,(nn) | *BIT 1,(IX+d) |
1039 |[ 4c | 076 ] | LD C,H | *LD C,IXh | BIT 1,H | *NEG | *BIT 1,(IX+d) |
1040 |[ 4d | 077 ] | LD C,L | *LD C,IXl | BIT 1,L | RETI | *BIT 1,(IX+d) |
1041 |[ 4e | 078 ] | LD C,(HL) | LD C,(IX+d) | BIT 1,(HL) | *IM * (0?) | BIT 1,(IX+d) |
1042 |[ 4f | 079 ] | LD C,A | +LD C,A | BIT 1,A | LD R,A | *BIT 1,(IX+d) |
1043 |[ 50 | 080 ] | LD D,B | +LD D,B | BIT 2,B | IN D,(C) | *BIT 2,(IX+d) |
1044 |[ 51 | 081 ] | LD D,C | +LD D,C | BIT 2,C | OUT (C),D | *BIT 2,(IX+d) |
1045 |[ 52 | 082 ] | LD D,D | +LD D,D | BIT 2,D | SBC HL,DE | *BIT 2,(IX+d) |
1046 |[ 53 | 083 ] | LD D,E | +LD D,E | BIT 2,E | LD (nn),DE | *BIT 2,(IX+d) |
1047 |[ 54 | 084 ] | LD D,H | *LD D,IXh | BIT 2,H | *NEG | *BIT 2,(IX+d) |
1048 |[ 55 | 085 ] | LD D,L | *LD D,IXl | BIT 2,L | *RETN | *BIT 2,(IX+d) |
1049 |[ 56 | 086 ] | LD D,(HL) | LD D,(IX+d) | BIT 2,(HL) | IM 1 | BIT 2,(IX+d) |
1050 |[ 57 | 087 ] | LD D,A | +LD D,A | BIT 2,A | LD A,I | *BIT 2,(IX+d) |
1051 |[ 58 | 088 ] | LD E,B | +LD E,B | BIT 3,B | IN E,(C) | *BIT 3,(IX+d) |
1052 |[ 59 | 089 ] | LD E,C | +LD E,C | BIT 3,C | OUT (C),E | *BIT 3,(IX+d) |
1053 |[ 5a | 090 ] | LD E,D | +LD E,D | BIT 3,D | ADC HL,DE | *BIT 3,(IX+d) |
1054 |[ 5b | 091 ] | LD E,E | +LD E,E | BIT 3,E | LD DE,(nn) | *BIT 3,(IX+d) |
1055 |[ 5c | 092 ] | LD E,H | *LD E,IXh | BIT 3,H | *NEG | *BIT 3,(IX+d) |
1056 |[ 5d | 093 ] | LD E,L | *LD E,IXl | BIT 3,L | *RETI | *BIT 3,(IX+d) |
1057 |[ 5e | 094 ] | LD E,(HL) | LD E,(IX+d) | BIT 3,(HL) | IM 2 | BIT 3,(IX+d) |
1058 |[ 5f | 095 ] | LD E,A | +LD E,A | BIT 3,A | LD A,R | *BIT 3,(IX+d) |
1059 |[ 60 | 096 ] | LD H,B | *LD IXh,B | BIT 4,B | IN H,(C) | *BIT 4,(IX+d) |
1060 |[ 61 | 097 ] | LD H,C | *LD IXh,C | BIT 4,C | OUT (C),H | *BIT 4,(IX+d) |
1061 |[ 62 | 098 ] | LD H,D | *LD IXh,D | BIT 4,D | SBC HL,HL | *BIT 4,(IX+d) |
1062 |[ 63 | 099 ] | LD H,E | *LD IXh,E | BIT 4,E | LD (nn),HL | *BIT 4,(IX+d) |
1063 |[ 64 | 100 ] | LD H,H | *LD IXh,IXh | BIT 4,H | *NEG | *BIT 4,(IX+d) |
1064 |[ 65 | 101 ] | LD H,L | *LD IXh,IXl | BIT 4,L | *RETN | *BIT 4,(IX+d) |
1065 |[ 66 | 102 ] | LD H,(HL) | LD H,(IX+d) | BIT 4,(HL) | *IM 0 | BIT 4,(IX+d) |
1066 |[ 67 | 103 ] | LD H,A | *LD IXh,A | BIT 4,A | RRD | *BIT 4,(IX+d) |
1067 |[ 68 | 104 ] | LD L,B | *LD IXl,B | BIT 5,B | IN L,(C) | *BIT 5,(IX+d) |
1068 |[ 69 | 105 ] | LD L,C | *LD IXl,C | BIT 5,C | OUT (C),L | *BIT 5,(IX+d) |
1069 |[ 6a | 106 ] | LD L,D | *LD IXl,D | BIT 5,D | ADC HL,HL | *BIT 5,(IX+d) |
1070 |[ 6b | 107 ] | LD L,E | *LD IXl,E | BIT 5,E | LD HL,(nn) | *BIT 5,(IX+d) |
1071 |[ 6c | 108 ] | LD L,H | *LD IXl,IXh | BIT 5,H | *NEG | *BIT 5,(IX+d) |
1072 |[ 6d | 109 ] | LD L,L | *LD IXl,IXl | BIT 5,L | *RETI | *BIT 5,(IX+d) |
1073 |[ 6e | 110 ] | LD L,(HL) | LD L,(IX+d) | BIT 5,(HL) | *IM * (0?) | BIT 5,(IX+d) |
1074 |[ 6f | 111 ] | LD L,A | *LD IXl,A | BIT 5,A | RLD | *BIT 5,(IX+d) |
1075 |[ 70 | 112 ] | LD (HL),B | LD (IX+d),B | BIT 6,B | *IN X,(C) | *BIT 6,(IX+d) |
1076 |[ 71 | 113 ] | LD (HL),C | LD (IX+d),C | BIT 6,C | *OUT (C),X(0)| *BIT 6,(IX+d) |
1077 |[ 72 | 114 ] | LD (HL),D | LD (IX+d),D | BIT 6,D | SBC HL,SP | *BIT 6,(IX+d) |
1078 |[ 73 | 115 ] | LD (HL),E | LD (IX+d),E | BIT 6,E | LD (nn),SP | *BIT 6,(IX+d) |
1079 |[ 74 | 116 ] | LD (HL),H | LD (IX+d),H | BIT 6,H | *NEG | *BIT 6,(IX+d) |
1080 |[ 75 | 117 ] | LD (HL),L | LD (IX+d),L | BIT 6,L | *RETN | *BIT 6,(IX+d) |
1081 |[ 76 | 118 ] | HALT | +HALT | BIT 6,(HL) | *IM 1 | BIT 6,(IX+d) |
1082 |[ 77 | 119 ] | LD (HL),A | LD (IX+d),A | BIT 6,A | *NOP | *BIT 6,(IX+d) |
1083 |[ 78 | 120 ] | LD A,B | +LD A,B | BIT 7,B | IN A,(C) | *BIT 7,(IX+d) |
1084 |[ 79 | 121 ] | LD A,C | +LD A,C | BIT 7,C | OUT (C),A | *BIT 7,(IX+d) |
1085 |[ 7a | 122 ] | LD A,D | +LD A,D | BIT 7,D | ADC HL,SP | *BIT 7,(IX+d) |
1086 |[ 7b | 123 ] | LD A,E | +LD A,E | BIT 7,E | LD SP,(nn) | *BIT 7,(IX+d) |
1087 |[ 7c | 124 ] | LD A,H | *LD A,IXh | BIT 7,H | *NEG | *BIT 7,(IX+d) |
1088 |[ 7d | 125 ] | LD A,L | *LD A,IXl | BIT 7,L | *RETI | *BIT 7,(IX+d) |
1089 |[ 7e | 126 ] | LD A,(HL) | LD A,(IX+d) | BIT 7,(HL) | *IM 2 | BIT 7,(IX+d) |
1090 |[ 7f | 127 ] | LD A,A | +LD A,A | BIT 7,A | *NOP | *BIT 7,(IX+d) |
1091 |[ 80 | 128 ] | ADD A,B | +ADD A,B | RES 0,B | *NOP | *LD B,RES 0,(IX+d) |
1092 |[ 81 | 129 ] | ADD A,C | +ADD A,C | RES 0,C | *NOP | *LD C,RES 0,(IX+d) |
1093 |[ 82 | 130 ] | ADD A,D | +ADD A,D | RES 0,D | *NOP | *LD D,RES 0,(IX+d) |
1094 |[ 83 | 131 ] | ADD A,E | +ADD A,E | RES 0,E | *NOP | *LD E,RES 0,(IX+d) |
1095 |[ 84 | 132 ] | ADD A,H | *ADD A,IXh | RES 0,H | *NOP | *LD H,RES 0,(IX+d) |
1096 |[ 85 | 133 ] | ADD A,L | *ADD A,IXl | RES 0,L | *NOP | *LD L,RES 0,(IX+d) |
1097 |[ 86 | 134 ] | ADD A,(HL) | ADD A,(IX+d) | RES 0,(HL) | *NOP | RES 0,(IX+d) |
1098 |[ 87 | 135 ] | ADD A,A | +ADD A,A | RES 0,A | *NOP | *LD A,RES 0,(IX+d) |
1099 |[ 88 | 136 ] | ADC A,B | +ADC A,B | RES 1,B | *NOP | *LD B,RES 1,(IX+d) |
1100 |[ 89 | 137 ] | ADC A,C | +ADC A,C | RES 1,C | *NOP | *LD C,RES 1,(IX+d) |
1101 |[ 8a | 138 ] | ADC A,D | +ADC A,D | RES 1,D | *NOP | *LD D,RES 1,(IX+d) |
1102 |[ 8b | 139 ] | ADC A,E | +ADC A,E | RES 1,E | *NOP | *LD E,RES 1,(IX+d) |
1103 |[ 8c | 140 ] | ADC A,H | *ADC A,IXh | RES 1,H | *NOP | *LD H,RES 1,(IX+d) |
1104 |[ 8d | 141 ] | ADC A,L | *ADC A,IXl | RES 1,L | *NOP | *LD L,RES 1,(IX+d) |
1105 |[ 8e | 142 ] | ADC A,(HL) | ADC A,(IX+d) | RES 1,(HL) | *NOP | RES 1,(IX+d) |
1106 |[ 8f | 143 ] | ADC A,A | +ADC A,A | RES 1,A | *NOP | *LD A,RES 1,(IX+d) |
1107 |[ 90 | 144 ] | SUB B | +SUB B | RES 2,B | *NOP | *LD B,RES 2,(IX+d) |
1108 |[ 91 | 145 ] | SUB C | +SUB C | RES 2,C | *NOP | *LD C,RES 2,(IX+d) |
1109 |[ 92 | 146 ] | SUB D | +SUB D | RES 2,D | *NOP | *LD D,RES 2,(IX+d) |
1110 |[ 93 | 147 ] | SUB E | +SUB E | RES 2,E | *NOP | *LD E,RES 2,(IX+d) |
1111 |[ 94 | 148 ] | SUB H | *SUB IXh | RES 2,H | *NOP | *LD H,RES 2,(IX+d) |
1112 |[ 95 | 149 ] | SUB L | *SUB IXl | RES 2,L | *NOP | *LD L,RES 2,(IX+d) |
1113 |[ 96 | 150 ] | SUB (HL) | SUB (IX+d) | RES 2,(HL) | *NOP | RES 2,(IX+d) |
1114 |[ 97 | 151 ] | SUB A | +SUB A | RES 2,A | *NOP | *LD A,RES 2,(IX+d) |
1115 |[ 98 | 152 ] | SBC A,B | +SBC A,B | RES 3,B | *NOP | *LD B,RES 3,(IX+d) |
1116 |[ 99 | 153 ] | SBC A,C | +SBC A,C | RES 3,C | *NOP | *LD C,RES 3,(IX+d) |
1117 |[ 9a | 154 ] | SBC A,D | +SBC A,D | RES 3,D | *NOP | *LD D,RES 3,(IX+d) |
1118 |[ 9b | 155 ] | SBC A,E | +SBC A,E | RES 3,E | *NOP | *LD E,RES 3,(IX+d) |
1119 |[ 9c | 156 ] | SBC A,H | *SBC A,IXh | RES 3,H | *NOP | *LD H,RES 3,(IX+d) |
1120 |[ 9d | 157 ] | SBC A,L | *SBC A,IXl | RES 3,L | *NOP | *LD L,RES 3,(IX+d) |
1121 |[ 9e | 158 ] | SBC A,(HL) | SBC A,(IX+d) | RES 3,(HL) | *NOP | RES 3,(IX+d) |
1122 |[ 9f | 159 ] | SBC A,A | +SBC A,A | RES 3,A | *NOP | *LD A,RES 3,(IX+d) |
1123 |[ a0 | 160 ] | AND B | +AND B | RES 4,B | LDI | *LD B,RES 4,(IX+d) |
1124 |[ a1 | 161 ] | AND C | +AND C | RES 4,C | CPI | *LD C,RES 4,(IX+d) |
1125 |[ a2 | 162 ] | AND D | +AND D | RES 4,D | INI | *LD D,RES 4,(IX+d) |
1126 |[ a3 | 163 ] | AND E | +AND E | RES 4,E | OUTI | *LD E,RES 4,(IX+d) |
1127 |[ a4 | 164 ] | AND H | *AND IXh | RES 4,H | *NOP | *LD H,RES 4,(IX+d) |
1128 |[ a5 | 165 ] | AND L | *AND IXl | RES 4,L | *NOP | *LD L,RES 4,(IX+d) |
1129 |[ a6 | 166 ] | AND (HL) | AND (IX+d) | RES 4,(HL) | *NOP | RES 4,(IX+d) |
1130 |[ a7 | 167 ] | AND A | +AND A | RES 4,A | *NOP | *LD A,RES 4,(IX+d) |
1131 |[ a8 | 168 ] | XOR B | +XOR B | RES 5,B | LDD | *LD B,RES 5,(IX+d) |
1132 |[ a9 | 169 ] | XOR C | +XOR C | RES 5,C | CPD | *LD C,RES 5,(IX+d) |
1133 |[ aa | 170 ] | XOR D | +XOR D | RES 5,D | IND | *LD D,RES 5,(IX+d) |
1134 |[ ab | 171 ] | XOR E | +XOR E | RES 5,E | OUTD | *LD E,RES 5,(IX+d) |
1135 |[ ac | 172 ] | XOR H | *XOR IXh | RES 5,H | *NOP | *LD H,RES 5,(IX+d) |
1136 |[ ad | 173 ] | XOR L | *XOR IXl | RES 5,L | *NOP | *LD L,RES 5,(IX+d) |
1137 |[ ae | 174 ] | XOR (HL) | XOR (IX+d) | RES 5,(HL) | *NOP | RES 5,(IX+d) |
1138 |[ af | 175 ] | XOR A | +XOR A | RES 5,A | *NOP | *LD A,RES 5,(IX+d) |
1139 |[ b0 | 176 ] | OR B | +OR B | RES 6,B | LDIR | *LD B,RES 6,(IX+d) |
1140 |[ b1 | 177 ] | OR C | +OR C | RES 6,C | CPIR | *LD C,RES 6,(IX+d) |
1141 |[ b2 | 178 ] | OR D | +OR D | RES 6,D | INIR | *LD D,RES 6,(IX+d) |
1142 |[ b3 | 179 ] | OR E | +OR E | RES 6,E | OTIR | *LD E,RES 6,(IX+d) |
1143 |[ b4 | 180 ] | OR H | *OR IXh | RES 6,H | *NOP | *LD H,RES 6,(IX+d) |
1144 |[ b5 | 181 ] | OR L | *OR IXl | RES 6,L | *NOP | *LD L,RES 6,(IX+d) |
1145 |[ b6 | 182 ] | OR (HL) | OR (IX+d) | RES 6,(HL) | *NOP | RES 6,(IX+d) |
1146 |[ b7 | 183 ] | OR A | +OR A | RES 6,A | *NOP | *LD A,RES 6,(IX+d) |
1147 |[ b8 | 184 ] | CP B | +CP B | RES 7,B | LDDR | *LD B,RES 7,(IX+d) |
1148 |[ b9 | 185 ] | CP C | +CP C | RES 7,C | CPDR | *LD C,RES 7,(IX+d) |
1149 |[ ba | 186 ] | CP D | +CP D | RES 7,D | INDR | *LD D,RES 7,(IX+d) |
1150 |[ bb | 187 ] | CP E | +CP E | RES 7,E | OTDR | *LD E,RES 7,(IX+d) |
1151 |[ bc | 188 ] | CP H | *CP IXh | RES 7,H | *NOP | *LD H,RES 7,(IX+d) |
1152 |[ bd | 189 ] | CP L | *CP IXl | RES 7,L | *NOP | *LD L,RES 7,(IX+d) |
1153 |[ be | 190 ] | CP (HL) | CP (IX+d) | RES 7,(HL) | *NOP | RES 7,(IX+d) |
1154 |[ bf | 191 ] | CP A | +CP A | RES 7,A | *NOP | *LD A,RES 7,(IX+d) |
1155 |[ c0 | 192 ] | RET NZ | +RET NZ | SET 0,B | *NOP | *LD B,SET 0,(IX+d) |
1156 |[ c1 | 193 ] | POP BC | +POP BC | SET 0,C | *NOP | *LD C,SET 0,(IX+d) |
1157 |[ c2 | 194 ] | JP NZ,nn | +JP NZ,nn | SET 0,D | *NOP | *LD D,SET 0,(IX+d) |
1158 |[ c3 | 195 ] | JP nn | +JP nn | SET 0,E | *NOP | *LD E,SET 0,(IX+d) |
1159 |[ c4 | 196 ] | CALL NZ,nn | +CALL NZ,nn | SET 0,H | *NOP | *LD H,SET 0,(IX+d) |
1160 |[ c5 | 197 ] | PUSH BC | +PUSH BC | SET 0,L | *NOP | *LD L,SET 0,(IX+d) |
1161 |[ c6 | 198 ] | ADD A,n | +ADD A,n | SET 0,(HL) | *NOP | SET 0,(IX+d) |
1162 |[ c7 | 199 ] | RST 0 | +RST 0 | SET 0,A | *NOP | *LD A,SET 0,(IX+d) |
1163 |[ c8 | 100 ] | RET Z | +RET Z | SET 1,B | *NOP | *LD B,SET 1,(IX+d) |
1164 |[ c9 | 201 ] | RET | +RET | SET 1,C | *NOP | *LD C,SET 1,(IX+d) |
1165 |[ ca | 202 ] | JP Z,nn | +JP Z,nn | SET 1,D | *NOP | *LD D,SET 1,(IX+d) |
1166 |[ cb | 203 ] | [Prefix] | *[See DDCB info]| SET 1,E | *NOP | *LD E,SET 1,(IX+d) |
1167 |[ cc | 204 ] | CALL Z,nn | +CALL Z,nn | SET 1,H | *NOP | *LD H,SET 1,(IX+d) |
1168 |[ cd | 205 ] | CALL nn | +CALL nn | SET 1,L | *NOP | *LD L,SET 1,(IX+d) |
1169 |[ ce | 206 ] | ADC A,n | +ADC A,n | SET 1,(HL) | *NOP | SET 1,(IX+d) |
1170 |[ cf | 207 ] | RST 8 | +RST 8 | SET 1,A | *NOP | *LD A,SET 1,(IX+d) |
1171 |[ d0 | 208 ] | RET NC | +RET NC | SET 2,B | *NOP | *LD B,SET 2,(IX+d) |
1172 |[ d1 | 209 ] | POP DE | +POP DE | SET 2,C | *NOP | *LD C,SET 2,(IX+d) |
1173 |[ d2 | 210 ] | JP NC,nn | +JP NC,nn | SET 2,D | *NOP | *LD D,SET 2,(IX+d) |
1174 |[ d3 | 211 ] | OUT (n),A | +OUT (n),A | SET 2,E | *NOP | *LD E,SET 2,(IX+d) |
1175 |[ d4 | 212 ] | CALL NC,nn | +CALL NC,nn | SET 2,H | *NOP | *LD H,SET 2,(IX+d) |
1176 |[ d5 | 213 ] | PUSH DE | +PUSH DE | SET 2,L | *NOP | *LD L,SET 2,(IX+d) |
1177 |[ d6 | 214 ] | SUB n | +SUB n | SET 2,(HL) | *NOP | SET 2,(IX+d) |
1178 |[ d7 | 215 ] | RST 10H | +RST 10H | SET 2,A | *NOP | *LD A,SET 2,(IX+d) |
1179 |[ d8 | 216 ] | RET C | +RET C | SET 3,B | *NOP | *LD B,SET 3,(IX+d) |
1180 |[ d9 | 217 ] | EXX | +EXX | SET 3,C | *NOP | *LD C,SET 3,(IX+d) |
1181 |[ da | 218 ] | JP C,nn | +JP C,nn | SET 3,D | *NOP | *LD D,SET 3,(IX+d) |
1182 |[ db | 219 ] | IN A,(n) | +IN A,(n) | SET 3,E | *NOP | *LD E,SET 3,(IX+d) |
1183 |[ dc | 220 ] | CALL C,nn | +CALL C,nn | SET 3,H | *NOP | *LD H,SET 3,(IX+d) |
1184 |[ dd | 221 ] | [IX Prefix] | +[IX Prefix] | SET 3,L | *NOP | *LD L,SET 3,(IX+d) |
1185 |[ de | 222 ] | SBC A,n | +SBC A,n | SET 3,(HL) | *NOP | SET 3,(IX+d) |
1186 |[ df | 223 ] | RST 18H | +RST 18H | SET 3,A | *NOP | *LD A,SET 3,(IX+d) |
1187 |[ e0 | 224 ] | RET PO | +RET PO | SET 4,B | *NOP | *LD B,SET 4,(IX+d) |
1188 |[ e1 | 225 ] | POP HL | POP IX | SET 4,C | *NOP | *LD C,SET 4,(IX+d) |
1189 |[ e2 | 226 ] | JP PO,nn | +JP PO,nn | SET 4,D | *NOP | *LD D,SET 4,(IX+d) |
1190 |[ e3 | 227 ] | EX (SP),HL | EX (SP),IX | SET 4,E | *NOP | *LD E,SET 4,(IX+d) |
1191 |[ e4 | 228 ] | CALL PO,nn | +CALL PO,nn | SET 4,H | *NOP | *LD H,SET 4,(IX+d) |
1192 |[ e5 | 229 ] | PUSH HL | PUSH IX | SET 4,L | *NOP | *LD L,SET 4,(IX+d) |
1193 |[ e6 | 230 ] | AND n | +AND n | SET 4,(HL) | *NOP | SET 4,(IX+d) |
1194 |[ e7 | 231 ] | RST 20H | +RST 20H | SET 4,A | *NOP | *LD A,SET 4,(IX+d) |
1195 |[ e8 | 232 ] | RET PE | +RET PE | SET 5,B | *NOP | *LD B,SET 5,(IX+d) |
1196 |[ e9 | 233 ] | JP (HL) | JP (IX) | SET 5,C | *NOP | *LD C,SET 5,(IX+d) |
1197 |[ ea | 234 ] | JP PE,nn | +JP PE,nn | SET 5,D | *NOP | *LD D,SET 5,(IX+d) |
1198 |[ eb | 235 ] | EX DE,HL | +EX DE,HL | SET 5,E | *NOP | *LD E,SET 5,(IX+d) |
1199 |[ ec | 236 ] | CALL PE,nn | +CALL PE,nn | SET 5,H | *NOP | *LD H,SET 5,(IX+d) |
1200 |[ ed | 237 ] | [Prefix] | +[Prefix] | SET 5,L | *NOP | *LD L,SET 5,(IX+d) |
1201 |[ ee | 238 ] | XOR n | +XOR n | SET 5,(HL) | *NOP | SET 5,(IX+d) |
1202 |[ ef | 239 ] | RST 28H | +RST 28H | SET 5,A | *NOP | *LD A,SET 5,(IX+d) |
1203 |[ f0 | 240 ] | RET P | +RET P | SET 6,B | *NOP | *LD B,SET 6,(IX+d) |
1204 |[ f1 | 241 ] | POP AF | +POP AF | SET 6,C | *NOP | *LD C,SET 6,(IX+d) |
1205 |[ f2 | 242 ] | JP P,nn | +JP P,nn | SET 6,D | *NOP | *LD D,SET 6,(IX+d) |
1206 |[ f3 | 243 ] | DI | +DI | SET 6,E | *NOP | *LD E,SET 6,(IX+d) |
1207 |[ f4 | 244 ] | CALL P,nn | +CALL P,nn | SET 6,H | *NOP | *LD H,SET 6,(IX+d) |
1208 |[ f5 | 245 ] | PUSH AF | +PUSH AF | SET 6,L | *NOP | *LD L,SET 6,(IX+d) |
1209 |[ f6 | 246 ] | OR n | +OR n | SET 6,(HL) | *NOP | SET 6,(IX+d) |
1210 |[ f7 | 247 ] | RST 30H | +RST 30H | SET 6,A | *NOP | *LD A,SET 6,(IX+d) |
1211 |[ f8 | 248 ] | RET M | +RET M | SET 7,B | *NOP | *LD B,SET 7,(IX+d) |
1212 |[ f9 | 249 ] | LD SP,HL | LD SP,IX | SET 7,C | *NOP | *LD C,SET 7,(IX+d) |
1213 |[ fa | 250 ] | JP M,nn | +JP M,nn | SET 7,D | *NOP | *LD D,SET 7,(IX+d) |
1214 |[ fb | 251 ] | EI | +EI | SET 7,E | *NOP | *LD E,SET 7,(IX+d) |
1215 |[ fc | 252 ] | CALL M,nn | +CALL M,nn | SET 7,H | *NOP | *LD H,SET 7,(IX+d) |
1216 |[ fd | 253 ] | [IY Prefix] | +[IY Prefix] | SET 7,L | *NOP | *LD L,SET 7,(IX+d) |
1217 |[ fe | 254 ] | CP n | +CP n | SET 7,(HL) | *NOP | SET 7,(IX+d) |
1218 |[ ff | 255 ] | RST 38H | +RST 38H | SET 7,A | *NOP | *LD A,SET 7,(IX+d) |
1219 +-------------+-----------------+-------------------+------------------+------------------+-------------------------+
1221 Peter McGavin. (peterm@maths.grace.cri.nz)
1223 From: agulbra@tigern.nvg.unit.no (Arnt Gulbrandsen)
1224 Newsgroups: comp.sys.sinclair
1225 Subject: Re: Undocumented Z80 opcodes
1226 Date: 6 Jan 1994 13:31:44 +0100
1227 Organization: University of Trondheim, Norway
1228 NNTP-Posting-Host: tigern.nvg.unit.no
1230 In article <PETERM.94Jan6094415@kea.grace.cri.nz>,
1231 Peter McGavin <peterm@maths.grace.cri.nz> wrote:
1232 >In article, <2geqvv$nlq@tigern.nvg.unit.no>,
1233 >agulbra@tigern.nvg.unit.no (Arnt Gulbrandsen) wrote:
1234 >>I believe that list originally was written by from David Librik
1235 >><librik@cory.eecs.berkeley.edu>. David (with someone else, I think)
1236 >>reverse-engineered the Z80 and wrote a list of what he found, a list
1237 >>which I think I sent to Peter.
1239 >Actually I got it from Simon Owen (S.N.Owen@newcastle.ac.uk).
1241 >Here it is: (sorry it's a bit wide)
1243 Not the same. Here's the big one.
1247 Date: Fri, 19 Nov 1993 00:40:23 -0800
1248 From: David Librik <librik@cory.EECS.Berkeley.EDU>
1249 Message-Id: <199311190840.AAA06896@cory.EECS.Berkeley.EDU>
1250 Subject: Undocumented Z-80 Instructions
1253 Here is my article on undocumented Z-80 instructions. Please go over
1254 your data and add anything you can to this list, and send it back to me.
1258 librik@cs.Berkeley.edu
1262 There's been some discussion about the so-called "undocumented" opcodes
1263 of the Z-80 microprocessor. These are officially-undefined machine-
1264 language instructions that often have powerful and useful effects;
1265 they are so often used by Z-80 system programmers that they are de-facto
1266 "documented". Here is an article I posted a few years ago on another
1269 By the way, the reason these instructions exist even though they were
1270 not part of the original CPU design: the Z-80 was the most complex
1271 microprocessor ever to be completely hard-wired (no microcode). As a
1272 result -- as anyone who's ever taken a logic design course can tell
1273 you -- it's much easier to have "undefined states" do whatever-comes-
1276 * 2/28/88 2:37 pm librik / pega / cerl *
1278 The undocumented Z80 opcodes. While Zilog claims that
1279 these should not be "trusted", I have yet to hear of a
1280 Z80 that does not support them; and at least one operating
1283 * HX and LX instructions. These instructions manipulate
1284 the high- and low-order 8 bits of the sixteen bit IX and
1285 IY registers. (Here, I give the opcodes for HX and LX,
1286 to get HY and LY, use FD instead of DD in the opcodes.)
1288 * SLL. This instruction shifts an 8-bit quantity left
1289 (logical), then inserts 1 into the low-order bit.
1291 * Shift/Bit Set/Bit Reset with autocopy. These instructions
1292 perform bit shifts (RLC, RRC, RL, RR, SLA, SRA, SLL, SRL),
1293 bit set (SET) and bit reset (RES) operations on (IX+jj)
1294 [and (IY+jj)], but also automatically copy the result
1295 into an 8-bit register.
1297 * Null port accesses. IN and OUT without data.
1299 dd24 inc hx dd62 ld hx,d dd8c adc a,hx
1300 dd25 dec hx dd63 ld hx,e dd8d adc a,lx
1301 dd26nn ld hx,nn dd64 ld hx,hx dd94 sub hx
1302 dd2c inc lx dd65 ld hx,lx dd95 sub lx
1303 dd2d dec lx dd67 ld hx,a dd9c sbc a,hx
1304 dd2enn ld lx,nn dd68 ld lx,b dd9d sbc a,lx
1305 dd44 ld b,hx dd69 ld lx,c dda4 and hx
1306 dd45 ld b,lx dd6a ld lx,d dda5 and lx
1307 dd4c ld c,hx dd6b ld lx,e ddac xor hx
1308 dd4d ld c,lx dd6c ld lx,hx ddad xor lx
1309 dd54 ld d,hx dd6d ld lx,lx ddb4 or hx
1310 dd55 ld d,lx dd6f ld lx,a ddb5 or lx
1311 dd5c ld e,hx dd7c ld a,hx ddbc cp hx
1312 dd5d ld e,lx dd7d ld a,lx ddbd cp lx
1313 dd60 ld hx,b dd84 add a,hx
1314 dd61 ld hx,c dd85 add a,lx
1316 The corresponding instructions for HY and LY may be obtained
1317 by using FD in place of DD.
1319 cb30 sll b cb34 sll h
1320 cb31 sll c cb35 sll l
1321 cb32 sll d cb36 sll (hl)
1322 cb33 sll e cb37 sll a
1324 * The following instructions perform the indicated operation
1325 * on (ix+jj) and copy results into register 'r' (see below).
1326 ddcbjj00-ddcbjj07 rlc r,(ix+jj)
1327 ddcbjj08-ddcbjj0f rrc r,(ix+jj)
1328 ddcbjj10-ddcbjj17 rl r,(ix+jj)
1329 ddcbjj18-ddcbjj1f rr r,(ix+jj)
1330 ddcbjj20-ddcbjj27 sla r,(ix+jj)
1331 ddcbjj28-ddcbjj2f sra r,(ix+jj)
1332 ddcbjj30-ddcbjj37 sll r,(ix+jj)
1333 ddcbjj38-ddcbjj3f srl r,(ix+jj)
1335 ddcbjj80-ddcbjj87 res r,0,(ix+jj)
1336 ddcbjj88-ddcbjj8f res r,1,(ix+jj)
1337 ddcbjj90-ddcbjj97 res r,2,(ix+jj)
1338 ddcbjj98-ddcbjj9f res r,3,(ix+jj)
1339 ddcbjja0-ddcbjja7 res r,4,(ix+jj)
1340 ddcbjja8-ddcbjjaf res r,5,(ix+jj)
1341 ddcbjjb0-ddcbjjb7 res r,6,(ix+jj)
1342 ddcbjjb8-ddcbjjbf res r,7,(ix+jj)
1344 ddcbjjc0-ddcbjjc7 set r,0,(ix+jj)
1345 ddcbjjc8-ddcbjjcf set r,1,(ix+jj)
1346 ddcbjjd0-ddcbjjd7 set r,2,(ix+jj)
1347 ddcbjjd8-ddcbjjdf set r,3,(ix+jj)
1348 ddcbjje0-ddcbjje7 set r,4,(ix+jj)
1349 ddcbjje8-ddcbjjef set r,5,(ix+jj)
1350 ddcbjjf0-ddcbjjf7 set r,6,(ix+jj)
1351 ddcbjjf8-ddcbjjff set r,7,(ix+jj)
1353 In the last 3 tables, the corresponding instructions for
1354 (IY+jj) may be obtained by using FD in place of DD.
1356 The value for 'r' is determined as follows:
1357 Last digit of opcode: register 'r':
1369 * gets input from port stored in (c), but does not store it.
1370 * another reference claims this is: in (hl),(c) but I see no
1371 * evidence for that, other than symmetry.
1374 * seems to send a 00 to port stored in (c).
1375 * the same reference as as above calls this: out (hl),(c).
1377 A full article on this material is available upon request.
1378 This information from NORTHERN BYTES, volume 5 number 8.
1382 In addition to the information in the above article, I should mention
1383 for completeness' sake all the other undefined opcodes and their
1384 (generally redundant) effects. I shall list the ordinary Z-80
1385 instructions which they mimic.
1387 ed63nnnn ld (nnnn),hl
1388 ed6bnnnn ld hl,(nnnn)
1389 ed4c, ed54, ed5c, ed64, ed6c, ed74, ed7c neg
1390 ed55, ed5d, ed65, ed6d, ed75, ed7d retn
1392 The following are no-ops:
1394 ed80-9f, eda4-a7, edac-af, edb4-b7, edbc-bf, ed00-3f, edc0-ff,
1395 ed4e, ed66, ed6e, ed76, ed77, ed7e, ed7f
1397 Additional information from NANOS' Reference Card for the Z-80 microprocessor.
1400 librik/pega/nova (on PLATO/NovaNET)