2 * Simulator of microcontrollers (xa.cc)
4 * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt.
6 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
7 * Other contributors include:
8 * Karl Bongers karl@turbobit.com,
9 * Johan Knol johan.knol@iduna.nl
12 /* This file is part of microcontroller simulator: ucsim.
14 UCSIM is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
19 UCSIM is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
24 You should have received a copy of the GNU General Public License
25 along with UCSIM; see the file COPYING. If not, write to the Free
26 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
49 * Base type of xa controllers
52 cl_xa::cl_xa(class cl_sim *asim):
61 cl_uc::init(); /* Memories now exist */
62 ram= address_space(MEM_XRAM_ID);
63 rom= address_space(MEM_ROM_ID);
65 /* set SCR to osc/4, native XA mode, flat 24 */
67 /* initialize SP to 100H */
69 /* set PSW from reset vector */
71 /* set PC from reset vector */
74 printf("The XA Simulator is in development, UNSTABLE, DEVELOPERS ONLY!\n");
81 cl_xa::mk_mem(enum mem_class type, char *class_name)
83 class cl_m *m= cl_uc::mk_mem(type, class_name);
93 cl_xa::id_string(void)
95 return("unspecified XA");
100 * Making elements of the controller
104 cl_xa::get_mem_size(enum mem_class type)
108 case MEM_IRAM: return(0x2000);
109 case MEM_SFR: return(0x2000);
110 case MEM_ROM: return(0x10000);
111 case MEM_XRAM: return(0x10000);
114 return(cl_uc::get_mem_size(type));
119 cl_xa::mk_hw_elements(void)
122 /* t_uc::mk_hw() does nothing */
126 cl_xa::make_memories(void)
128 class cl_address_space *as;
130 as= rom= new cl_address_space("rom", 0, 0x10000, 8);
132 address_spaces->add(as);
133 as= iram= new cl_address_space("iram", 0, 0x2000, 8);
135 address_spaces->add(as);
136 as= sfr= new cl_address_space("sfr", 0x0, 0x2000, 8);
138 address_spaces->add(as);
139 as= ram= new cl_address_space("xram", 0, 0x10000, 8);
141 address_spaces->add(as);
143 class cl_address_decoder *ad;
144 class cl_memory_chip *chip;
146 chip= new cl_memory_chip("rom_chip", 0x10000, 8);
149 ad= new cl_address_decoder(as= address_space("rom"), chip, 0, 0xffff, 0);
151 as->decoders->add(ad);
154 chip= new cl_memory_chip("iram_chip", 0x2000, 8);
157 ad= new cl_address_decoder(as= address_space("iram"), chip, 0, 0x1fff, 0);
159 as->decoders->add(ad);
162 chip= new cl_memory_chip("xram_chip", 0x10000, 8);
165 ad= new cl_address_decoder(as= address_space("xram"), chip, 0, 0xffff, 0);
167 as->decoders->add(ad);
170 chip= new cl_memory_chip("sfr_chip", 0x2000, 8);
173 ad= new cl_address_decoder(as= address_space("sfr"), chip, 0x0, 0x1fff, 0);
175 as->decoders->add(ad);
181 * Help command interpreter
187 // this should be unused, we need to make main prog code
188 // independent of any array thing.
189 printf("ERROR - Using disass[] table in XA sim code!\n");
190 return(glob_disass_xa);
193 struct name_entry *cl_xa::sfr_tbl(void)
198 struct name_entry *cl_xa::bit_tbl(void)
204 cl_xa::inst_length(t_addr addr)
208 get_disasm_info(addr, &len, NULL, NULL, NULL, NULL);
214 cl_xa::inst_branch(t_addr addr)
218 get_disasm_info(addr, NULL, &b, NULL, NULL, NULL);
224 cl_xa::longest_inst(void)
229 static char dir_name[64];
230 char *cl_xa::get_dir_name(short addr) {
231 if (!get_name(addr, sfr_tbl(), dir_name)) {
232 sprintf (dir_name, "0x%03x", addr);
237 static char bit_name[64];
238 char *cl_xa::get_bit_name(short addr) {
239 if (!get_name(addr, bit_tbl(), bit_name)) {
240 sprintf (bit_name, "0x%03x", addr);
245 /*--------------------------------------------------------------------
246 get_disasm_info - Given an address, return information about the opcode
248 addr - address of opcode we want information on.
249 ret_len - return length of opcode.
250 ret_branch - return a character which indicates if we are
251 a branching opcode. Used by main app to implement "Next"
252 function which steps over functions.
253 immed_offset - return a number which represents the number of bytes
254 offset to where any immediate data is(tail end of opcode). Used
255 for printing disassembly.
256 operands - return a key indicating the form of the operands,
257 used for printing the disassembly.
258 mnemonic - return a key indicating the mnemonic of the instruction.
260 Return value: Return the operand code formed by either the single
261 byte opcode or 2 bytes of the opcode for multi-byte opcodes.
263 Note: Any of the return pointer parameters can be set to NULL to
264 indicate the caller does not want the information.
265 |--------------------------------------------------------------------*/
267 cl_xa::get_disasm_info(t_addr addr,
278 int start_addr = addr;
280 code= get_mem(MEM_ROM_ID, addr++);
283 while (disass_xa[i].mnemonic != NOP)
287 code = (code << 8) | get_mem(MEM_ROM_ID, addr++);
289 while ((code & disass_xa[i].mask) != disass_xa[i].code &&
290 disass_xa[i].mnemonic != BAD_OPCODE)
295 *ret_len = disass_xa[i].length;
297 *ret_branch = disass_xa[i].branch;
300 *immed_offset = immed_n;
301 else *immed_offset = (addr - start_addr);
304 *parms = disass_xa[i].operands;
307 *mnemonic = disass_xa[i].mnemonic;
313 static char *w_reg_strs[] = {
323 static char *b_reg_strs[] = {
333 /*--------------------------------------------------------------------
334 disass - Disassemble an opcode.
335 addr - address of opcode to disassemble/print.
336 sep - optionally points to string(tab) to use as separator.
337 |--------------------------------------------------------------------*/
339 cl_xa::disass(t_addr addr, char *sep)
341 char work[256], parm_str[40];
345 int immed_offset = 0;
352 code = get_disasm_info(addr, &len, NULL, &immed_offset, &operands, &mnemonic);
354 if (mnemonic == BAD_OPCODE) {
355 buf= (char*)malloc(30);
356 strcpy(buf, "UNKNOWN/INVALID");
361 reg_strs = w_reg_strs;
363 reg_strs = b_reg_strs;
366 // the repeating common parameter encoding for ADD, ADDC, SUB, AND...
368 sprintf(parm_str, "%s,%s",
369 reg_strs[((code >> 4) & 0xf)],
370 reg_strs[(code & 0xf)]);
373 sprintf(parm_str, "%s,[%s]",
374 reg_strs[((code >> 4) & 0xf)],
375 w_reg_strs[(code & 0xf)]);
378 sprintf(parm_str, "[%s],%s",
379 w_reg_strs[(code & 0x7)],
380 reg_strs[((code >> 4) & 0xf)] );
383 sprintf(parm_str, "%s,[%s+%02x]",
384 reg_strs[((code >> 4) & 0xf)],
385 w_reg_strs[(code & 0x7)],
386 get_mem(MEM_ROM_ID, addr+immed_offset));
390 sprintf(parm_str, "[%s+%02x],%s",
391 w_reg_strs[(code & 0x7)],
392 get_mem(MEM_ROM_ID, addr+immed_offset),
393 reg_strs[((code >> 4) & 0xf)] );
397 sprintf(parm_str, "%s,[%s+%04x]",
398 reg_strs[((code >> 4) & 0xf)],
399 w_reg_strs[(code & 0x7)],
400 (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) |
401 (get_mem(MEM_ROM_ID, addr+immed_offset)<<8)) );
406 sprintf(parm_str, "[%s+%04x],%s",
407 w_reg_strs[(code & 0x7)],
408 (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) |
409 (get_mem(MEM_ROM_ID, addr+immed_offset)<<8)),
410 reg_strs[((code >> 4) & 0xf)] );
415 sprintf(parm_str, "%s,[%s+]",
416 reg_strs[((code >> 4) & 0xf)],
417 w_reg_strs[(code & 0xf)]);
420 sprintf(parm_str, "[%s+],%s",
421 w_reg_strs[(code & 0x7)],
422 reg_strs[((code >> 4) & 0xf)] );
425 sprintf(parm_str, "%s,%s",
426 get_dir_name(((code & 0x7) << 8) |
427 get_mem(MEM_ROM_ID, addr+immed_offset)),
428 reg_strs[((code >> 4) & 0xf)] );
432 sprintf(parm_str, "%s,%s",
433 reg_strs[((code >> 4) & 0xf)],
434 get_dir_name(((code & 0x7) << 8) |
435 get_mem(MEM_ROM_ID, addr+immed_offset)));
439 sprintf(parm_str, "%s,#0x%02x",
440 b_reg_strs[((code >> 4) & 0xf)],
441 get_mem(MEM_ROM_ID, addr+immed_offset) );
445 sprintf(parm_str, "%s,#0x%04x",
446 reg_strs[((code >> 4) & 0xf)],
447 (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) |
448 (get_mem(MEM_ROM_ID, addr+immed_offset)<<8)) );
453 sprintf(parm_str, "[%s], 0x%02x",
454 w_reg_strs[((code >> 4) & 0x7)],
455 get_mem(MEM_ROM_ID, addr+immed_offset) );
459 sprintf(parm_str, "[%s], 0x%04x",
460 w_reg_strs[((code >> 4) & 0x7)],
461 (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) |
462 (get_mem(MEM_ROM_ID, addr+immed_offset)<<8)) );
467 sprintf(parm_str, "[%s+], 0x%02x",
468 w_reg_strs[((code >> 4) & 0x7)],
469 get_mem(MEM_ROM_ID, addr+immed_offset) );
472 case IREGINC_DATA16 :
473 sprintf(parm_str, "[%s+], 0x%04x",
474 w_reg_strs[((code >> 4) & 0x7)],
475 (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) |
476 (get_mem(MEM_ROM_ID, addr+immed_offset)<<8)) );
480 case IREGOFF8_DATA8 :
481 sprintf(parm_str, "[%s+%02x], 0x%02x",
482 w_reg_strs[((code >> 4) & 0x7)],
483 get_mem(MEM_ROM_ID, addr+immed_offset),
484 get_mem(MEM_ROM_ID, addr+immed_offset+1) );
487 case IREGOFF8_DATA16 :
488 sprintf(parm_str, "[%s+%02x], 0x%04x",
489 w_reg_strs[((code >> 4) & 0x7)],
490 get_mem(MEM_ROM_ID, addr+immed_offset),
491 (short)((get_mem(MEM_ROM_ID, addr+immed_offset+2)) |
492 (get_mem(MEM_ROM_ID, addr+immed_offset+1)<<8)) );
495 case IREGOFF16_DATA8 :
496 sprintf(parm_str, "[%s+%04x], 0x%02x",
497 w_reg_strs[((code >> 4) & 0x7)],
498 (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) |
499 (get_mem(MEM_ROM_ID, addr+immed_offset+0)<<8)),
500 get_mem(MEM_ROM_ID, addr+immed_offset+2) );
503 case IREGOFF16_DATA16 :
504 sprintf(parm_str, "[%s+%04x], 0x%04x",
505 w_reg_strs[((code >> 4) & 0x7)],
506 (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) |
507 (get_mem(MEM_ROM_ID, addr+immed_offset+0)<<8)),
508 (short)((get_mem(MEM_ROM_ID, addr+immed_offset+3)) |
509 (get_mem(MEM_ROM_ID, addr+immed_offset+2)<<8)) );
513 sprintf(parm_str, "%s,#0x%02x",
514 get_dir_name(((code & 0x0070) << 4) |
515 get_mem(MEM_ROM_ID, addr+immed_offset)),
516 get_mem(MEM_ROM_ID, addr+immed_offset+1));
520 sprintf(parm_str, "%s,#0x%04x",
521 get_dir_name(((code & 0x0070) << 4) |
522 get_mem(MEM_ROM_ID, addr+immed_offset)),
523 get_mem(MEM_ROM_ID, addr+immed_offset+2) +
524 (get_mem(MEM_ROM_ID, addr+immed_offset+1)<<8));
529 case NO_OPERANDS : // for NOP
530 strcpy(parm_str, "");
533 sprintf(parm_str, "C,%s",
534 get_bit_name(((code&0x0003)<<8) + get_mem(MEM_ROM_ID, addr+2)));
537 sprintf(parm_str, "%s,C",
538 get_bit_name(((code&0x0003)<<8) + get_mem(MEM_ROM_ID, addr+2)));
541 strcpy(parm_str, "REG_DATA4");
544 strcpy(parm_str, "REG_DATA5");
547 strcpy(parm_str, "IREG_DATA4");
550 strcpy(parm_str, "IREGINC_DATA4");
552 case IREGOFF8_DATA4 :
553 strcpy(parm_str, "IREGOFF8_DATA4");
555 case IREGOFF16_DATA4 :
556 strcpy(parm_str, "IREGOFF16_DATA4");
559 sprintf(parm_str, "%s,#0x%x",
560 get_dir_name(((code & 0x70)<<4) |
561 get_mem(MEM_ROM_ID, addr+2)),
565 sprintf(parm_str, "%s",
566 get_dir_name(((code & 0x007) << 4) +
567 get_mem(MEM_ROM_ID, addr+2)));
570 sprintf(parm_str, "%s",
571 reg_strs[((code >> 4) & 0xf)] );
574 sprintf(parm_str, "[%s]",
575 reg_strs[((code >> 4) & 0xf)] );
578 sprintf(parm_str, "%s",
579 get_bit_name(((code&0x0003)<<8) + get_mem(MEM_ROM_ID, addr+2)));
582 sprintf(parm_str, "%s,0x%04x",
583 get_bit_name((code&0x0003)<<8) + get_mem(MEM_ROM_ID, addr+2),
584 ((signed char)get_mem(MEM_ROM_ID, addr+3)*2+addr+len)&0xfffe);
587 sprintf(parm_str, "#0x%02x", code&0x0f);
590 sprintf(parm_str, "0x%06x",
591 (get_mem(MEM_ROM_ID, addr+3)<<16) +
592 (get_mem(MEM_ROM_ID, addr+1)<<8) +
593 get_mem(MEM_ROM_ID, addr+2));
597 sprintf(parm_str, "%s,0x%04x",
598 reg_strs[(code>>4) & 0xf],
599 ((signed char)get_mem(MEM_ROM_ID, addr+2)*2+addr+len)&0xfffe);
602 sprintf(parm_str, "%s,0x%04x",
603 get_dir_name(((code&0x07)<<8) +
604 get_mem(MEM_ROM_ID, addr+2)),
605 ((signed char)get_mem(MEM_ROM_ID, addr+2)*2+addr+len)&0xfffe);
608 sprintf(parm_str, "REG_USP");
611 sprintf(parm_str, "USP_REG");
614 sprintf(parm_str, "0x%04x",
615 ((signed char)get_mem(MEM_ROM_ID, addr+1)*2+addr+len)&0xfffe);
618 sprintf(parm_str, "0x%04x",
619 ((signed short)((get_mem(MEM_ROM_ID, addr+1)<<8) + get_mem(MEM_ROM_ID, addr+2))*2+addr+len)&0xfffe);
623 /* TODO: the list should be comma reperated
624 and maybe for POP the list should be reversed */
625 unsigned char rlist=code&0xff;
627 if (code&0x0800) { // word list
628 if (code&0x4000) { // R8-R15
629 if (rlist&0x80) strcat (parm_str, "R15 ");
630 if (rlist&0x40) strcat (parm_str, "R14");
631 if (rlist&0x20) strcat (parm_str, "R13 ");
632 if (rlist&0x10) strcat (parm_str, "R12 ");
633 if (rlist&0x08) strcat (parm_str, "R11 ");
634 if (rlist&0x04) strcat (parm_str, "R10 ");
635 if (rlist&0x02) strcat (parm_str, "R9 ");
636 if (rlist&0x01) strcat (parm_str, "R8 ");
638 if (rlist&0x80) strcat (parm_str, "R7 ");
639 if (rlist&0x40) strcat (parm_str, "R6 ");
640 if (rlist&0x20) strcat (parm_str, "R5 ");
641 if (rlist&0x10) strcat (parm_str, "R4 ");
642 if (rlist&0x08) strcat (parm_str, "R3 ");
643 if (rlist&0x04) strcat (parm_str, "R2 ");
644 if (rlist&0x02) strcat (parm_str, "R1 ");
645 if (rlist&0x01) strcat (parm_str, "R0 ");
647 } else { // byte list
648 if (code&0x4000) { //R7h-R4l
649 if (rlist&0x80) strcat (parm_str, "R7h ");
650 if (rlist&0x40) strcat (parm_str, "R7l ");
651 if (rlist&0x20) strcat (parm_str, "R6h ");
652 if (rlist&0x10) strcat (parm_str, "R6l ");
653 if (rlist&0x08) strcat (parm_str, "R5h ");
654 if (rlist&0x04) strcat (parm_str, "R5l ");
655 if (rlist&0x02) strcat (parm_str, "R4h ");
656 if (rlist&0x01) strcat (parm_str, "R4l ");
658 if (rlist&0x80) strcat (parm_str, "R3h ");
659 if (rlist&0x40) strcat (parm_str, "R3l ");
660 if (rlist&0x20) strcat (parm_str, "R2h ");
661 if (rlist&0x10) strcat (parm_str, "R2l ");
662 if (rlist&0x08) strcat (parm_str, "R1h ");
663 if (rlist&0x04) strcat (parm_str, "R1l ");
664 if (rlist&0x02) strcat (parm_str, "R0h ");
665 if (rlist&0x01) strcat (parm_str, "R0l ");
671 case REG_DIRECT_REL8 :
672 sprintf(parm_str, "%s,%s,0x%02x",
673 reg_strs[((code >> 4) & 0xf)],
674 get_dir_name(((code & 0x7) << 8) +
675 get_mem(MEM_ROM_ID, addr+immed_offset)),
676 ((signed char) get_mem(MEM_ROM_ID, addr+immed_offset+1) * 2) & 0xfffe );
678 case REG_DATA8_REL8 :
679 sprintf(parm_str, "%s,#0x%02x,0x%02x",
680 reg_strs[((code >> 4) & 0xf)],
681 get_mem(MEM_ROM_ID, addr+immed_offset+1),
682 ((signed char)get_mem(MEM_ROM_ID, addr+immed_offset) * 2) & 0xfffe );
684 case REG_DATA16_REL8 :
685 sprintf(parm_str, "%s,#0x%04x,0x%02x",
686 w_reg_strs[(code >> 4) & 0xf],
687 get_mem(MEM_ROM_ID, addr+immed_offset+2) +
688 (get_mem(MEM_ROM_ID, addr+immed_offset+1)<<8),
689 ((signed char)get_mem(MEM_ROM_ID, addr+immed_offset) * 2) & 0xfffe );
691 case IREG_DATA8_REL8 :
692 sprintf(parm_str, "[%s],#0x%02x,0x%02x",
693 reg_strs[((code >> 4) & 0x7)],
694 get_mem(MEM_ROM_ID, addr+immed_offset+1),
695 ((signed char)get_mem(MEM_ROM_ID, addr+immed_offset) * 2) & 0xfffe );
697 case IREG_DATA16_REL8 :
698 sprintf(parm_str, "[%s],#0x%04x,0x%02x",
699 w_reg_strs[(code >> 4) & 0x7],
700 get_mem(MEM_ROM_ID, addr+immed_offset+2) +
701 (get_mem(MEM_ROM_ID, addr+immed_offset+1)<<8),
702 ((signed char)get_mem(MEM_ROM_ID, addr+immed_offset) * 2) & 0xfffe );
706 strcpy(parm_str, "A, [A+DPTR]");
710 strcpy(parm_str, "A, [A+PC]");
714 sprintf(parm_str, "%s,%s+0x%02x",
715 w_reg_strs[(code >> 4) & 0x7],
716 w_reg_strs[code & 0x7],
717 get_mem(MEM_ROM_ID, addr+immed_offset));
721 sprintf(parm_str, "%s,%s+0x%02x",
722 w_reg_strs[(code >> 4) & 0x7],
723 w_reg_strs[code & 0x7],
724 get_mem(MEM_ROM_ID, addr+immed_offset+1) +
725 (get_mem(MEM_ROM_ID, addr+immed_offset+0)<<8));
729 strcpy(parm_str, "[A+DPTR]");
733 sprintf(parm_str, "[[%s]]",
734 w_reg_strs[(code & 0x7)]);
738 strcpy(parm_str, "???");
742 sprintf(work, "%s %s",
743 op_mnemonic_str[ mnemonic ],
746 p= strchr(work, ' ');
753 buf= (char *)malloc(6+strlen(p)+1);
755 buf= (char *)malloc((p-work)+strlen(sep)+strlen(p)+1);
757 for (p= work, b= buf; *p != ' '; p++, b++)
763 while (strlen(buf) < 6)
772 /*--------------------------------------------------------------------
773 print_regs - Print the registers, flags and other useful information.
774 Used to print a status line while stepping through the code.
775 |--------------------------------------------------------------------*/
777 cl_xa::print_regs(class cl_console *con)
782 con->dd_printf("CA---VNZ | ", flags);
783 con->dd_printf("R0:%04x R1:%04x R2:%04x R3:%04x\n",
784 reg2(0), reg2(1), reg2(2), reg2(3));
786 con->dd_printf("%c%c---%c%c%c | ",
787 (flags & BIT_C)?'1':'0',
788 (flags & BIT_AC)?'1':'0',
789 (flags & BIT_V)?'1':'0',
790 (flags & BIT_N)?'1':'0',
791 (flags & BIT_Z)?'1':'0');
793 con->dd_printf("R4:%04x R5:%04x R6:%04x SP:%04x ES:%04x DS:%04x\n",
794 reg2(4), reg2(5), reg2(6), reg2(7), 0, 0);
796 print_disass(PC, con);
800 /*--------------------------------------------------------------------
801 exec_inst - Called to implement simulator execution of 1 instruction
802 at the current PC(program counter) address.
803 |--------------------------------------------------------------------*/
804 int cl_xa::exec_inst(void)
812 return(resBREAKPOINT);
815 /* the following lookups make for a slow simulation, we will
816 figure out how to make it fast later... */
818 /* scan to see if its a 1 byte-opcode */
821 while ( ((code & disass_xa[i].mask) != disass_xa[i].code ||
822 (!disass_xa[i].is1byte)) /* not a one byte op code */
824 disass_xa[i].mnemonic != BAD_OPCODE)
827 if (disass_xa[i].mnemonic == BAD_OPCODE) {
828 /* hit the end of the list, must be a 2 or more byte opcode */
829 /* fetch another code byte and search the list again */
830 //if (fetch(&code2)) ?not sure if break allowed in middle of opcode?
831 // return(resBREAKPOINT);
832 code |= fetch(); /* add 2nd opcode */
835 while ((code & disass_xa[i].mask) != disass_xa[i].code &&
836 disass_xa[i].mnemonic != BAD_OPCODE)
838 /* we should have found the opcode by now, if not invalid entry at eol */
841 operands = (int)(disass_xa[i].operands);
842 switch (disass_xa[i].mnemonic)
845 return inst_ADD(code, operands);
847 return inst_ADDC(code, operands);
849 return inst_ADDS(code, operands);
851 return inst_AND(code, operands);
853 return inst_ANL(code, operands);
855 return inst_ASL(code, operands);
857 return inst_ASR(code, operands);
859 return inst_BCC(code, operands);
861 return inst_BCS(code, operands);
863 return inst_BEQ(code, operands);
865 return inst_BG(code, operands);
867 return inst_BGE(code, operands);
869 return inst_BGT(code, operands);
871 return inst_BKPT(code, operands);
873 return inst_BL(code, operands);
875 return inst_BLE(code, operands);
877 return inst_BLT(code, operands);
879 return inst_BMI(code, operands);
881 return inst_BNE(code, operands);
883 return inst_BNV(code, operands);
885 return inst_BOV(code, operands);
887 return inst_BPL(code, operands);
889 return inst_BR(code, operands);
891 return inst_CALL(code, operands);
893 return inst_CJNE(code, operands);
895 return inst_CLR(code, operands);
897 return inst_CMP(code, operands);
899 return inst_CPL(code, operands);
901 return inst_DA(code, operands);
907 return inst_DIV(code, operands);
909 return inst_DJNZ(code, operands);
911 return inst_FCALL(code, operands);
913 return inst_FJMP(code, operands);
915 return inst_JB(code, operands);
917 return inst_JBC(code, operands);
919 return inst_JMP(code, operands);
921 return inst_JNB(code, operands);
923 return inst_JNZ(code, operands);
925 return inst_JZ(code, operands);
927 return inst_LEA(code, operands);
929 return inst_LSR(code, operands);
931 return inst_MOV(code, operands);
933 return inst_MOVC(code, operands);
935 return inst_MOVS(code, operands);
937 return inst_MOVX(code, operands);
941 return inst_MUL(code, operands);
943 return inst_NEG(code, operands);
945 return inst_NOP(code, operands);
947 return inst_NORM(code, operands);
949 return inst_OR(code, operands);
951 return inst_ORL(code, operands);
954 return inst_POP(code, operands);
957 return inst_PUSH(code, operands);
959 return inst_RESET(code, operands);
961 return inst_RET(code, operands);
963 return inst_RETI(code, operands);
965 return inst_RL(code, operands);
967 return inst_RLC(code, operands);
969 return inst_RR(code, operands);
971 return inst_RRC(code, operands);
973 return inst_SETB(code, operands);
975 return inst_SEXT(code, operands);
977 return inst_SUB(code, operands);
979 return inst_SUBB(code, operands);
981 return inst_TRAP(code, operands);
983 return inst_XCH(code, operands);
985 return inst_XOR(code, operands);
995 PC= get_mem_size(MEM_ROM_ID)-1;*/
996 PC= rom->inc_address(PC, -1);
997 //tick(-clock_per_cycle());
998 sim->stop(resINV_INST);
1003 /* End of xa.src/xa.cc */