2 * Simulator of microcontrollers (inst_gen.cc)
3 * this code pulled into various parts
4 of inst.cc with FUNC1 and FUNC2 defined as
5 various operations to implement ADD, ADDC, ...
7 * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt.
9 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
10 * Other contributors include:
11 * Karl Bongers karl@turbobit.com,
16 /* This file is part of microcontroller simulator: ucsim.
18 UCSIM is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
23 UCSIM is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
28 You should have received a copy of the GNU General Public License
29 along with UCSIM; see the file COPYING. If not, write to the Free
30 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
36 if (code & 0x0800) { /* word op */
38 FUNC2( reg2(RI_F0), reg2(RI_0F) )
42 FUNC1( reg1(RI_F0), reg1(RI_0F) )
49 short srcreg = reg2(RI_07);
50 if (code & 0x0800) { /* word op */
63 if (operands == REG_IREGINC) {
64 set_reg2(RI_07, srcreg+1);
71 short addr = reg2(RI_07);
72 if (code & 0x0800) { /* word op */
73 unsigned short wtmp, wtotal;
75 wtotal = FUNC2( wtmp, reg2(RI_F0) );
79 total = FUNC1( get1(addr), reg1(RI_F0) );
82 if (operands == IREGINC_REG) {
83 set_reg2(RI_07, addr+1);
92 if (operands == IREGOFF8_REG) {
93 offset = (int)((char) fetch());
95 offset = (int)((short)fetch2());
97 if (code & 0x0800) { /* word op */
98 t_mem addr = reg2(RI_07) + offset;
99 unsigned short wtotal;
100 wtotal = FUNC2( get2(addr), reg2(RI_F0) );
101 store2(addr, wtotal);
103 t_mem addr = reg2(RI_07) + offset;
105 total = FUNC1( get1(addr), reg1(RI_F0) );
115 if (operands == REG_IREGOFF8) {
116 offset = (int)((char) fetch());
118 offset = (int)((short)fetch2());
121 if (code & 0x0800) { /* word op */
124 get2(reg2(RI_07)+offset)
130 get1(reg2(RI_07)+offset)
139 int addr = ((code & 0x7) << 8) | fetch();
140 if (code & 0x0800) { /* word op */
141 unsigned short wtmp = get_word_direct(addr);
142 set_word_direct( addr,
143 FUNC2( wtmp, reg2(RI_F0) )
146 unsigned char tmp = get_byte_direct(addr);
147 set_byte_direct( addr,
148 FUNC1( tmp, reg1(RI_F0) )
156 int addr = ((code & 0x7) << 8) | fetch();
157 if (code & 0x0800) { /* word op */
160 get_word_direct(addr)
166 get_byte_direct(addr)
176 unsigned char dat = fetch();
178 res = FUNC1( reg1(RI_F0), dat);
179 set_reg1( RI_F0, res );
180 printf("reg_data8 code=%x dat=%x, res=%x r=%x\n", code, dat, res, reg1( RI_F0) );
183 set_reg1( RI_F0, FUNC1( reg1(RI_F0), fetch()) );
188 unsigned short dat = fetch2();
189 set_reg2( RI_F0, FUNC2( reg2(RI_F0), dat) );
198 t_mem addr = reg2(RI_70);
200 total = FUNC1(tmp, fetch() );
202 if (operands == IREGINC_DATA8) {
203 set_reg2(RI_70, addr+1);
208 case IREGINC_DATA16 :
211 unsigned short total;
213 t_mem addr = reg2(RI_70);
215 total = FUNC2(tmp, fetch2() );
217 if (operands == IREGINC_DATA16) {
218 set_reg2(RI_70, addr+1);
223 case IREGOFF8_DATA8 :
224 case IREGOFF16_DATA8 :
229 if (operands == IREGOFF8_DATA8) {
230 offset = (int)((char) fetch());
232 offset = (int)((short)fetch2());
245 case IREGOFF8_DATA16 :
246 case IREGOFF16_DATA16 :
251 if (operands == IREGOFF8_DATA16) {
252 offset = (int)((char) fetch());
254 offset = (int)((short)fetch2());
269 int addr = ((code & 0x70) << 4) | fetch();
270 unsigned char bdir = get_byte_direct(addr);
271 unsigned char bdat = fetch();
272 set_byte_direct( addr, FUNC1( bdir, bdat) );
278 int addr = ((code & 0x70) << 4) | fetch();
279 unsigned short wdir = get_word_direct(addr);
280 unsigned short wdat = fetch2();
281 set_word_direct( addr, FUNC2( wdir, wdat) );