2 * Simulator of microcontrollers (inst_gen.cc)
3 * this code pulled into various parts
4 of inst.cc with FUNC1 and FUNC2 defined as
5 various operations to implement ADD, ADDC, ...
7 * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt.
9 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
10 * Other contributors include:
11 * Karl Bongers karl@turbobit.com,
16 /* This file is part of microcontroller simulator: ucsim.
18 UCSIM is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
23 UCSIM is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
28 You should have received a copy of the GNU General Public License
29 along with UCSIM; see the file COPYING. If not, write to the Free
30 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
36 if (code & 0x0800) { /* word op */
38 FUNC2( reg2(RI_F0), reg2(RI_0F) )
42 FUNC1( reg1(RI_F0), reg1(RI_0F) )
49 short srcreg = reg2(RI_07);
50 if (code & 0x0800) { /* word op */
63 if (operands == REG_IREGINC) {
64 set_reg2(RI_07, srcreg+1);
71 short addr = reg2(RI_07);
72 if (code & 0x0800) { /* word op */
73 unsigned short wtmp, wtotal;
75 wtotal = FUNC2( wtmp, reg2(RI_F0) );
79 total = FUNC1( get1(addr), reg1(RI_F0) );
82 if (operands == IREGINC_REG) {
83 set_reg2(RI_07, addr+1);
92 if (operands == REG_IREGOFF8) {
93 offset = (int)((char) fetch());
95 offset = (int)((short)fetch2());
97 if (code & 0x0800) { /* word op */
98 t_mem addr = reg2(RI_70) + offset;
99 unsigned short wtmp, wtotal;
101 wtotal = FUNC2( wtmp, reg2(RI_F0) );
102 store2(addr, wtotal);
104 t_mem addr = reg2(RI_70) + ((short) fetch2());
106 total = FUNC1( get1(addr), reg1(RI_F0) );
116 if (operands == REG_IREGOFF8) {
117 offset = (int)((char) fetch());
119 offset = (int)((short)fetch2());
122 if (code & 0x0800) { /* word op */
125 get2(reg2(RI_07)+offset)
129 int offset = (int)((short)fetch2());
132 get1(reg2(RI_07)+offset)
141 int addr = ((code & 0x7) << 8) | fetch();
142 if (code & 0x0800) { /* word op */
143 unsigned short wtmp = get_word_direct(addr);
144 set_word_direct( addr,
145 FUNC2( wtmp, reg2(RI_F0) )
148 unsigned char tmp = get_byte_direct(addr);
149 set_byte_direct( addr,
150 FUNC1( tmp, reg1(RI_F0) )
158 int addr = ((code & 0x7) << 8) | fetch();
159 if (code & 0x0800) { /* word op */
162 get_word_direct(addr)
168 get_byte_direct(addr)
176 set_reg1( RI_F0, FUNC1( reg1(RI_F0), fetch()) );
181 unsigned short dat = fetch2();
182 //unsigned short res;
183 //res = FUNC2( reg2(RI_F0), dat);
184 //set_reg2( RI_F0, res );
185 //printf("reg_data16 code=%x dat=%x, res=%x\n", code, dat, res);
186 set_reg2( RI_F0, FUNC2( reg2(RI_F0), dat) );
195 t_mem addr = reg2(RI_70);
197 total = FUNC1(tmp, fetch() );
199 if (operands == IREGINC_DATA8) {
200 set_reg2(RI_70, addr+1);
205 case IREGINC_DATA16 :
208 unsigned short total;
210 t_mem addr = reg2(RI_70);
212 total = FUNC2(tmp, fetch2() );
214 if (operands == IREGINC_DATA16) {
215 set_reg2(RI_70, addr+1);
220 case IREGOFF8_DATA8 :
221 case IREGOFF16_DATA8 :
226 if (operands == IREGOFF8_DATA8) {
227 offset = (int)((char) fetch());
229 offset = (int)((short)fetch2());
242 case IREGOFF8_DATA16 :
243 case IREGOFF16_DATA16 :
248 if (operands == IREGOFF8_DATA16) {
249 offset = (int)((char) fetch());
251 offset = (int)((short)fetch2());
266 int addr = ((code & 0x70) << 4) | fetch();
267 unsigned char bdir = get_byte_direct(addr);
268 unsigned char bdat = fetch();
269 set_byte_direct( addr, FUNC1( bdir, bdat) );
275 int addr = ((code & 0x70) << 4) | fetch();
276 unsigned short wdir = get_word_direct(addr);
277 unsigned short wdat = fetch2();
278 set_word_direct( addr, FUNC2( wdir, wdat) );