2 * Simulator of microcontrollers (inst.cc)
4 * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt.
6 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
7 * Other contributors include:
8 * Karl Bongers karl@turbobit.com,
13 /* This file is part of microcontroller simulator: ucsim.
15 UCSIM is free software; you can redistribute it and/or modify
16 it under the terms of the GNU General Public License as published by
17 the Free Software Foundation; either version 2 of the License, or
18 (at your option) any later version.
20 UCSIM is distributed in the hope that it will be useful,
21 but WITHOUT ANY WARRANTY; without even the implied warranty of
22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 GNU General Public License for more details.
25 You should have received a copy of the GNU General Public License
26 along with UCSIM; see the file COPYING. If not, write to the Free
27 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
39 void cl_xa::store1(t_addr addr, unsigned char val)
42 set_idata1(addr, val);
44 set_xdata1(addr, val);
48 void cl_xa::store2(t_addr addr, unsigned char val)
51 set_idata2(addr, val);
53 set_xdata2(addr, val);
57 unsigned char cl_xa::get1(t_addr addr)
60 return get_idata1(addr);
62 return get_xdata1(addr);
66 unsigned short cl_xa::get2(t_addr addr)
69 return get_idata2(addr);
71 return get_xdata2(addr);
75 int cl_xa::get_reg(int word_flag, unsigned int index)
80 result = get_word_direct(index);
83 result = get_byte_direct(index);
88 bool cl_xa::get_bit(int bit) {
97 result = get_byte_direct(offset + (bit/8)) & (1 << (bit%8));
99 //return mem_direct[offset + (bit/8)] & (1 << (bit%8));
102 void cl_xa::set_bit(int bit, int value) {
111 i = get_byte_direct(offset + (bit/8));
113 set_byte_direct(offset + (bit/8), i | (1 << (bit%8)) );
114 //mem_direct[offset + (bit/8)] |= (1 << (bit%8));
116 set_byte_direct(offset + (bit/8), i & ~(1 << (bit%8)) );
117 //mem_direct[offset + (bit/8)] &= ~(1 << (bit%8));
121 #define RI_F0 ((code >> 4) & 0xf)
122 #define RI_70 ((code >> 4) & 0x7)
123 #define RI_0F (code & 0xf)
124 #define RI_07 (code & 0x7)
126 int cl_xa::inst_ADD(uint code, int operands)
132 #include "inst_gen.cc"
137 int cl_xa::inst_ADDC(uint code, int operands)
143 #include "inst_gen.cc"
148 int cl_xa::inst_ADDS(uint code, int operands)
153 int cl_xa::inst_AND(uint code, int operands)
159 #include "inst_gen.cc"
163 int cl_xa::inst_ANL(uint code, int operands)
168 int cl_xa::inst_ASL(uint code, int operands)
173 int cl_xa::inst_ASR(uint code, int operands)
178 int cl_xa::inst_BCC(uint code, int operands)
183 int cl_xa::inst_BCS(uint code, int operands)
188 int cl_xa::inst_BEQ(uint code, int operands)
190 short jmpAddr = fetch1()*2;
191 if (get_psw() & BIT_Z) {
192 PC=(PC+jmpAddr)&0xfffffffe;
197 int cl_xa::inst_BG(uint code, int operands)
201 int cl_xa::inst_BGE(uint code, int operands)
205 int cl_xa::inst_BGT(uint code, int operands)
209 int cl_xa::inst_BKPT(uint code, int operands)
213 int cl_xa::inst_BL(uint code, int operands)
217 int cl_xa::inst_BLE(uint code, int operands)
221 int cl_xa::inst_BLT(uint code, int operands)
225 int cl_xa::inst_BMI(uint code, int operands)
229 int cl_xa::inst_BNE(uint code, int operands)
233 int cl_xa::inst_BNV(uint code, int operands)
237 int cl_xa::inst_BOV(uint code, int operands)
241 int cl_xa::inst_BPL(uint code, int operands)
246 int cl_xa::inst_BR(uint code, int operands)
248 short jmpAddr = fetch1()*2;
249 PC=(PC+jmpAddr)&0xfffffe;
253 int cl_xa::inst_CALL(uint code, int operands)
257 bool pageZero=get_scr()&1;
262 jmpaddr = (signed short)fetch2();
263 sp = get_sp() - (pageZero ? 2 : 4);
265 store2(sp, PC&0xffff);
267 store2(sp+2, (PC>>16)&0xff);
270 PC = (PC + jmpaddr) & 0xfffffe;
275 sp = get_sp() - (pageZero ? 2 : 4);
277 store2(sp, PC&0xffff);
279 store2(sp+2, (PC>>16)&0xff);
281 jmpaddr = reg2(RI_07);
283 PC = (PC + jmpaddr) & 0xfffffe;
290 int cl_xa::inst_CJNE(uint code, int operands)
293 case REG_DIRECT_REL8:
296 if (code & 0x800) { // word op
298 int src = get_word_direct( ((code & 0x7)<<4) | fetch1());
299 int addr = (fetch1() * 2);
300 int dst = reg2(RI_F0);
303 flags &= ~BIT_ALL; /* clear these bits */
305 if (result == 0) flags |= BIT_Z;
306 if (result > 0xffff) flags |= BIT_C;
307 if (dst < src) flags |= BIT_N;
313 int src = get_byte_direct( ((code & 0x7)<<4) | fetch1());
314 int addr = (fetch1() * 2);
315 int dst = reg1(RI_F0);
318 flags &= ~BIT_ALL; /* clear these bits */
320 if (result == 0) flags |= BIT_Z;
321 if (result > 0xff) flags |= BIT_C;
322 if (dst < src) flags |= BIT_N;
332 int daddr = ((code & 0x7) << 8) | fetch();
333 int addr = fetch() * 2;
335 if (code & 0x800) { // word op
336 unsigned short tmp = get_word_direct(daddr)-1;
337 set_word_direct(daddr, tmp);
341 unsigned char tmp = get_word_direct(daddr)-1;
342 set_byte_direct(daddr, tmp);
352 int cl_xa::inst_CLR(uint code, int operands)
354 unsigned short bitAddr = (code&0x03 << 8) + fetch();
360 int cl_xa::inst_CMP(uint code, int operands)
366 #include "inst_gen.cc"
369 int cl_xa::inst_CPL(uint code, int operands)
373 int cl_xa::inst_DA(uint code, int operands)
377 int cl_xa::inst_DIV(uint code, int operands)
382 int cl_xa::inst_DJNZ(uint code, int operands)
388 int addr = ( ((char)fetch1()) * 2);
389 if (code & 0x800) { // word op
390 unsigned short tmp = mov2(0, reg2(RI_F0)-1);
391 set_reg2(RI_F0, tmp);
393 PC = (PC + addr) & 0xfffffe;
395 unsigned char tmp = mov1(0, reg1(RI_F0)-1);
396 set_reg1(RI_F0, tmp);
398 PC = (PC + addr) & 0xfffffe;
405 int daddr = ((code & 0x7) << 8) | fetch();
406 int addr = fetch() * 2;
408 if (code & 0x800) { // word op
409 unsigned short tmp = get_word_direct(daddr)-1;
410 set_word_direct(daddr, tmp);
414 unsigned char tmp = get_word_direct(daddr)-1;
415 set_byte_direct(daddr, tmp);
426 int cl_xa::inst_FCALL(uint code, int operands)
431 int cl_xa::inst_FJMP(uint code, int operands)
436 int cl_xa::inst_JB(uint code, int operands)
438 short bitAddr=((code&0x3)<<8) + fetch1();
439 short jmpAddr = (fetch1() * 2);
440 if (get_bit(bitAddr)) {
441 PC = (PC+jmpAddr)&0xfffffe;
445 int cl_xa::inst_JBC(uint code, int operands)
449 int cl_xa::inst_JNB(uint code, int operands)
451 short bitAddr=((code&0x3)<<8) + fetch1();
452 short jmpAddr = (fetch1() * 2);
453 if (!get_bit(bitAddr)) {
454 PC = (PC+jmpAddr)&0xfffffe;
459 int cl_xa::inst_JMP(uint code, int operands)
466 jmpAddr = (signed short)fetch2()*2;
467 PC = (PC + jmpAddr) & 0xfffffe;
472 PC |= (reg2(RI_07) & 0xfffe); /* word aligned */
474 /* fixme 2 more... */
478 int cl_xa::inst_JNZ(uint code, int operands)
480 short saddr = (fetch1() * 2);
481 /* reg1(8) = R4L, is ACC for MCS51 compatiblility */
483 PC = (PC + saddr) & 0xfffffe;
487 int cl_xa::inst_JZ(uint code, int operands)
489 /* reg1(8) = R4L, is ACC for MCS51 compatiblility */
490 short saddr = (fetch1() * 2);
496 int cl_xa::inst_LEA(uint code, int operands)
500 int cl_xa::inst_LSR(uint code, int operands)
504 int cl_xa::inst_MOV(uint code, int operands)
510 #include "inst_gen.cc"
513 int cl_xa::inst_MOVC(uint code, int operands)
518 short srcreg = reg2(RI_07);
519 if (code & 0x0800) { /* word op */
532 if (operands == REG_IREGINC) {
533 set_reg2(RI_07, srcreg+1);
538 { /* R4l=ACC, R6=DPTR */
539 unsigned int addr = (PC & 0xff0000) | (reg1(4) + reg2(6));
540 unsigned short result;
544 flags &= ~(BIT_Z | BIT_N); /* clear these bits */
545 result = getcode1(addr);
546 set_reg1( 4, result);
547 if (result == 0) flags |= BIT_Z;
548 if (result & 0x80) flags |= BIT_N;
553 { /* R4l=ACC, R6=DPTR */
554 unsigned int addr = (PC + reg1(4));
555 unsigned short result;
559 flags &= ~(BIT_Z | BIT_N); /* clear these bits */
560 result = getcode1(addr);
561 set_reg1( 4, result);
562 if (result == 0) flags |= BIT_Z;
563 if (result & 0x80) flags |= BIT_N;
570 int cl_xa::inst_MOVS(uint code, int operands)
574 int cl_xa::inst_MOVX(uint code, int operands)
578 int cl_xa::inst_MUL(uint code, int operands)
582 int cl_xa::inst_NEG(uint code, int operands)
586 int cl_xa::inst_NOP(uint code, int operands)
590 int cl_xa::inst_NORM(uint code, int operands)
594 int cl_xa::inst_OR(uint code, int operands)
600 #include "inst_gen.cc"
604 int cl_xa::inst_ORL(uint code, int operands)
609 int cl_xa::inst_POP(uint code, int operands)
615 unsigned short direct_addr = ((operands & 0x7) << 8) | fetch();
618 if (code & 0x0800) { /* word op */
619 set_word_direct(direct_addr, get2(sp) );
621 set_byte_direct(direct_addr, get2(sp) & 0xff );
629 unsigned char rlist = fetch();
630 rlist = rlist; //shutup compiler
636 int cl_xa::inst_PUSH(uint code, int operands)
642 unsigned short direct_addr = ((operands & 0x7) << 8) | fetch();
646 if (code & 0x0800) { /* word op */
647 store2( sp, get_word_direct(direct_addr));
649 store2( sp, get_byte_direct(direct_addr));
656 unsigned char rlist = fetch();
657 rlist = rlist; //shutup compiler
663 int cl_xa::inst_RESET(uint code, int operands)
667 int cl_xa::inst_RET(uint code, int operands)
669 unsigned int retaddr;
671 bool pageZero=get_scr()&1;
676 retaddr |= get2(sp+2) << 16;
684 int cl_xa::inst_RETI(uint code, int operands)
686 unsigned int retaddr;
688 bool pageZero=get_scr()&1;
692 retaddr = get2(sp+2);
694 retaddr |= get2(sp+4) << 16;
702 int cl_xa::inst_RL(uint code, int operands)
706 int cl_xa::inst_RLC(uint code, int operands)
710 int cl_xa::inst_RR(uint code, int operands)
714 int cl_xa::inst_RRC(uint code, int operands)
718 int cl_xa::inst_SETB(uint code, int operands)
720 unsigned short bitAddr = (code&0x03 << 8) + fetch();
726 int cl_xa::inst_SEXT(uint code, int operands)
731 int cl_xa::inst_SUB(uint code, int operands)
737 #include "inst_gen.cc"
741 int cl_xa::inst_SUBB(uint code, int operands)
747 #include "inst_gen.cc"
750 int cl_xa::inst_TRAP(uint code, int operands)
754 int cl_xa::inst_XCH(uint code, int operands)
758 int cl_xa::inst_XOR(uint code, int operands)
764 #include "inst_gen.cc"
768 /* End of xa.src/inst.cc */